mRo boards: Fix for USART clock selection

This commit is contained in:
Alexis Guijarro 2024-08-08 02:39:54 +00:00 committed by Daniel Agar
parent fdfe43471e
commit f4f93118e6
4 changed files with 24 additions and 0 deletions

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@ -197,6 +197,12 @@
#define STM32_FDCANCLK STM32_HSE_FREQUENCY
/* UART clock selection */
/* reset to default to overwrite any changes done by any bootloader */
#define STM32_RCC_D2CCIP2R_USART234578_SEL RCC_D2CCIP2R_USART234578SEL_RCC
#define STM32_RCC_D2CCIP2R_USART16_SEL RCC_D2CCIP2R_USART16SEL_RCC
/* FLASH wait states */
#define BOARD_FLASH_WAITSTATES 2

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@ -197,6 +197,12 @@
#define STM32_FDCANCLK STM32_HSE_FREQUENCY
/* UART clock selection */
/* reset to default to overwrite any changes done by any bootloader */
#define STM32_RCC_D2CCIP2R_USART234578_SEL RCC_D2CCIP2R_USART234578SEL_RCC
#define STM32_RCC_D2CCIP2R_USART16_SEL RCC_D2CCIP2R_USART16SEL_RCC
/* FLASH wait states */
#define BOARD_FLASH_WAITSTATES 2

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@ -196,6 +196,12 @@
#define STM32_FDCANCLK STM32_HSE_FREQUENCY
/* UART clock selection */
/* reset to default to overwrite any changes done by any bootloader */
#define STM32_RCC_D2CCIP2R_USART234578_SEL RCC_D2CCIP2R_USART234578SEL_RCC
#define STM32_RCC_D2CCIP2R_USART16_SEL RCC_D2CCIP2R_USART16SEL_RCC
/* FLASH wait states */
#define BOARD_FLASH_WAITSTATES 2

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@ -196,6 +196,12 @@
#define STM32_FDCANCLK STM32_HSE_FREQUENCY
/* UART clock selection */
/* reset to default to overwrite any changes done by any bootloader */
#define STM32_RCC_D2CCIP2R_USART234578_SEL RCC_D2CCIP2R_USART234578SEL_RCC
#define STM32_RCC_D2CCIP2R_USART16_SEL RCC_D2CCIP2R_USART16SEL_RCC
/* FLASH wait states */
#define BOARD_FLASH_WAITSTATES 2