Add support for Timer15 on H743 boards (#19228)

* Adds Timer15 to stm32_common, if the timer base is defined
* Adds Timer15 logic for DMA and AltFunc config on stm32h7 boards
* Adds TIM15 BDTR->MOE support in stm32_common timer init
* Adds support for TIM15 pwm channels on Matek H743 Slim
This commit is contained in:
Charles Cross 2022-02-21 16:52:38 -05:00 committed by GitHub
parent 710185d2ad
commit f31f3370ef
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
6 changed files with 35 additions and 6 deletions

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@ -111,8 +111,8 @@
/* PWM
*/
#define DIRECT_PWM_OUTPUT_CHANNELS 8
#define DIRECT_INPUT_TIMER_CHANNELS 8
#define DIRECT_PWM_OUTPUT_CHANNELS 10
#define DIRECT_INPUT_TIMER_CHANNELS 10
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS

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@ -37,7 +37,7 @@ constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
initIOTimer(Timer::Timer3, DMA{DMA::Index1, DMA::Stream2, DMA::Channel5}),
initIOTimer(Timer::Timer5, DMA{DMA::Index1, DMA::Stream0, DMA::Channel6}),
initIOTimer(Timer::Timer4, DMA{DMA::Index1, DMA::Stream6, DMA::Channel2}),
// initIOTimer(Timer::Timer15),
initIOTimer(Timer::Timer15),
};
constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
@ -49,10 +49,10 @@ constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
initIOTimerChannel(io_timers, {Timer::Timer5, Timer::Channel4}, {GPIO::PortA, GPIO::Pin3}),
initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel1}, {GPIO::PortD, GPIO::Pin12}),
initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel2}, {GPIO::PortD, GPIO::Pin13}),
initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel1}, {GPIO::PortE, GPIO::Pin5}),
initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel2}, {GPIO::PortE, GPIO::Pin6}),
// initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel3}, {GPIO::PortD, GPIO::Pin14}),
// initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel4}, {GPIO::PortD, GPIO::Pin15}),
// initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel1}, {GPIO::PortE, GPIO::Pin5}),
// initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel2}, {GPIO::PortE, GPIO::Pin6}),
};
constexpr io_timers_channel_mapping_t io_timers_channel_mapping =

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@ -91,6 +91,9 @@ enum Timer {
Timer12,
Timer13,
Timer14,
#ifdef STM32_TIM15_BASE
Timer15
#endif
};
enum Channel {
Channel1 = 1,
@ -153,6 +156,11 @@ static inline constexpr uint32_t timerBaseRegister(Timer::Timer timer)
case Timer::Timer14: return STM32_TIM14_BASE;
#endif
#ifdef STM32_TIM15_BASE
case Timer::Timer15: return STM32_TIM15_BASE;
#endif
default: break;
}

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@ -644,7 +644,12 @@ int io_timer_init_timer(unsigned timer, io_timer_channel_mode_t mode)
rCCER(timer) = 0;
rDCR(timer) = 0;
if ((io_timers[timer].base == STM32_TIM1_BASE) || (io_timers[timer].base == STM32_TIM8_BASE)) {
if ((io_timers[timer].base == STM32_TIM1_BASE)
|| (io_timers[timer].base == STM32_TIM8_BASE)
#ifdef STM32_TIM15_BASE
|| (io_timers[timer].base == STM32_TIM15_BASE)
#endif
) {
/* master output enable = on */

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@ -85,6 +85,7 @@ static inline constexpr uint32_t getTimerUpdateDMAMap(Timer::Timer timer, const
case Timer::Timer12:
case Timer::Timer13:
case Timer::Timer14:
case Timer::Timer15:
break;
}

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@ -68,6 +68,10 @@ static inline constexpr timer_io_channels_t initIOTimerGPIOInOut(Timer::TimerCha
gpio_af = GPIO_AF3;
break;
case Timer::Timer15:
gpio_af = GPIO_AF4;
break;
case Timer::Timer13:
case Timer::Timer14:
gpio_af = GPIO_AF9;
@ -259,6 +263,17 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
ret.vectorno = STM32_IRQ_TIM14;
#ifdef CONFIG_STM32_TIM14
nuttx_config_timer_enabled = true;
#endif
break;
case Timer::Timer15:
ret.base = STM32_TIM15_BASE;
ret.clock_register = STM32_RCC_APB2ENR;
ret.clock_bit = RCC_APB2ENR_TIM15EN;
ret.clock_freq = STM32_APB2_TIM15_CLKIN;
ret.vectorno = STM32_IRQ_TIM15;
#ifdef CONFIG_STM32_TIM15
nuttx_config_timer_enabled = true;
#endif
break;
}