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synced 2026-04-14 10:07:39 +08:00
Add support for Timer15 on H743 boards (#19228)
* Adds Timer15 to stm32_common, if the timer base is defined * Adds Timer15 logic for DMA and AltFunc config on stm32h7 boards * Adds TIM15 BDTR->MOE support in stm32_common timer init * Adds support for TIM15 pwm channels on Matek H743 Slim
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@ -111,8 +111,8 @@
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/* PWM
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*/
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#define DIRECT_PWM_OUTPUT_CHANNELS 8
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#define DIRECT_INPUT_TIMER_CHANNELS 8
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#define DIRECT_PWM_OUTPUT_CHANNELS 10
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#define DIRECT_INPUT_TIMER_CHANNELS 10
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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@ -37,7 +37,7 @@ constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
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initIOTimer(Timer::Timer3, DMA{DMA::Index1, DMA::Stream2, DMA::Channel5}),
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initIOTimer(Timer::Timer5, DMA{DMA::Index1, DMA::Stream0, DMA::Channel6}),
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initIOTimer(Timer::Timer4, DMA{DMA::Index1, DMA::Stream6, DMA::Channel2}),
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// initIOTimer(Timer::Timer15),
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initIOTimer(Timer::Timer15),
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};
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constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
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@ -49,10 +49,10 @@ constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
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initIOTimerChannel(io_timers, {Timer::Timer5, Timer::Channel4}, {GPIO::PortA, GPIO::Pin3}),
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initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel1}, {GPIO::PortD, GPIO::Pin12}),
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initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel2}, {GPIO::PortD, GPIO::Pin13}),
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initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel1}, {GPIO::PortE, GPIO::Pin5}),
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initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel2}, {GPIO::PortE, GPIO::Pin6}),
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// initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel3}, {GPIO::PortD, GPIO::Pin14}),
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// initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel4}, {GPIO::PortD, GPIO::Pin15}),
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// initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel1}, {GPIO::PortE, GPIO::Pin5}),
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// initIOTimerChannel(io_timers, {Timer::Timer15, Timer::Channel2}, {GPIO::PortE, GPIO::Pin6}),
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};
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constexpr io_timers_channel_mapping_t io_timers_channel_mapping =
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@ -91,6 +91,9 @@ enum Timer {
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Timer12,
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Timer13,
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Timer14,
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#ifdef STM32_TIM15_BASE
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Timer15
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#endif
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};
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enum Channel {
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Channel1 = 1,
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@ -153,6 +156,11 @@ static inline constexpr uint32_t timerBaseRegister(Timer::Timer timer)
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case Timer::Timer14: return STM32_TIM14_BASE;
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#endif
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#ifdef STM32_TIM15_BASE
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case Timer::Timer15: return STM32_TIM15_BASE;
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#endif
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default: break;
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}
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@ -644,7 +644,12 @@ int io_timer_init_timer(unsigned timer, io_timer_channel_mode_t mode)
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rCCER(timer) = 0;
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rDCR(timer) = 0;
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if ((io_timers[timer].base == STM32_TIM1_BASE) || (io_timers[timer].base == STM32_TIM8_BASE)) {
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if ((io_timers[timer].base == STM32_TIM1_BASE)
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|| (io_timers[timer].base == STM32_TIM8_BASE)
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#ifdef STM32_TIM15_BASE
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|| (io_timers[timer].base == STM32_TIM15_BASE)
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#endif
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) {
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/* master output enable = on */
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@ -85,6 +85,7 @@ static inline constexpr uint32_t getTimerUpdateDMAMap(Timer::Timer timer, const
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case Timer::Timer12:
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case Timer::Timer13:
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case Timer::Timer14:
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case Timer::Timer15:
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break;
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}
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@ -68,6 +68,10 @@ static inline constexpr timer_io_channels_t initIOTimerGPIOInOut(Timer::TimerCha
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gpio_af = GPIO_AF3;
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break;
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case Timer::Timer15:
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gpio_af = GPIO_AF4;
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break;
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case Timer::Timer13:
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case Timer::Timer14:
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gpio_af = GPIO_AF9;
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@ -259,6 +263,17 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, DMA dshot_dm
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ret.vectorno = STM32_IRQ_TIM14;
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#ifdef CONFIG_STM32_TIM14
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nuttx_config_timer_enabled = true;
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#endif
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break;
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case Timer::Timer15:
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ret.base = STM32_TIM15_BASE;
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ret.clock_register = STM32_RCC_APB2ENR;
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ret.clock_bit = RCC_APB2ENR_TIM15EN;
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ret.clock_freq = STM32_APB2_TIM15_CLKIN;
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ret.vectorno = STM32_IRQ_TIM15;
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#ifdef CONFIG_STM32_TIM15
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nuttx_config_timer_enabled = true;
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#endif
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break;
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}
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