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wip: squashed patch

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This commit is contained in:
Thomas Stastny
2022-12-19 13:12:42 +01:00
parent 283aad01fd
commit ebe0a4095c
659 changed files with 23727 additions and 8530 deletions
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platforms/nuttx/NuttX/nuttx
+1 -1
Submodule platforms/nuttx/NuttX/nuttx updated: 91bece51af...6bafcb22b7
platforms/nuttx/init/stm32f7/rc.board_arch_defaults
+4 -4
View File
@@ -4,10 +4,10 @@
#------------------------------------------------------------------------------
# Multi-EKF (across IMUs only)
param set-default EKF2_MULTI_IMU 3
param set-default SENS_IMU_MODE 0
param set-default EKF2_MULTI_MAG 0
param set-default SENS_MAG_MODE 1
#param set-default EKF2_MULTI_IMU 3
#param set-default SENS_IMU_MODE 0
#param set-default EKF2_MULTI_MAG 0
#param set-default SENS_MAG_MODE 1
param set-default -s IMU_GYRO_FFT_EN 1
platforms/nuttx/init/stm32h7/rc.board_arch_defaults
+4 -4
View File
@@ -4,10 +4,10 @@
#------------------------------------------------------------------------------
# Multi-EKF
param set-default EKF2_MULTI_IMU 3
param set-default SENS_IMU_MODE 0
param set-default EKF2_MULTI_MAG 3
param set-default SENS_MAG_MODE 0
#param set-default EKF2_MULTI_IMU 3
#param set-default SENS_IMU_MODE 0
#param set-default EKF2_MULTI_MAG 3
#param set-default SENS_MAG_MODE 0
param set-default -s IMU_GYRO_FFT_EN 1
platforms/nuttx/src/px4/common/board_crashdump.c
+2 -2
View File
@@ -38,10 +38,10 @@
* and hardfault log support
*/
#ifdef CONFIG_BOARD_CRASHDUMP
#include <board_config.h>
#ifdef CONFIG_BOARD_CRASHDUMP
#include <stdio.h>
#include <stdbool.h>
#include <string.h>
platforms/nuttx/src/px4/common/cdc_acm_check.cpp
+2
View File
@@ -31,6 +31,8 @@
*
****************************************************************************/
#include <board_config.h>
#if defined(CONFIG_SYSTEM_CDCACM)
__BEGIN_DECLS
#include <arch/board/board.h>
platforms/nuttx/src/px4/common/gpio/mcp23009/CMakeLists.txt
+1
View File
@@ -33,3 +33,4 @@
px4_add_library(platform_gpio_mcp23009
mcp23009.cpp
)
target_link_libraries(platform_gpio_mcp23009 PRIVATE drivers__device) # device::I2C
platforms/nuttx/src/px4/common/include/px4_platform/board_determine_hw_info.h
+2 -1
View File
@@ -32,9 +32,10 @@
****************************************************************************/
#pragma once
#include "micro_hal.h"
__BEGIN_DECLS
#define HW_INFO_SUFFIX "%0" STRINGIFY(HW_INFO_VER_DIGITS) "x%0" STRINGIFY(HW_INFO_REV_DIGITS) "x"
/************************************************************************************
* Name: board_determine_hw_info
*
platforms/nuttx/src/px4/common/include/px4_platform/board_hw_eeprom_rev_ver.h
+112
View File
@@ -0,0 +1,112 @@
/****************************************************************************
*
* Copyright (c) 2021 PX4 Development Team. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name PX4 nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#pragma once
#include <errno.h>
#define HW_ID_EEPROM 0x7 //!< Get hw_info from EEPROM
#define HW_EEPROM_ID_MIN 0x10 //!< Minimum supported id (version/revision)
#pragma pack(push, 1)
typedef struct {
uint16_t id;
} mtd_mft_t;
typedef struct {
mtd_mft_t version;
uint16_t hw_extended_id; //<! HW version for MTD_MFT_VER, HW revision for MTD_MFT_REV
uint16_t crc;
} mtd_mft_v0_t;
typedef struct {
mtd_mft_t version;
uint16_t hw_extended_id;
//{device tree overlay}
uint16_t crc;
} mtd_mft_v1_t;
#pragma pack(pop)
#define MTD_MFT_v0 0U //<! EEPROM MTD MFT structure version 0
#define MTD_MFT_v1 1U //<! EEPROM MTD MFT structure version 1
#define MTD_MFT_OFFSET 0 //<! Offset in EEPROM where mtd_mft data starts
__BEGIN_DECLS
/************************************************************************************
* Name: board_set_eeprom_hw_info
*
* Description:
* Function for writing hardware info to EEPROM
*
* Input Parameters:
* *path - path to mtd_mft
* *mtd_mft_unk - pointer to mtd_mft to write hw_info
*
* Returned Value:
* 0 - Successful storing to EEPROM
* -1 - Error while storing to EEPROM
*
************************************************************************************/
#if !defined(BOARD_HAS_SIMPLE_HW_VERSIONING) && defined(BOARD_HAS_VERSIONING)
__EXPORT int board_set_eeprom_hw_info(const char *path, mtd_mft_t *mtd_mft_unk);
#else
static inline int board_set_eeprom_hw_info(const char *path, mtd_mft_t *mtd_mft_unk) { return -ENOSYS; }
#endif
/************************************************************************************
* Name: board_get_eeprom_hw_info
*
* Description:
* Function for reading hardware info from EEPROM
*
* Output Parameters:
* *mtd_mft - pointer to mtd_mft to read hw_info
*
* Returned Value:
* 0 - Successful reading from EEPROM
* -1 - Error while reading from EEPROM
*
************************************************************************************/
#if !defined(BOARD_HAS_SIMPLE_HW_VERSIONING) && defined(BOARD_HAS_VERSIONING)
__EXPORT int board_get_eeprom_hw_info(const char *path, mtd_mft_t *mtd_mft);
#else
static inline int board_get_eeprom_hw_info(const char *path, mtd_mft_t *mtd_mft) { return -ENOSYS; }
#endif
__END_DECLS
platforms/nuttx/src/px4/common/px4_24xxxx_mtd.c
+17 -15
View File
@@ -70,6 +70,7 @@
#include <nuttx/mtd/mtd.h>
#include <perf/perf_counter.h>
#include <board_config.h>
/************************************************************************************
* Pre-processor Definitions
@@ -195,11 +196,8 @@ int at24c_nuke(void);
* Private Data
************************************************************************************/
/* At present, only a single AT24 part is supported. In this case, a statically
* allocated state structure may be used.
*/
static struct at24c_dev_s g_at24c;
static uint8_t number_of_instances = 0u;
static struct at24c_dev_s g_at24c[BOARD_MTD_NUM_EEPROM];
/************************************************************************************
* Private Functions
@@ -262,7 +260,7 @@ void at24c_test(void)
unsigned errors = 0;
for (count = 0; count < 10000; count++) {
ssize_t result = at24c_bread(&g_at24c.mtd, 0, 1, buf);
ssize_t result = at24c_bread(&g_at24c[0].mtd, 0, 1, buf);
if (result == ERROR) {
if (errors++ > 2) {
@@ -538,13 +536,17 @@ static int at24c_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
* other functions (such as a block or character driver front end).
*
************************************************************************************/
FAR struct mtd_dev_s *px4_at24c_initialize(FAR struct i2c_master_s *dev,
uint8_t address)
int px4_at24c_initialize(FAR struct i2c_master_s *dev,
uint8_t address, FAR struct mtd_dev_s **mtd_dev)
{
if (number_of_instances >= BOARD_MTD_NUM_EEPROM) {
return -ENOMEM;
}
FAR struct at24c_dev_s *priv;
finfo("dev: %p\n", dev);
finfo("dev: %p, mtd_dev %p\n", dev, mtd_dev);
/* Allocate a state structure (we allocate the structure instead of using
* a fixed, static allocation so that we can handle multiple FLASH devices.
@@ -553,7 +555,7 @@ FAR struct mtd_dev_s *px4_at24c_initialize(FAR struct i2c_master_s *dev,
* to be extended to handle multiple FLASH parts on the same I2C bus.
*/
priv = &g_at24c;
priv = &g_at24c[number_of_instances];
if (priv) {
/* Initialize the allocated structure */
@@ -608,13 +610,13 @@ FAR struct mtd_dev_s *px4_at24c_initialize(FAR struct i2c_master_s *dev,
priv->perf_resets_retries = NULL;
priv->perf_errors = NULL;
return NULL;
return ret;
}
/* Return the implementation-specific state structure as the MTD device */
*mtd_dev = (FAR struct mtd_dev_s *)priv;
++number_of_instances;
finfo("Return %p\n", priv);
return (FAR struct mtd_dev_s *)priv;
return 0;
}
/*
@@ -622,5 +624,5 @@ FAR struct mtd_dev_s *px4_at24c_initialize(FAR struct i2c_master_s *dev,
*/
int at24c_nuke(void)
{
return at24c_eraseall(&g_at24c);
return at24c_eraseall(&g_at24c[0]);
}
platforms/nuttx/src/px4/common/px4_manifest.cpp
+7 -5
View File
@@ -58,7 +58,9 @@ static const px4_mft_entry_s mtd_mft = {
static const px4_mft_s default_mft = {
.nmft = 1,
.mfts = &mtd_mft
.mfts = {
&mtd_mft
}
};
@@ -73,9 +75,9 @@ __EXPORT int px4_mft_configure(const px4_mft_s *mft)
if (mft != nullptr) {
for (uint32_t m = 0; m < mft->nmft; m++) {
switch (mft->mfts[m].type) {
switch (mft->mfts[m]->type) {
case MTD:
px4_mtd_config(static_cast<const px4_mtd_manifest_t *>(mft->mfts[m].pmft));
px4_mtd_config(static_cast<const px4_mtd_manifest_t *>(mft->mfts[m]->pmft));
break;
case MFT:
@@ -95,10 +97,10 @@ __EXPORT int px4_mft_query(const px4_mft_s *mft, px4_manifest_types_e type,
if (mft != nullptr) {
for (uint32_t m = 0; m < mft->nmft; m++) {
if (mft->mfts[m].type == type)
if (mft->mfts[m]->type == type)
switch (type) {
case MTD:
return px4_mtd_query(sub, val);
return px4_mtd_query(sub, val, nullptr);
break;
case MFT:
platforms/nuttx/src/px4/common/px4_mtd.cpp
+59 -47
View File
@@ -64,7 +64,8 @@ extern "C" {
off_t firstblock, off_t nblocks);
}
static int num_instances = 0;
static mtd_instance_s *instances = nullptr;
static int total_blocks = 0;
static mtd_instance_s *instances[MAX_MTD_INSTANCES] = {};
static int ramtron_attach(mtd_instance_s &instance)
@@ -147,15 +148,19 @@ static int at24xxx_attach(mtd_instance_s &instance)
/* start the MTD driver, attempt 5 times */
for (int i = 0; i < 5; i++) {
instance.mtd_dev = px4_at24c_initialize(i2c, PX4_I2C_DEVID_ADDR(instance.devid));
int ret_val = px4_at24c_initialize(i2c, PX4_I2C_DEVID_ADDR(instance.devid), &(instance.mtd_dev));
if (instance.mtd_dev) {
if (ret_val == 0) {
/* abort on first valid result */
if (i > 0) {
PX4_WARN("EEPROM needed %d attempts to attach", i + 1);
}
break;
} else if (ret_val == -ENOMEM) {
PX4_ERR("Number of at24c EEPROM instances reached the board limit of %d", BOARD_MTD_NUM_EEPROM);
break;
}
}
@@ -230,7 +235,7 @@ ssize_t px4_mtd_get_partition_size(const mtd_instance_s *instance, const char *p
return instance->partition_block_counts[partn] * blocksize;
}
mtd_instance_s *px4_mtd_get_instances(unsigned int *count)
mtd_instance_s **px4_mtd_get_instances(unsigned int *count)
{
*count = num_instances;
return instances;
@@ -292,62 +297,69 @@ int px4_mtd_config(const px4_mtd_manifest_t *mft_mtd)
}
rv = -ENOMEM;
int total_blocks = 0;
uint8_t total_new_instances = mtd_list->nconfigs + num_instances;
instances = new mtd_instance_s[mtd_list->nconfigs];
if (instances == nullptr) {
memoryout:
PX4_ERR("failed to allocate memory!");
if (total_new_instances >= MAX_MTD_INSTANCES) {
PX4_ERR("reached limit of max %u mtd instances", MAX_MTD_INSTANCES);
return rv;
}
for (uint32_t i = 0; i < mtd_list->nconfigs; i++) {
for (uint8_t i = num_instances, num_entry = 0u; i < total_new_instances; ++i, ++num_entry) {
instances[i] = new mtd_instance_s;
if (instances == nullptr) {
memoryout:
PX4_ERR("failed to allocate memory!");
return rv;
}
num_instances++;
uint32_t nparts = mtd_list->entries[i]->npart;
instances[i].devid = mtd_list->entries[i]->device->devid;
instances[i].mtd_dev = nullptr;
instances[i].n_partitions_current = 0;
uint32_t nparts = mtd_list->entries[num_entry]->npart;
instances[i]->devid = mtd_list->entries[num_entry]->device->devid;
instances[i]->mtd_dev = nullptr;
instances[i]->n_partitions_current = 0;
rv = -ENOMEM;
instances[i].part_dev = new FAR struct mtd_dev_s *[nparts];
instances[i]->part_dev = new FAR struct mtd_dev_s *[nparts];
if (instances[i].part_dev == nullptr) {
if (instances[i]->part_dev == nullptr) {
goto memoryout;
}
instances[i].partition_block_counts = new int[nparts];
instances[i]->partition_block_counts = new int[nparts];
if (instances[i].partition_block_counts == nullptr) {
if (instances[i]->partition_block_counts == nullptr) {
goto memoryout;
}
instances[i].partition_types = new int[nparts];
instances[i]->partition_types = new int[nparts];
if (instances[i].partition_types == nullptr) {
if (instances[i]->partition_types == nullptr) {
goto memoryout;
}
instances[i].partition_names = new const char *[nparts];
instances[i]->partition_names = new const char *[nparts];
if (instances[i].partition_names == nullptr) {
if (instances[i]->partition_names == nullptr) {
goto memoryout;
}
for (uint32_t p = 0; p < nparts; p++) {
instances[i].partition_block_counts[p] = mtd_list->entries[i]->partd[p].nblocks;
instances[i].partition_names[p] = mtd_list->entries[i]->partd[p].path;
instances[i].partition_types[p] = mtd_list->entries[i]->partd[p].type;
instances[i]->partition_block_counts[p] = mtd_list->entries[num_entry]->partd[p].nblocks;
instances[i]->partition_names[p] = mtd_list->entries[num_entry]->partd[p].path;
instances[i]->partition_types[p] = mtd_list->entries[num_entry]->partd[p].type;
}
if (mtd_list->entries[i]->device->bus_type == px4_mft_device_t::I2C) {
rv = at24xxx_attach(instances[i]);
if (mtd_list->entries[num_entry]->device->bus_type == px4_mft_device_t::I2C) {
rv = at24xxx_attach(*instances[i]);
} else if (mtd_list->entries[i]->device->bus_type == px4_mft_device_t::SPI) {
rv = ramtron_attach(instances[i]);
} else if (mtd_list->entries[num_entry]->device->bus_type == px4_mft_device_t::SPI) {
rv = ramtron_attach(*instances[i]);
} else if (mtd_list->entries[i]->device->bus_type == px4_mft_device_t::ONCHIP) {
instances[i].n_partitions_current++;
} else if (mtd_list->entries[num_entry]->device->bus_type == px4_mft_device_t::ONCHIP) {
instances[i]->n_partitions_current++;
return 0;
}
@@ -362,7 +374,7 @@ memoryout:
unsigned int nblocks;
unsigned int partsize;
rv = px4_mtd_get_geometry(&instances[i], &blocksize, &erasesize, &neraseblocks, &blkpererase, &nblocks, &partsize);
rv = px4_mtd_get_geometry(instances[i], &blocksize, &erasesize, &neraseblocks, &blkpererase, &nblocks, &partsize);
if (rv != 0) {
goto errout;
@@ -375,13 +387,13 @@ memoryout:
unsigned long offset;
unsigned part;
for (offset = 0, part = 0; rv == 0 && part < nparts; offset += instances[i].partition_block_counts[part], part++) {
for (offset = 0, part = 0; rv == 0 && part < nparts; offset += instances[i]->partition_block_counts[part], part++) {
/* Create the partition */
instances[i].part_dev[part] = mtd_partition(instances[i].mtd_dev, offset, instances[i].partition_block_counts[part]);
instances[i]->part_dev[part] = mtd_partition(instances[i]->mtd_dev, offset, instances[i]->partition_block_counts[part]);
if (instances[i].part_dev[part] == nullptr) {
if (instances[i]->part_dev[part] == nullptr) {
PX4_ERR("mtd_partition failed. offset=%lu nblocks=%u",
offset, nblocks);
rv = -ENOSPC;
@@ -392,7 +404,7 @@ memoryout:
snprintf(blockname, sizeof(blockname), "/dev/mtdblock%d", total_blocks);
rv = ftl_initialize(total_blocks, instances[i].part_dev[part]);
rv = ftl_initialize(total_blocks, instances[i]->part_dev[part]);
if (rv < 0) {
PX4_ERR("ftl_initialize %s failed: %d", blockname, rv);
@@ -403,14 +415,14 @@ memoryout:
/* Now create a character device on the block device */
rv = bchdev_register(blockname, instances[i].partition_names[part], false);
rv = bchdev_register(blockname, instances[i]->partition_names[part], false);
if (rv < 0) {
PX4_ERR("bchdev_register %s failed: %d", instances[i].partition_names[part], rv);
PX4_ERR("bchdev_register %s failed: %d", instances[i]->partition_names[part], rv);
goto errout;
}
instances[i].n_partitions_current++;
instances[i]->n_partitions_current++;
}
errout:
@@ -418,9 +430,9 @@ errout:
if (rv < 0) {
PX4_ERR("mtd failure: %d bus %" PRId32 " address %" PRId32 " class %d",
rv,
PX4_I2C_DEVID_BUS(instances[i].devid),
PX4_I2C_DEVID_ADDR(instances[i].devid),
mtd_list->entries[i]->partd[instances[i].n_partitions_current].type);
PX4_I2C_DEVID_BUS(instances[i]->devid),
PX4_I2C_DEVID_ADDR(instances[i]->devid),
mtd_list->entries[num_entry]->partd[instances[i]->n_partitions_current].type);
break;
}
}
@@ -452,14 +464,14 @@ __EXPORT int px4_mtd_query(const char *sub, const char *val, const char **get)
rv = -ENOENT;
for (int i = 0; i < num_instances; i++) {
for (unsigned n = 0; n < instances[i].n_partitions_current; n++) {
if (instances[i].partition_types[n] == key) {
for (unsigned n = 0; n < instances[i]->n_partitions_current; n++) {
if (instances[i]->partition_types[n] == key) {
if (get != nullptr && val == nullptr) {
*get = instances[i].partition_names[n];
*get = instances[i]->partition_names[n];
return 0;
}
if (val != nullptr && strcmp(instances[i].partition_names[n], val) == 0) {
if (val != nullptr && strcmp(instances[i]->partition_names[n], val) == 0) {
return 0;
}
}
platforms/nuttx/src/px4/common/usr_mcu_version.cpp
+3 -1
View File
@@ -37,14 +37,16 @@
* Implementation of generic user-space version API
*/
#include <systemlib/px4_macros.h>
#include <px4_platform_common/px4_config.h>
#include <px4_platform_common/defines.h>
#include <px4_platform/board_determine_hw_info.h>
#include "board_config.h"
static int hw_version = 0;
static int hw_revision = 0;
static char hw_info[] = HW_INFO_INIT;
static char hw_info[] = HW_INFO_INIT_PREFIX HW_INFO_SUFFIX;
__EXPORT const char *board_get_hw_type_name(void)
{
platforms/nuttx/src/px4/nxp/imxrt/board_hw_info/board_hw_rev_ver.c
+15 -7
View File
@@ -1,6 +1,6 @@
/****************************************************************************
*
* Copyright (C) 2019 PX4 Development Team. All rights reserved.
* Copyright (C) 2019, 2022 PX4 Development Team. All rights reserved.
* Author: @author David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
@@ -52,12 +52,16 @@
# define GPIO_HW_REV_DRIVE GPIO_HW_VER_REV_DRIVE
# define GPIO_HW_VER_DRIVE GPIO_HW_VER_REV_DRIVE
# endif
#define HW_INFO_SIZE (int) arraySize(HW_INFO_INIT_PREFIX) + HW_INFO_VER_DIGITS + HW_INFO_REV_DIGITS
/****************************************************************************
* Private Data
****************************************************************************/
static int hw_version = 0;
static int hw_revision = 0;
static char hw_info[] = HW_INFO_INIT;
static char hw_info[HW_INFO_SIZE] = {0};
/****************************************************************************
* Protected Functions
@@ -193,7 +197,7 @@ static int read_id_dn(int *id, uint32_t gpio_drive, uint32_t gpio_sense, int adc
/* Are Resistors in place ?*/
uint32_t dn_sum = 0;
uint16_t dn = 0;
uint32_t dn = 0;
if ((high ^ low) && low == 0) {
/* Yes - Fire up the ADC (it has once control) */
@@ -204,14 +208,14 @@ static int read_id_dn(int *id, uint32_t gpio_drive, uint32_t gpio_sense, int adc
for (unsigned av = 0; av < samples; av++) {
dn = px4_arch_adc_sample(HW_REV_VER_ADC_BASE, adc_channel);
if (dn == 0xffff) {
if (dn == UINT32_MAX) {
break;
}
dn_sum += dn;
}
if (dn != 0xffff) {
if (dn != UINT32_MAX) {
*id = dn_sum / samples;
rv = OK;
}
@@ -338,8 +342,12 @@ int board_determine_hw_info()
int rv = determine_hw_info(&hw_revision, &hw_version);
if (rv == OK) {
hw_info[HW_INFO_INIT_REV] = board_get_hw_revision() + '0';
hw_info[HW_INFO_INIT_VER] = board_get_hw_version() + '0';
if (rv == OK) {
snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_SUFFIX, hw_version, hw_revision);
}
}
return rv;
platforms/nuttx/src/px4/nxp/imxrt/version/board_identity.c
+4 -5
View File
@@ -100,15 +100,14 @@ int board_get_uuid32_formated(char *format_buffer, int size,
{
uuid_uint32_t uuid;
board_get_uuid32(uuid);
int offset = 0;
int sep_size = seperator ? strlen(seperator) : 0;
for (unsigned int i = 0; i < PX4_CPU_UUID_WORD32_LENGTH; i++) {
offset += snprintf(&format_buffer[offset], size - ((i * 2 * sizeof(uint32_t)) + 1), format, uuid[i]);
for (unsigned i = 0; (offset < size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH); i++) {
offset += snprintf(&format_buffer[offset], size - offset, format, uuid[i]);
if (sep_size && i < PX4_CPU_UUID_WORD32_LENGTH - 1) {
strcat(&format_buffer[offset], seperator);
if (sep_size && (offset < size - sep_size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH - 1)) {
strncat(&format_buffer[offset], seperator, size - offset);
offset += sep_size;
}
}
platforms/nuttx/src/px4/nxp/kinetis/version/board_identity.c
+4 -5
View File
@@ -71,15 +71,14 @@ int board_get_uuid32_formated(char *format_buffer, int size,
{
uuid_uint32_t uuid;
board_get_uuid32(uuid);
int offset = 0;
int sep_size = seperator ? strlen(seperator) : 0;
for (unsigned int i = 0; i < PX4_CPU_UUID_WORD32_LENGTH; i++) {
offset += snprintf(&format_buffer[offset], size - ((i * 2 * sizeof(uint32_t)) + 1), format, uuid[i]);
for (unsigned i = 0; (offset < size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH); i++) {
offset += snprintf(&format_buffer[offset], size - offset, format, uuid[i]);
if (sep_size && i < PX4_CPU_UUID_WORD32_LENGTH - 1) {
strcat(&format_buffer[offset], seperator);
if (sep_size && (offset < size - sep_size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH - 1)) {
strncat(&format_buffer[offset], seperator, size - offset);
offset += sep_size;
}
}
platforms/nuttx/src/px4/nxp/s32k1xx/version/board_identity.c
+4 -5
View File
@@ -71,15 +71,14 @@ int board_get_uuid32_formated(char *format_buffer, int size,
{
uuid_uint32_t uuid;
board_get_uuid32(uuid);
int offset = 0;
int sep_size = seperator ? strlen(seperator) : 0;
for (unsigned int i = 0; i < PX4_CPU_UUID_WORD32_LENGTH; i++) {
offset += snprintf(&format_buffer[offset], size - ((i * 2 * sizeof(uint32_t)) + 1), format, uuid[i]);
for (unsigned i = 0; (offset < size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH); i++) {
offset += snprintf(&format_buffer[offset], size - offset, format, uuid[i]);
if (sep_size && i < PX4_CPU_UUID_WORD32_LENGTH - 1) {
strcat(&format_buffer[offset], seperator);
if (sep_size && (offset < size - sep_size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH - 1)) {
strncat(&format_buffer[offset], seperator, size - offset);
offset += sep_size;
}
}
platforms/nuttx/src/px4/rpi/rpi_common/version/board_identity.c
+3 -3
View File
@@ -65,11 +65,11 @@ int board_get_uuid32_formated(char *format_buffer, int size,
int offset = 0;
int sep_size = seperator ? strlen(seperator) : 0;
for (unsigned i = 0; i < PX4_CPU_UUID_WORD32_LENGTH; i++) {
for (unsigned i = 0; (offset < size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH); i++) {
offset += snprintf(&format_buffer[offset], size - offset, format, uuid[i]);
if (sep_size && i < PX4_CPU_UUID_WORD32_LENGTH - 1) {
strcat(&format_buffer[offset], seperator);
if (sep_size && (offset < size - sep_size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH - 1)) {
strncat(&format_buffer[offset], seperator, size - offset);
offset += sep_size;
}
}
platforms/nuttx/src/px4/stm/stm32_common/board_hw_info/CMakeLists.txt
+1 -1
View File
@@ -34,4 +34,4 @@
px4_add_library(arch_board_hw_info
board_hw_rev_ver.c
)
target_link_libraries(arch_board_hw_info PRIVATE arch_adc)
target_link_libraries(arch_board_hw_info PRIVATE arch_adc systemlib)
platforms/nuttx/src/px4/stm/stm32_common/board_hw_info/board_hw_rev_ver.c
+182 -8
View File
@@ -1,6 +1,6 @@
/****************************************************************************
*
* Copyright (C) 2017 PX4 Development Team. All rights reserved.
* Copyright (C) 2017, 2022 PX4 Development Team. All rights reserved.
* Author: @author David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
@@ -41,10 +41,14 @@
#include <px4_arch/adc.h>
#include <px4_platform_common/micro_hal.h>
#include <px4_platform_common/px4_config.h>
#include <px4_platform_common/px4_manifest.h>
#include <px4_platform/board_determine_hw_info.h>
#include <px4_platform/board_hw_eeprom_rev_ver.h>
#include <stdio.h>
#include <fcntl.h>
#include <board_config.h>
#include <systemlib/crc.h>
#include <systemlib/px4_macros.h>
#if defined(BOARD_HAS_HW_VERSIONING)
@@ -53,12 +57,16 @@
# define GPIO_HW_REV_DRIVE GPIO_HW_VER_REV_DRIVE
# define GPIO_HW_VER_DRIVE GPIO_HW_VER_REV_DRIVE
# endif
#define HW_INFO_SIZE (int) arraySize(HW_INFO_INIT_PREFIX) + HW_INFO_VER_DIGITS + HW_INFO_REV_DIGITS
/****************************************************************************
* Private Data
****************************************************************************/
static int hw_version = 0;
static int hw_revision = 0;
static char hw_info[] = HW_INFO_INIT;
static char hw_info[HW_INFO_SIZE] = {0};
/****************************************************************************
* Protected Functions
@@ -437,18 +445,184 @@ __EXPORT int board_get_hw_revision()
int board_determine_hw_info()
{
// Read ADC jumpering hw_info
int rv = determine_hw_info(&hw_revision, &hw_version);
if (rv == OK) {
hw_info[HW_INFO_INIT_REV] = board_get_hw_revision() < 10 ?
board_get_hw_revision() + '0' :
board_get_hw_revision() + 'a' - 10;
hw_info[HW_INFO_INIT_VER] = board_get_hw_version() < 10 ?
board_get_hw_version() + '0' :
board_get_hw_version() + 'a' - 10;
// MFT supported?
const char *path;
int rvmft = px4_mtd_query("MTD_MFT_VER", NULL, &path);
if (rvmft == OK && path != NULL && hw_version == HW_ID_EEPROM) {
mtd_mft_v0_t mtd_mft = {MTD_MFT_v0};
rv = board_get_eeprom_hw_info(path, (mtd_mft_t *)&mtd_mft);
if (rv == OK) {
hw_version = mtd_mft.hw_extended_id;
}
}
path = NULL;
rvmft = px4_mtd_query("MTD_MFT_REV", NULL, &path);
if (rvmft == OK && path != NULL && hw_revision == HW_ID_EEPROM) {
mtd_mft_v0_t mtd_mft = {MTD_MFT_v0};
rv = board_get_eeprom_hw_info(path, (mtd_mft_t *)&mtd_mft);
if (rv == OK) {
hw_revision = mtd_mft.hw_extended_id;
}
}
}
if (rv == OK) {
snprintf(hw_info, sizeof(hw_info), HW_INFO_INIT_PREFIX HW_INFO_SUFFIX, hw_version, hw_revision);
}
return rv;
}
/************************************************************************************
* Name: board_set_eeprom_hw_info
*
* Description:
* Function for writing hardware info to EEPROM
*
* Input Parameters:
* *mtd_mft_unk - pointer to mtd_mft to write hw_info
*
* Returned Value:
* 0 - Successful storing to EEPROM
* -1 - Error while storing to EEPROM
*
************************************************************************************/
int board_set_eeprom_hw_info(const char *path, mtd_mft_t *mtd_mft_unk)
{
if (mtd_mft_unk == NULL || path == NULL) {
return -EINVAL;
}
// Later this will be a demux on type
if (mtd_mft_unk->id != MTD_MFT_v0) {
printf("Version is: %d, Only mft version %d is supported\n", mtd_mft_unk->id, MTD_MFT_v0);
return -EINVAL;
}
mtd_mft_v0_t *mtd_mft = (mtd_mft_v0_t *)mtd_mft_unk;
if (mtd_mft->hw_extended_id < HW_EEPROM_ID_MIN) {
printf("hardware version for EEPROM must be greater than %x\n", HW_EEPROM_ID_MIN);
return -EINVAL;
}
int fd = open(path, O_WRONLY);
if (fd < 0) {
return -errno;
}
int ret_val = OK;
mtd_mft->crc = crc16_signature(CRC16_INITIAL, sizeof(*mtd_mft) - sizeof(mtd_mft->crc), (uint8_t *) mtd_mft);
if (
(MTD_MFT_OFFSET != lseek(fd, MTD_MFT_OFFSET, SEEK_SET)) ||
(sizeof(*mtd_mft) != write(fd, mtd_mft, sizeof(*mtd_mft)))
) {
ret_val = -errno;
}
close(fd);
return ret_val;
}
/************************************************************************************
* Name: board_get_eeprom_hw_info
*
* Description:
* Function for reading hardware info from EEPROM
*
* Output Parameters:
* *mtd_mft - pointer to mtd_mft to read hw_info
*
* Returned Value:
* 0 - Successful reading from EEPROM
* -1 - Error while reading from EEPROM
*
************************************************************************************/
__EXPORT int board_get_eeprom_hw_info(const char *path, mtd_mft_t *mtd_mft)
{
if (mtd_mft == NULL || path == NULL) {
return -EINVAL;
}
int fd = open(path, O_RDONLY);
if (fd < 0) {
return -errno;
}
int ret_val = OK;
mtd_mft_t format_version = {-1};
if (
(MTD_MFT_OFFSET != lseek(fd, MTD_MFT_OFFSET, SEEK_SET)) ||
(sizeof(format_version) != read(fd, &format_version, sizeof(format_version)))
) {
ret_val = -errno;
} else if (format_version.id != mtd_mft->id) {
ret_val = -EPROTO;
} else {
uint16_t mft_size = 0;
switch (format_version.id) {
case MTD_MFT_v0: mft_size = sizeof(mtd_mft_v0_t); break;
case MTD_MFT_v1: mft_size = sizeof(mtd_mft_v1_t); break;
default:
printf("[boot] Error, unknown version %d of mtd_mft in EEPROM\n", format_version.id);
ret_val = -1;
break;
}
if (ret_val == OK) {
if (
(MTD_MFT_OFFSET != lseek(fd, MTD_MFT_OFFSET, SEEK_SET)) ||
(mft_size != read(fd, mtd_mft, mft_size))
) {
ret_val = -errno;
} else {
union {
uint16_t w;
uint8_t b[2];
} crc;
uint8_t *bytes = (uint8_t *) mtd_mft;
crc.w = crc16_signature(CRC16_INITIAL, mft_size - sizeof(crc), bytes);
uint8_t *eeprom_crc = &bytes[mft_size - sizeof(crc)];
if (!(crc.b[0] == eeprom_crc[0] && crc.b[1] == eeprom_crc[1])) {
ret_val = -1;
}
}
}
}
close(fd);
return ret_val;
}
#endif
platforms/nuttx/src/px4/stm/stm32_common/version/board_identity.c
+3 -3
View File
@@ -89,11 +89,11 @@ int board_get_uuid32_formated(char *format_buffer, int size,
int offset = 0;
int sep_size = seperator ? strlen(seperator) : 0;
for (unsigned i = 0; i < PX4_CPU_UUID_WORD32_LENGTH; i++) {
for (unsigned i = 0; (offset < size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH); i++) {
offset += snprintf(&format_buffer[offset], size - offset, format, uuid[i]);
if (sep_size && i < PX4_CPU_UUID_WORD32_LENGTH - 1) {
strcat(&format_buffer[offset], seperator);
if (sep_size && (offset < size - sep_size - 1) && (i < PX4_CPU_UUID_WORD32_LENGTH - 1)) {
strncat(&format_buffer[offset], seperator, size - offset);
offset += sep_size;
}
}
platforms/nuttx/src/px4/stm/stm32f4/px4io_serial/px4io_serial.cpp
+39 -30
View File
@@ -225,9 +225,6 @@ ArchPX4IOSerial::ioctl(unsigned operation, unsigned &arg)
int
ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
{
// to be paranoid ensure all previous DMA transfers are cleared
_abort_dma();
_current_packet = _packet;
/* clear any lingering error status */
@@ -278,8 +275,6 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
DMA_SCR_PBURST_SINGLE |
DMA_SCR_MBURST_SINGLE);
stm32_dmastart(_tx_dma, nullptr, nullptr, false);
//rCR1 &= ~USART_CR1_TE;
//rCR1 |= USART_CR1_TE;
rCR3 |= USART_CR3_DMAT;
/* compute the deadline for a 10ms timeout */
@@ -294,6 +289,7 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
/* wait for the transaction to complete - 64 bytes @ 1.5Mbps ~426µs */
int ret;
irqstate_t irqs = enter_critical_section();
for (;;) {
ret = sem_timedwait(&_completion_semaphore, &abstime);
@@ -301,42 +297,53 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
if (ret == OK) {
/* check for DMA errors */
if (_rx_dma_status & DMA_STATUS_TEIF) {
// stream transfer error, ensure all DMA is also stopped before exiting early
_abort_dma();
/* One of 3 things has happened:
* 1. a DMA Stream error
* 2. Serial parity, framing or over run error
* 3. packet is malformed
* In all cases DMA is stopped by either HW or the ISR error service path.
*/
perf_count(_pc_dmaerrs);
ret = -EIO;
break;
}
/* check packet CRC - corrupt packet errors mean IO receive CRC error */
uint8_t crc = _current_packet->crc;
_current_packet->crc = 0;
if ((crc != crc_packet(_current_packet)) || (PKT_CODE(*_current_packet) == PKT_CODE_CORRUPT)) {
_abort_dma();
perf_count(_pc_crcerrs);
ret = -EIO;
} else {
/* successful DMA completion but the crc can still fail */
break;
}
/* successful txn (may still be reporting an error) */
break;
} else {
if (errno == ETIMEDOUT) {
/* something has broken - clear out any partial DMA state and reconfigure */
_abort_dma();
_rx_dma_status = _dma_status_inactive;
/* Wait fot at least a character time to make sure that there is no lingering
* IDLE interrupt triggering right after we re-enable interrupts for the next
* exchange
*/
usleep(100);
perf_count(_pc_timeouts);
perf_cancel(_pc_txns); /* don't count this as a transaction */
break;
}
}
if (errno == ETIMEDOUT) {
/* something has broken - clear out any partial DMA state and reconfigure */
_abort_dma();
perf_count(_pc_timeouts);
perf_cancel(_pc_txns); /* don't count this as a transaction */
break;
}
/* we might? see this for EINTR */
syslog(LOG_ERR, "unexpected ret %d/%d\n", ret, errno);
/* Loop in case we are interrupted on sleep */
}
/* reset DMA status */
_rx_dma_status = _dma_status_inactive;
leave_critical_section(irqs);
if (ret == OK) {
/* check packet CRC - corrupt packet errors mean IO receive CRC error */
uint8_t crc = _current_packet->crc;
_current_packet->crc = 0;
if ((crc != crc_packet(_current_packet)) || (PKT_CODE(*_current_packet) == PKT_CODE_CORRUPT)) {
perf_count(_pc_crcerrs);
ret = -EIO;
}
}
/* update counters */
perf_end(_pc_txns);
@@ -373,6 +380,8 @@ ArchPX4IOSerial::_do_rx_dma_callback(unsigned status)
/* disable UART DMA */
rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR);
stm32_dmastop(_tx_dma);
stm32_dmastop(_rx_dma);
/* complete now */
px4_sem_post(&_completion_semaphore);
@@ -435,7 +444,7 @@ ArchPX4IOSerial::_do_interrupt()
/* stop the receive DMA */
stm32_dmastop(_rx_dma);
/* complete the short reception */
/* error flag completion of short reception */
_do_rx_dma_callback(DMA_STATUS_TEIF);
return;
}
platforms/nuttx/src/px4/stm/stm32f7/include/px4_arch/spi_hw_description.h
+2
View File
@@ -32,6 +32,8 @@
****************************************************************************/
#pragma once
#include <board_config.h>
#if defined(CONFIG_SPI)
#include "../../../stm32_common/include/px4_arch/spi_hw_description.h"
platforms/nuttx/src/px4/stm/stm32f7/px4io_serial/px4io_serial.cpp
+42 -32
View File
@@ -237,9 +237,6 @@ ArchPX4IOSerial::ioctl(unsigned operation, unsigned &arg)
int
ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
{
// to be paranoid ensure all previous DMA transfers are cleared
_abort_dma();
_current_packet = _packet;
/* clear data that may be in the RDR and clear overrun error: */
@@ -298,8 +295,6 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
DMA_SCR_MBURST_SINGLE);
rCR3 |= USART_CR3_DMAT;
stm32_dmastart(_tx_dma, nullptr, nullptr, false);
//rCR1 &= ~USART_CR1_TE;
//rCR1 |= USART_CR1_TE;
/* compute the deadline for a 10ms timeout */
struct timespec abstime;
@@ -313,6 +308,7 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
/* wait for the transaction to complete - 64 bytes @ 1.5Mbps ~426µs */
int ret;
irqstate_t irqs = enter_critical_section();
for (;;) {
ret = sem_timedwait(&_completion_semaphore, &abstime);
@@ -320,42 +316,53 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
if (ret == OK) {
/* check for DMA errors */
if (_rx_dma_status & DMA_STATUS_TEIF) {
// stream transfer error, ensure all DMA is also stopped before exiting early
_abort_dma();
/* One of 3 things has happened:
* 1. a DMA Stream error
* 2. Serial parity, framing or over run error
* 3. packet is malformed
* In all cases DMA is stopped by either HW or the ISR error service path.
*/
perf_count(_pc_dmaerrs);
ret = -EIO;
break;
}
/* check packet CRC - corrupt packet errors mean IO receive CRC error */
uint8_t crc = _current_packet->crc;
_current_packet->crc = 0;
if ((crc != crc_packet(_current_packet)) || (PKT_CODE(*_current_packet) == PKT_CODE_CORRUPT)) {
_abort_dma();
perf_count(_pc_crcerrs);
ret = -EIO;
} else {
/* successful DMA completion but the crc can still fail */
break;
}
/* successful txn (may still be reporting an error) */
break;
} else {
if (errno == ETIMEDOUT) {
/* something has broken - clear out any partial DMA state and reconfigure */
_abort_dma();
_rx_dma_status = _dma_status_inactive;
/* Wait fot at least a character time to make sure that there is no lingering
* IDLE interrupt triggering right after we re-enable interrupts for the next
* exchange
*/
usleep(100);
perf_count(_pc_timeouts);
perf_cancel(_pc_txns); /* don't count this as a transaction */
break;
}
}
if (errno == ETIMEDOUT) {
/* something has broken - clear out any partial DMA state and reconfigure */
_abort_dma();
perf_count(_pc_timeouts);
perf_cancel(_pc_txns); /* don't count this as a transaction */
break;
}
/* we might? see this for EINTR */
syslog(LOG_ERR, "unexpected ret %d/%d\n", ret, errno);
/* Loop in case we are interrupted on sleep */
}
/* reset DMA status */
_rx_dma_status = _dma_status_inactive;
leave_critical_section(irqs);
if (ret == OK) {
/* check packet CRC - corrupt packet errors mean IO receive CRC error */
uint8_t crc = _current_packet->crc;
_current_packet->crc = 0;
if ((crc != crc_packet(_current_packet)) || (PKT_CODE(*_current_packet) == PKT_CODE_CORRUPT)) {
perf_count(_pc_crcerrs);
ret = -EIO;
}
}
/* update counters */
perf_end(_pc_txns);
@@ -393,6 +400,8 @@ ArchPX4IOSerial::_do_rx_dma_callback(unsigned status)
/* disable UART DMA */
rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR);
stm32_dmastop(_tx_dma);
stm32_dmastop(_rx_dma);
/* complete now */
px4_sem_post(&_completion_semaphore);
@@ -463,7 +472,7 @@ ArchPX4IOSerial::_do_interrupt()
/* stop the receive DMA */
stm32_dmastop(_rx_dma);
/* complete the short reception */
/* error flag completion of short reception */
_do_rx_dma_callback(DMA_STATUS_TEIF);
return;
}
@@ -482,12 +491,13 @@ ArchPX4IOSerial::_do_interrupt()
void
ArchPX4IOSerial::_abort_dma()
{
/* disable UART DMA */
rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR);
/* stop DMA */
stm32_dmastop(_tx_dma);
stm32_dmastop(_rx_dma);
/* disable UART DMA */
rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR);
/* clear data that may be in the RDR and clear overrun error: */
if (rISR & USART_ISR_RXNE) {
platforms/nuttx/src/px4/stm/stm32h7/px4io_serial/px4io_serial.cpp
+42 -33
View File
@@ -275,9 +275,6 @@ ArchPX4IOSerial::ioctl(unsigned operation, unsigned &arg)
int
ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
{
// to be paranoid ensure all previous DMA transfers are cleared
_abort_dma();
_current_packet = _packet;
/* clear data that may be in the RDR and clear overrun error: */
@@ -345,8 +342,6 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
stm32_dmasetup(_tx_dma, &txdmacfg);
rCR3 |= USART_CR3_DMAT;
stm32_dmastart(_tx_dma, nullptr, nullptr, false);
//rCR1 &= ~USART_CR1_TE;
//rCR1 |= USART_CR1_TE;
/* compute the deadline for a 10ms timeout */
struct timespec abstime;
@@ -360,6 +355,7 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
/* wait for the transaction to complete - 64 bytes @ 1.5Mbps ~426µs */
int ret;
irqstate_t irqs = enter_critical_section();
for (;;) {
ret = sem_timedwait(&_completion_semaphore, &abstime);
@@ -367,42 +363,53 @@ ArchPX4IOSerial::_bus_exchange(IOPacket *_packet)
if (ret == OK) {
/* check for DMA errors */
if (_rx_dma_status & DMA_STATUS_TEIF) {
// stream transfer error, ensure all DMA is also stopped before exiting early
_abort_dma();
/* One of 3 things has happened:
* 1. a DMA Stream error
* 2. Serial parity, framing or over run error
* 3. packet is malformed
* In all cases DMA is stopped by either HW or the ISR error service path.
*/
perf_count(_pc_dmaerrs);
ret = -EIO;
break;
}
/* check packet CRC - corrupt packet errors mean IO receive CRC error */
uint8_t crc = _current_packet->crc;
_current_packet->crc = 0;
if ((crc != crc_packet(_current_packet)) || (PKT_CODE(*_current_packet) == PKT_CODE_CORRUPT)) {
_abort_dma();
perf_count(_pc_crcerrs);
ret = -EIO;
} else {
/* successful DMA completion but the crc can still fail */
break;
}
/* successful txn (may still be reporting an error) */
break;
} else {
if (errno == ETIMEDOUT) {
/* something has broken - clear out any partial DMA state and reconfigure */
_abort_dma();
_rx_dma_status = _dma_status_inactive;
/* Wait fot at least a character time to make sure that there is no lingering
* IDLE interrupt triggering right after we re-enable interrupts for the next
* exchange
*/
usleep(100);
perf_count(_pc_timeouts);
perf_cancel(_pc_txns); /* don't count this as a transaction */
break;
}
}
if (errno == ETIMEDOUT) {
/* something has broken - clear out any partial DMA state and reconfigure */
_abort_dma();
perf_count(_pc_timeouts);
perf_cancel(_pc_txns); /* don't count this as a transaction */
break;
}
/* we might? see this for EINTR */
syslog(LOG_ERR, "unexpected ret %d/%d\n", ret, errno);
/* Loop in case we are interrupted on sleep */
}
/* reset DMA status */
_rx_dma_status = _dma_status_inactive;
leave_critical_section(irqs);
if (ret == OK) {
/* check packet CRC - corrupt packet errors mean IO receive CRC error */
uint8_t crc = _current_packet->crc;
_current_packet->crc = 0;
if ((crc != crc_packet(_current_packet)) || (PKT_CODE(*_current_packet) == PKT_CODE_CORRUPT)) {
perf_count(_pc_crcerrs);
ret = -EIO;
}
}
/* update counters */
perf_end(_pc_txns);
@@ -440,6 +447,8 @@ ArchPX4IOSerial::_do_rx_dma_callback(unsigned status)
/* disable UART DMA */
rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR);
stm32_dmastop(_tx_dma);
stm32_dmastop(_rx_dma);
/* complete now */
px4_sem_post(&_completion_semaphore);
@@ -510,7 +519,7 @@ ArchPX4IOSerial::_do_interrupt()
/* stop the receive DMA */
stm32_dmastop(_rx_dma);
/* complete the short reception */
/* error flag completion of short reception */
_do_rx_dma_callback(DMA_STATUS_TEIF);
return;
}
@@ -529,13 +538,13 @@ ArchPX4IOSerial::_do_interrupt()
void
ArchPX4IOSerial::_abort_dma()
{
/* disable UART DMA */
rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR);
/* stop DMA */
stm32_dmastop(_tx_dma);
stm32_dmastop(_rx_dma);
/* disable UART DMA */
rCR3 &= ~(USART_CR3_DMAT | USART_CR3_DMAR);
/* clear data that may be in the RDR and clear overrun error: */
if (rISR & USART_ISR_RXNE) {
(void)rRDR;