mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-11-02 09:31:36 +08:00
new Bosch BMI055 IMU driver using FIFOs and DRDY
- accel & gyro FIFOs enabled - FIFO watermark on data ready interrupt - sensor side filtering completely disabled - gyro now respects `IMU_GYRO_RATEMAX` (up to 2 kHz) - saves a few % cpu (at default rate)
This commit is contained in:
Daniel Agar
@@ -0,0 +1,467 @@
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/****************************************************************************
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*
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* Copyright (c) 2020 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#include "BMI055_Accelerometer.hpp"
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#include <ecl/geo/geo.h> // CONSTANTS_ONE_G
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using namespace time_literals;
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namespace Bosch::BMI055::Accelerometer
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{
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BMI055_Accelerometer::BMI055_Accelerometer(I2CSPIBusOption bus_option, int bus, uint32_t device, enum Rotation rotation,
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int bus_frequency, spi_mode_e spi_mode, spi_drdy_gpio_t drdy_gpio) :
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BMI055(DRV_ACC_DEVTYPE_BMI055, "BMI055_Accelerometer", bus_option, bus, device, spi_mode, bus_frequency, drdy_gpio),
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_px4_accel(get_device_id(), ORB_PRIO_DEFAULT, rotation)
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{
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if (drdy_gpio != 0) {
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_drdy_interval_perf = perf_alloc(PC_INTERVAL, MODULE_NAME"_accel: DRDY interval");
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}
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ConfigureSampleRate(_px4_accel.get_max_rate_hz());
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}
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BMI055_Accelerometer::~BMI055_Accelerometer()
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{
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perf_free(_transfer_perf);
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perf_free(_bad_register_perf);
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perf_free(_bad_transfer_perf);
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perf_free(_fifo_empty_perf);
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perf_free(_fifo_overflow_perf);
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perf_free(_fifo_reset_perf);
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perf_free(_drdy_interval_perf);
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}
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void BMI055_Accelerometer::exit_and_cleanup()
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{
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DataReadyInterruptDisable();
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I2CSPIDriverBase::exit_and_cleanup();
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}
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void BMI055_Accelerometer::print_status()
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{
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I2CSPIDriverBase::print_status();
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PX4_INFO("FIFO empty interval: %d us (%.3f Hz)", _fifo_empty_interval_us, 1e6 / _fifo_empty_interval_us);
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perf_print_counter(_transfer_perf);
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perf_print_counter(_bad_register_perf);
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perf_print_counter(_bad_transfer_perf);
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perf_print_counter(_fifo_empty_perf);
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perf_print_counter(_fifo_overflow_perf);
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perf_print_counter(_fifo_reset_perf);
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perf_print_counter(_drdy_interval_perf);
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_px4_accel.print_status();
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}
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int BMI055_Accelerometer::probe()
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{
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const uint8_t BGW_CHIPID = RegisterRead(Register::BGW_CHIPID);
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if (BGW_CHIPID != chip_id) {
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DEVICE_DEBUG("unexpected BGW_CHIPID 0x%02x", BGW_CHIPID);
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return PX4_ERROR;
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}
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return PX4_OK;
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}
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void BMI055_Accelerometer::RunImpl()
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{
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const hrt_abstime now = hrt_absolute_time();
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switch (_state) {
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case STATE::RESET:
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// BGW_SOFTRESET: Writing a value of 0xB6 to this register resets the sensor.
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RegisterWrite(Register::BGW_SOFTRESET, 0xB6);
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_reset_timestamp = now;
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_consecutive_failures = 0;
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_total_failures = 0;
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_state = STATE::WAIT_FOR_RESET;
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ScheduleDelayed(25_ms);
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break;
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case STATE::WAIT_FOR_RESET:
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if (RegisterRead(Register::BGW_CHIPID) == chip_id) {
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// if reset succeeded then configure
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_state = STATE::CONFIGURE;
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ScheduleDelayed(25_ms);
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} else {
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// RESET not complete
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if (hrt_elapsed_time(&_reset_timestamp) > 100_ms) {
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PX4_DEBUG("Reset failed, retrying");
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_state = STATE::RESET;
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ScheduleDelayed(100_ms);
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} else {
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PX4_DEBUG("Reset not complete, check again in 10 ms");
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ScheduleDelayed(10_ms);
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}
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}
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break;
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case STATE::CONFIGURE:
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if (Configure()) {
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// if configure succeeded then start reading from FIFO
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_state = STATE::FIFO_READ;
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if (DataReadyInterruptConfigure()) {
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_data_ready_interrupt_enabled = true;
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// backup schedule as a watchdog timeout
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ScheduleDelayed(10_ms);
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} else {
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_data_ready_interrupt_enabled = false;
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ScheduleOnInterval(_fifo_empty_interval_us, _fifo_empty_interval_us);
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}
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FIFOReset();
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} else {
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// CONFIGURE not complete
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if (hrt_elapsed_time(&_reset_timestamp) > 1000_ms) {
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PX4_DEBUG("Configure failed, resetting");
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_state = STATE::RESET;
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} else {
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PX4_DEBUG("Configure failed, retrying");
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}
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ScheduleDelayed(10_ms);
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}
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break;
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case STATE::FIFO_READ: {
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if (_data_ready_interrupt_enabled) {
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// scheduled from interrupt if _drdy_fifo_read_samples was set
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if (_drdy_fifo_read_samples.fetch_and(0) == _fifo_accel_samples) {
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perf_count_interval(_drdy_interval_perf, now);
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}
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// push backup schedule back
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ScheduleDelayed(_fifo_empty_interval_us * 2);
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}
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// always check current FIFO status/count
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bool success = false;
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const uint8_t FIFO_STATUS = RegisterRead(Register::FIFO_STATUS);
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if (FIFO_STATUS & FIFO_STATUS_BIT::fifo_overrun) {
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FIFOReset();
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perf_count(_fifo_overflow_perf);
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} else {
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const uint8_t fifo_frame_counter = FIFO_STATUS & FIFO_STATUS_BIT::fifo_frame_counter;
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if (fifo_frame_counter > FIFO_MAX_SAMPLES) {
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// not necessarily an actual FIFO overflow, but more samples than we expected or can publish
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FIFOReset();
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perf_count(_fifo_overflow_perf);
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} else if (fifo_frame_counter == 0) {
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perf_count(_fifo_empty_perf);
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} else if (fifo_frame_counter >= 1) {
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if (FIFORead(now, fifo_frame_counter)) {
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success = true;
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_consecutive_failures = 0;
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}
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}
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}
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if (!success) {
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_consecutive_failures++;
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_total_failures++;
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// full reset if things are failing consistently
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if (_consecutive_failures > 100 || _total_failures > 1000) {
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Reset();
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return;
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}
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}
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if (!success || hrt_elapsed_time(&_last_config_check_timestamp) > 10_ms) {
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// check configuration registers periodically or immediately following any failure
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if (RegisterCheck(_register_cfg[_checked_register])) {
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_last_config_check_timestamp = now;
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_checked_register = (_checked_register + 1) % size_register_cfg;
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} else {
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// register check failed, force reset
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perf_count(_bad_register_perf);
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Reset();
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}
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}
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}
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break;
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}
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}
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void BMI055_Accelerometer::ConfigureAccel()
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{
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const uint8_t PMU_RANGE = RegisterRead(Register::PMU_RANGE) & (Bit3 | Bit2 | Bit1 | Bit0);
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switch (PMU_RANGE) {
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case range_2g:
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_px4_accel.set_scale(CONSTANTS_ONE_G / 1024.f); // 1024 LSB/g, 0.98mg/LSB
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_px4_accel.set_range(2.f * CONSTANTS_ONE_G);
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break;
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case range_4g:
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_px4_accel.set_scale(CONSTANTS_ONE_G / 512.f); // 512 LSB/g, 1.95mg/LSB
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_px4_accel.set_range(4.f * CONSTANTS_ONE_G);
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break;
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case range_8g:
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_px4_accel.set_scale(CONSTANTS_ONE_G / 256.f); // 256 LSB/g, 3.91mg/LSB
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_px4_accel.set_range(8.f * CONSTANTS_ONE_G);
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break;
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case range_16g:
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_px4_accel.set_scale(CONSTANTS_ONE_G / 128.f); // 128 LSB/g, 7.81mg/LSB
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_px4_accel.set_range(16.f * CONSTANTS_ONE_G);
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break;
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}
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}
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void BMI055_Accelerometer::ConfigureSampleRate(int sample_rate)
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{
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if (sample_rate == 0) {
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sample_rate = 1000; // default to 1000 Hz
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}
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// round down to nearest FIFO sample dt * SAMPLES_PER_TRANSFER
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const float min_interval = FIFO_SAMPLE_DT;
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_fifo_empty_interval_us = math::max(roundf((1e6f / (float)sample_rate) / min_interval) * min_interval, min_interval);
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_fifo_accel_samples = math::min((float)_fifo_empty_interval_us / (1e6f / ACCEL_RATE), (float)FIFO_MAX_SAMPLES);
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// recompute FIFO empty interval (us) with actual accel sample limit
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_fifo_empty_interval_us = _fifo_accel_samples * (1e6f / ACCEL_RATE);
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ConfigureFIFOWatermark(_fifo_accel_samples);
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}
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void BMI055_Accelerometer::ConfigureFIFOWatermark(uint8_t samples)
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{
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// FIFO watermark threshold
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for (auto &r : _register_cfg) {
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if (r.reg == Register::FIFO_CONFIG_0) {
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r.set_bits = samples;
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r.clear_bits = ~r.set_bits;
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}
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}
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}
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bool BMI055_Accelerometer::Configure()
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{
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// first set and clear all configured register bits
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for (const auto ®_cfg : _register_cfg) {
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RegisterSetAndClearBits(reg_cfg.reg, reg_cfg.set_bits, reg_cfg.clear_bits);
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}
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// now check that all are configured
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bool success = true;
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for (const auto ®_cfg : _register_cfg) {
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if (!RegisterCheck(reg_cfg)) {
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success = false;
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}
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}
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ConfigureAccel();
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return success;
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}
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int BMI055_Accelerometer::DataReadyInterruptCallback(int irq, void *context, void *arg)
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{
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static_cast<BMI055_Accelerometer *>(arg)->DataReady();
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return 0;
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}
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void BMI055_Accelerometer::DataReady()
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{
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uint8_t expected = 0;
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if (_drdy_fifo_read_samples.compare_exchange(&expected, _fifo_accel_samples)) {
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ScheduleNow();
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}
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}
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bool BMI055_Accelerometer::DataReadyInterruptConfigure()
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{
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if (_drdy_gpio == 0) {
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return false;
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}
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// Setup data ready on falling edge
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return px4_arch_gpiosetevent(_drdy_gpio, false, true, true, &DataReadyInterruptCallback, this) == 0;
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}
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bool BMI055_Accelerometer::DataReadyInterruptDisable()
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{
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if (_drdy_gpio == 0) {
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return false;
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}
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return px4_arch_gpiosetevent(_drdy_gpio, false, false, false, nullptr, nullptr) == 0;
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}
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bool BMI055_Accelerometer::RegisterCheck(const register_config_t ®_cfg)
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{
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bool success = true;
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const uint8_t reg_value = RegisterRead(reg_cfg.reg);
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if (reg_cfg.set_bits && ((reg_value & reg_cfg.set_bits) != reg_cfg.set_bits)) {
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PX4_DEBUG("0x%02hhX: 0x%02hhX (0x%02hhX not set)", (uint8_t)reg_cfg.reg, reg_value, reg_cfg.set_bits);
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success = false;
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}
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if (reg_cfg.clear_bits && ((reg_value & reg_cfg.clear_bits) != 0)) {
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PX4_DEBUG("0x%02hhX: 0x%02hhX (0x%02hhX not cleared)", (uint8_t)reg_cfg.reg, reg_value, reg_cfg.clear_bits);
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success = false;
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}
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return success;
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}
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uint8_t BMI055_Accelerometer::RegisterRead(Register reg)
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{
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uint8_t cmd[2] {};
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cmd[0] = static_cast<uint8_t>(reg) | DIR_READ;
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transfer(cmd, cmd, sizeof(cmd));
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return cmd[1];
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}
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void BMI055_Accelerometer::RegisterWrite(Register reg, uint8_t value)
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{
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uint8_t cmd[2] {(uint8_t)reg, value};
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transfer(cmd, cmd, sizeof(cmd));
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}
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void BMI055_Accelerometer::RegisterSetAndClearBits(Register reg, uint8_t setbits, uint8_t clearbits)
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{
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const uint8_t orig_val = RegisterRead(reg);
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uint8_t val = (orig_val & ~clearbits) | setbits;
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if (orig_val != val) {
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RegisterWrite(reg, val);
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}
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}
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bool BMI055_Accelerometer::FIFORead(const hrt_abstime ×tamp_sample, uint8_t samples)
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{
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FIFOTransferBuffer buffer{};
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const size_t transfer_size = math::min(samples * sizeof(FIFO::DATA) + 1, FIFO::SIZE);
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perf_begin(_transfer_perf);
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if (transfer((uint8_t *)&buffer, (uint8_t *)&buffer, transfer_size) != PX4_OK) {
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perf_end(_transfer_perf);
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perf_count(_bad_transfer_perf);
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return false;
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}
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perf_end(_transfer_perf);
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||||
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PX4Accelerometer::FIFOSample accel;
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accel.timestamp_sample = timestamp_sample;
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accel.samples = samples;
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accel.dt = FIFO_SAMPLE_DT;
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for (int i = 0; i < samples; i++) {
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const FIFO::DATA &fifo_sample = buffer.f[i];
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// acc_x_msb<11:4> + acc_x_lsb<3:0>
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const int16_t accel_x = combine(fifo_sample.ACCD_X_MSB, fifo_sample.ACCD_X_LSB) >> 4;
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const int16_t accel_y = combine(fifo_sample.ACCD_Y_MSB, fifo_sample.ACCD_Y_LSB) >> 4;
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const int16_t accel_z = combine(fifo_sample.ACCD_Z_MSB, fifo_sample.ACCD_Z_LSB) >> 4;
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// sensor's frame is +x forward, +y left, +z up
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// flip y & z to publish right handed with z down (x forward, y right, z down)
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accel.x[i] = accel_x;
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accel.y[i] = (accel_y == INT16_MIN) ? INT16_MAX : -accel_y;
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||||
accel.z[i] = (accel_z == INT16_MIN) ? INT16_MAX : -accel_z;
|
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}
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||||
|
||||
_px4_accel.set_error_count(perf_event_count(_bad_register_perf) + perf_event_count(_bad_transfer_perf) +
|
||||
perf_event_count(_fifo_empty_perf) + perf_event_count(_fifo_overflow_perf));
|
||||
|
||||
_px4_accel.updateFIFO(accel);
|
||||
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return true;
|
||||
}
|
||||
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||||
void BMI055_Accelerometer::FIFOReset()
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{
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perf_count(_fifo_reset_perf);
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||||
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// FIFO_CONFIG_0: Writing to water mark level trigger in register 0x3D (FIFO_CONFIG_0) clears the FIFO buffer.
|
||||
RegisterWrite(Register::FIFO_CONFIG_0, 0);
|
||||
|
||||
// FIFO_CONFIG_1: FIFO overrun condition can only be cleared by writing to the FIFO configuration register FIFO_CONFIG_1
|
||||
RegisterWrite(Register::FIFO_CONFIG_1, 0);
|
||||
|
||||
// reset while FIFO is disabled
|
||||
_drdy_fifo_read_samples.store(0);
|
||||
|
||||
// FIFO_CONFIG_0: restore FIFO watermark
|
||||
// FIFO_CONFIG_1: re-enable FIFO
|
||||
for (const auto &r : _register_cfg) {
|
||||
if ((r.reg == Register::FIFO_CONFIG_0) || (r.reg == Register::FIFO_CONFIG_1)) {
|
||||
RegisterSetAndClearBits(r.reg, r.set_bits, r.clear_bits);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void BMI055_Accelerometer::UpdateTemperature()
|
||||
{
|
||||
// The slope of the temperature sensor is 0.5K/LSB, its center temperature is 23°C [(ACC 0x08) temp = 0x00].
|
||||
float temperature = RegisterRead(Register::ACCD_TEMP) * 0.5f + 23.f;
|
||||
|
||||
if (PX4_ISFINITE(temperature)) {
|
||||
_px4_accel.set_temperature(temperature);
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace Bosch::BMI055::Accelerometer
|
||||
Reference in New Issue
Block a user