From e3b1315df52a9609413fb5c6403fcf0970b6276a Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Thu, 9 Jul 2020 11:05:20 -0400 Subject: [PATCH] icm20602: accumulated minor improvements and cleanup - perform reset as per the datasheet (disable I2C immediately, set power mode, wait for appropriate time, etc) - track consecutive errors and trigger full reset if necessary - remove interrupt perf counter and instead only count misses - minor style changes to stay in sync with the other Invensense drivers - read FIFO count along with full transfer as a sanity check --- .../imu/invensense/icm20602/ICM20602.cpp | 349 ++++++++++-------- .../imu/invensense/icm20602/ICM20602.hpp | 54 ++- .../InvenSense_ICM20602_registers.hpp | 61 +-- 3 files changed, 260 insertions(+), 204 deletions(-) diff --git a/src/drivers/imu/invensense/icm20602/ICM20602.cpp b/src/drivers/imu/invensense/icm20602/ICM20602.cpp index 6b0467e5ac..d202588ac7 100644 --- a/src/drivers/imu/invensense/icm20602/ICM20602.cpp +++ b/src/drivers/imu/invensense/icm20602/ICM20602.cpp @@ -1,6 +1,6 @@ /**************************************************************************** * - * Copyright (c) 2019 PX4 Development Team. All rights reserved. + * Copyright (c) 2019-2020 PX4 Development Team. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -48,6 +48,10 @@ ICM20602::ICM20602(I2CSPIBusOption bus_option, int bus, uint32_t device, enum Ro _px4_accel(get_device_id(), ORB_PRIO_HIGH, rotation), _px4_gyro(get_device_id(), ORB_PRIO_HIGH, rotation) { + if (drdy_gpio != 0) { + _drdy_missed_perf = perf_alloc(PC_COUNT, MODULE_NAME": DRDY missed"); + } + ConfigureSampleRate(_px4_gyro.get_max_rate_hz()); } @@ -58,7 +62,7 @@ ICM20602::~ICM20602() perf_free(_fifo_empty_perf); perf_free(_fifo_overflow_perf); perf_free(_fifo_reset_perf); - perf_free(_drdy_interval_perf); + perf_free(_drdy_missed_perf); } int ICM20602::init() @@ -76,6 +80,7 @@ int ICM20602::init() bool ICM20602::Reset() { _state = STATE::RESET; + DataReadyInterruptDisable(); ScheduleClear(); ScheduleNow(); return true; @@ -90,16 +95,15 @@ void ICM20602::exit_and_cleanup() void ICM20602::print_status() { I2CSPIDriverBase::print_status(); - PX4_INFO("FIFO empty interval: %d us (%.3f Hz)", _fifo_empty_interval_us, - static_cast(1000000 / _fifo_empty_interval_us)); + + PX4_INFO("FIFO empty interval: %d us (%.1f Hz)", _fifo_empty_interval_us, 1e6 / _fifo_empty_interval_us); perf_print_counter(_bad_register_perf); perf_print_counter(_bad_transfer_perf); perf_print_counter(_fifo_empty_perf); perf_print_counter(_fifo_overflow_perf); perf_print_counter(_fifo_reset_perf); - perf_print_counter(_drdy_interval_perf); - + perf_print_counter(_drdy_missed_perf); } int ICM20602::probe() @@ -116,13 +120,16 @@ int ICM20602::probe() void ICM20602::RunImpl() { + const hrt_abstime now = hrt_absolute_time(); + switch (_state) { case STATE::RESET: // PWR_MGMT_1: Device Reset RegisterWrite(Register::PWR_MGMT_1, PWR_MGMT_1_BIT::DEVICE_RESET); - _reset_timestamp = hrt_absolute_time(); + _reset_timestamp = now; + _failure_count = 0; _state = STATE::WAIT_FOR_RESET; - ScheduleDelayed(1_ms); + ScheduleDelayed(2_ms); // From power-up 2 ms start-up time for register read/write break; case STATE::WAIT_FOR_RESET: @@ -133,13 +140,19 @@ void ICM20602::RunImpl() && (RegisterRead(Register::PWR_MGMT_1) == 0x41) && (RegisterRead(Register::CONFIG) == 0x80)) { + // Disable I2C, wakeup, and reset digital signal path + RegisterWrite(Register::I2C_IF, I2C_IF_BIT::I2C_IF_DIS); // set immediately to prevent switching into I2C mode + RegisterWrite(Register::PWR_MGMT_1, PWR_MGMT_1_BIT::CLKSEL_0); + RegisterWrite(Register::SIGNAL_PATH_RESET, SIGNAL_PATH_RESET_BIT::ACCEL_RST | SIGNAL_PATH_RESET_BIT::TEMP_RST); + RegisterSetAndClearBits(Register::USER_CTRL, USER_CTRL_BIT::SIG_COND_RST, 0); + // if reset succeeded then configure _state = STATE::CONFIGURE; - ScheduleNow(); + ScheduleDelayed(35_ms); // max 35 ms start-up time from sleep } else { // RESET not complete - if (hrt_elapsed_time(&_reset_timestamp) > 100_ms) { + if (hrt_elapsed_time(&_reset_timestamp) > 1000_ms) { PX4_DEBUG("Reset failed, retrying"); _state = STATE::RESET; ScheduleDelayed(100_ms); @@ -161,7 +174,7 @@ void ICM20602::RunImpl() _data_ready_interrupt_enabled = true; // backup schedule as a watchdog timeout - ScheduleDelayed(10_ms); + ScheduleDelayed(100_ms); } else { _data_ready_interrupt_enabled = false; @@ -171,68 +184,92 @@ void ICM20602::RunImpl() FIFOReset(); } else { - PX4_DEBUG("Configure failed, retrying"); - // try again in 10 ms - ScheduleDelayed(10_ms); + // CONFIGURE not complete + if (hrt_elapsed_time(&_reset_timestamp) > 1000_ms) { + PX4_DEBUG("Configure failed, resetting"); + _state = STATE::RESET; + + } else { + PX4_DEBUG("Configure failed, retrying"); + } + + ScheduleDelayed(100_ms); } break; case STATE::FIFO_READ: { - hrt_abstime timestamp_sample = 0; - uint8_t samples = 0; + uint32_t samples = 0; if (_data_ready_interrupt_enabled) { - // re-schedule as watchdog timeout - ScheduleDelayed(10_ms); + // scheduled from interrupt if _drdy_fifo_read_samples was set as expected + if (_drdy_fifo_read_samples.fetch_and(0) != _fifo_gyro_samples) { + perf_count(_drdy_missed_perf); - // timestamp set in data ready interrupt - samples = _fifo_read_samples.load(); - timestamp_sample = _fifo_watermark_interrupt_timestamp; - } - - bool failure = false; - - // manually check FIFO count if no samples from DRDY or timestamp looks bogus - if (!_data_ready_interrupt_enabled || (samples == 0) - || (hrt_elapsed_time(×tamp_sample) > (_fifo_empty_interval_us / 2))) { - - // use the time now roughly corresponding with the last sample we'll pull from the FIFO - timestamp_sample = hrt_absolute_time(); - const uint16_t fifo_count = FIFOReadCount(); - samples = (fifo_count / sizeof(FIFO::DATA) / SAMPLES_PER_TRANSFER) * SAMPLES_PER_TRANSFER; // round down to nearest - } - - if (samples > FIFO_MAX_SAMPLES) { - // not technically an overflow, but more samples than we expected or can publish - perf_count(_fifo_overflow_perf); - failure = true; - FIFOReset(); - - } else if (samples >= SAMPLES_PER_TRANSFER) { - // require at least SAMPLES_PER_TRANSFER (we want at least 1 new accel sample per transfer) - if (!FIFORead(timestamp_sample, samples)) { - failure = true; - _px4_accel.increase_error_count(); - _px4_gyro.increase_error_count(); + } else { + samples = _fifo_gyro_samples; } - } else if (samples == 0) { - failure = true; - perf_count(_fifo_empty_perf); + // push backup schedule back + ScheduleDelayed(_fifo_empty_interval_us * 2); } - if (failure || hrt_elapsed_time(&_last_config_check_timestamp) > 10_ms) { - // check registers incrementally - if (RegisterCheck(_register_cfg[_checked_register], true)) { - _last_config_check_timestamp = timestamp_sample; + if (samples == 0) { + // check current FIFO count + const uint16_t fifo_count = FIFOReadCount(); + + if (fifo_count >= FIFO::SIZE) { + FIFOReset(); + perf_count(_fifo_overflow_perf); + + } else if (fifo_count == 0) { + perf_count(_fifo_empty_perf); + + } else { + // FIFO count (size in bytes) should be a multiple of the FIFO::DATA structure + samples = (fifo_count / sizeof(FIFO::DATA) / SAMPLES_PER_TRANSFER) * SAMPLES_PER_TRANSFER; // round down to nearest + + if (samples > FIFO_MAX_SAMPLES) { + // not technically an overflow, but more samples than we expected or can publish + FIFOReset(); + perf_count(_fifo_overflow_perf); + samples = 0; + } + } + } + + bool success = false; + + if (samples >= SAMPLES_PER_TRANSFER) { + if (FIFORead(now, samples)) { + success = true; + + if (_failure_count > 0) { + _failure_count--; + } + } + } + + if (!success) { + _failure_count++; + + // full reset if things are failing consistently + if (_failure_count > 10) { + Reset(); + return; + } + } + + if (!success || hrt_elapsed_time(&_last_config_check_timestamp) > 100_ms) { + // check configuration registers periodically or immediately following any failure + if (RegisterCheck(_register_cfg[_checked_register])) { + _last_config_check_timestamp = now; _checked_register = (_checked_register + 1) % size_register_cfg; } else { - // register check failed, force reconfigure - PX4_DEBUG("Health check failed, reconfiguring"); - _state = STATE::CONFIGURE; - ScheduleNow(); + // register check failed, force reset + perf_count(_bad_register_perf); + Reset(); } } } @@ -248,22 +285,22 @@ void ICM20602::ConfigureAccel() switch (ACCEL_FS_SEL) { case ACCEL_FS_SEL_2G: _px4_accel.set_scale(CONSTANTS_ONE_G / 16384.f); - _px4_accel.set_range(2 * CONSTANTS_ONE_G); + _px4_accel.set_range(2.f * CONSTANTS_ONE_G); break; case ACCEL_FS_SEL_4G: _px4_accel.set_scale(CONSTANTS_ONE_G / 8192.f); - _px4_accel.set_range(4 * CONSTANTS_ONE_G); + _px4_accel.set_range(4.f * CONSTANTS_ONE_G); break; case ACCEL_FS_SEL_8G: _px4_accel.set_scale(CONSTANTS_ONE_G / 4096.f); - _px4_accel.set_range(8 * CONSTANTS_ONE_G); + _px4_accel.set_range(8.f * CONSTANTS_ONE_G); break; case ACCEL_FS_SEL_16G: _px4_accel.set_scale(CONSTANTS_ONE_G / 2048.f); - _px4_accel.set_range(16 * CONSTANTS_ONE_G); + _px4_accel.set_range(16.f * CONSTANTS_ONE_G); break; } } @@ -303,16 +340,14 @@ void ICM20602::ConfigureSampleRate(int sample_rate) } // round down to nearest FIFO sample dt * SAMPLES_PER_TRANSFER - const float min_interval = SAMPLES_PER_TRANSFER * FIFO_SAMPLE_DT; + const float min_interval = FIFO_SAMPLE_DT * SAMPLES_PER_TRANSFER; _fifo_empty_interval_us = math::max(roundf((1e6f / (float)sample_rate) / min_interval) * min_interval, min_interval); - _fifo_gyro_samples = math::min((float)_fifo_empty_interval_us / (1e6f / GYRO_RATE), (float)FIFO_MAX_SAMPLES); + _fifo_gyro_samples = roundf(math::min((float)_fifo_empty_interval_us / (1e6f / GYRO_RATE), (float)FIFO_MAX_SAMPLES)); // recompute FIFO empty interval (us) with actual gyro sample limit _fifo_empty_interval_us = _fifo_gyro_samples * (1e6f / GYRO_RATE); - _fifo_accel_samples = math::min(_fifo_empty_interval_us / (1e6f / ACCEL_RATE), (float)FIFO_MAX_SAMPLES); - ConfigureFIFOWatermark(_fifo_gyro_samples); } @@ -322,7 +357,12 @@ void ICM20602::ConfigureFIFOWatermark(uint8_t samples) const uint16_t fifo_watermark_threshold = samples * sizeof(FIFO::DATA); for (auto &r : _register_cfg) { - if (r.reg == Register::FIFO_WM_TH1) { + if (r.reg == Register::CONFIG) { + // Document Number: DS-000176 Page 45 of 57 + // User should ensure that bit 7 of register 0x1A is set to 0 before using FIFO watermark threshold feature + r.clear_bits = Bit7; + + } else if (r.reg == Register::FIFO_WM_TH1) { r.set_bits = (fifo_watermark_threshold >> 8) & 0b00000011; } else if (r.reg == Register::FIFO_WM_TH2) { @@ -333,10 +373,16 @@ void ICM20602::ConfigureFIFOWatermark(uint8_t samples) bool ICM20602::Configure() { + // first set and clear all configured register bits + for (const auto ®_cfg : _register_cfg) { + RegisterSetAndClearBits(reg_cfg.reg, reg_cfg.set_bits, reg_cfg.clear_bits); + } + + // now check that all are configured bool success = true; - for (const auto ® : _register_cfg) { - if (!RegisterCheck(reg)) { + for (const auto ®_cfg : _register_cfg) { + if (!RegisterCheck(reg_cfg)) { success = false; } } @@ -355,10 +401,11 @@ int ICM20602::DataReadyInterruptCallback(int irq, void *context, void *arg) void ICM20602::DataReady() { - perf_count(_drdy_interval_perf); - _fifo_watermark_interrupt_timestamp = hrt_absolute_time(); - _fifo_read_samples.store(_fifo_gyro_samples); - ScheduleNow(); + uint32_t expected = 0; + + if (_drdy_fifo_read_samples.compare_exchange(&expected, _fifo_gyro_samples)) { + ScheduleNow(); + } } bool ICM20602::DataReadyInterruptConfigure() @@ -368,7 +415,7 @@ bool ICM20602::DataReadyInterruptConfigure() } // Setup data ready on falling edge - return px4_arch_gpiosetevent(_drdy_gpio, false, true, true, &ICM20602::DataReadyInterruptCallback, this) == 0; + return px4_arch_gpiosetevent(_drdy_gpio, false, true, true, &DataReadyInterruptCallback, this) == 0; } bool ICM20602::DataReadyInterruptDisable() @@ -380,7 +427,7 @@ bool ICM20602::DataReadyInterruptDisable() return px4_arch_gpiosetevent(_drdy_gpio, false, false, false, nullptr, nullptr) == 0; } -bool ICM20602::RegisterCheck(const register_config_t ®_cfg, bool notify) +bool ICM20602::RegisterCheck(const register_config_t ®_cfg) { bool success = true; @@ -396,16 +443,6 @@ bool ICM20602::RegisterCheck(const register_config_t ®_cfg, bool notify) success = false; } - if (!success) { - RegisterSetAndClearBits(reg_cfg.reg, reg_cfg.set_bits, reg_cfg.clear_bits); - - if (notify) { - perf_count(_bad_register_perf); - _px4_accel.increase_error_count(); - _px4_gyro.increase_error_count(); - } - } - return success; } @@ -426,17 +463,12 @@ void ICM20602::RegisterWrite(Register reg, uint8_t value) void ICM20602::RegisterSetAndClearBits(Register reg, uint8_t setbits, uint8_t clearbits) { const uint8_t orig_val = RegisterRead(reg); - uint8_t val = orig_val; - if (setbits) { - val |= setbits; + uint8_t val = (orig_val & ~clearbits) | setbits; + + if (orig_val != val) { + RegisterWrite(reg, val); } - - if (clearbits) { - val &= ~clearbits; - } - - RegisterWrite(reg, val); } uint16_t ICM20602::FIFOReadCount() @@ -453,35 +485,45 @@ uint16_t ICM20602::FIFOReadCount() return combine(fifo_count_buf[1], fifo_count_buf[2]); } -bool ICM20602::FIFORead(const hrt_abstime ×tamp_sample, uint16_t samples) +bool ICM20602::FIFORead(const hrt_abstime ×tamp_sample, uint8_t samples) { FIFOTransferBuffer buffer{}; - const size_t transfer_size = math::min(samples * sizeof(FIFO::DATA) + 1, FIFO::SIZE); + const size_t transfer_size = math::min(samples * sizeof(FIFO::DATA) + 3, FIFO::SIZE); if (transfer((uint8_t *)&buffer, (uint8_t *)&buffer, transfer_size) != PX4_OK) { perf_count(_bad_transfer_perf); return false; } + const uint16_t fifo_count_bytes = combine(buffer.FIFO_COUNTH, buffer.FIFO_COUNTL); - bool bad_data = false; - - ProcessGyro(timestamp_sample, buffer, samples); - - if (!ProcessAccel(timestamp_sample, buffer, samples)) { - bad_data = true; + if (fifo_count_bytes >= FIFO::SIZE) { + perf_count(_fifo_overflow_perf); + FIFOReset(); + return false; } - // limit temperature updates to 1 Hz - if (hrt_elapsed_time(&_temperature_update_timestamp) > 1_s) { - _temperature_update_timestamp = timestamp_sample; + const uint8_t fifo_count_samples = fifo_count_bytes / sizeof(FIFO::DATA); - if (!ProcessTemperature(buffer, samples)) { - bad_data = true; + if (fifo_count_samples == 0) { + perf_count(_fifo_empty_perf); + return false; + } + + const uint8_t valid_samples = math::min(samples, fifo_count_samples); + + if (valid_samples > 0) { + // use raw temperature to first validate FIFO transfer + if (ProcessTemperature(buffer.f, valid_samples)) { + ProcessGyro(timestamp_sample, buffer.f, valid_samples); + + if (ProcessAccel(timestamp_sample, buffer.f, valid_samples)) { + return true; + } } } - return !bad_data; + return false; } void ICM20602::FIFOReset() @@ -495,8 +537,7 @@ void ICM20602::FIFOReset() RegisterSetAndClearBits(Register::USER_CTRL, USER_CTRL_BIT::FIFO_RST, USER_CTRL_BIT::FIFO_EN); // reset while FIFO is disabled - _fifo_watermark_interrupt_timestamp = 0; - _fifo_read_samples.store(0); + _drdy_fifo_read_samples.store(0); // FIFO_EN: enable both gyro and accel // USER_CTRL: re-enable FIFO @@ -512,12 +553,12 @@ static bool fifo_accel_equal(const FIFO::DATA &f0, const FIFO::DATA &f1) return (memcmp(&f0.ACCEL_XOUT_H, &f1.ACCEL_XOUT_H, 6) == 0); } -bool ICM20602::ProcessAccel(const hrt_abstime ×tamp_sample, const FIFOTransferBuffer &buffer, - const uint8_t samples) +bool ICM20602::ProcessAccel(const hrt_abstime ×tamp_sample, const FIFO::DATA fifo[], const uint8_t samples) { sensor_accel_fifo_s accel{}; accel.timestamp_sample = timestamp_sample; - accel.dt = _fifo_empty_interval_us / _fifo_accel_samples; + accel.samples = 0; + accel.dt = FIFO_SAMPLE_DT * SAMPLES_PER_TRANSFER; bool bad_data = false; @@ -525,58 +566,57 @@ bool ICM20602::ProcessAccel(const hrt_abstime ×tamp_sample, const FIFOTrans int accel_first_sample = 1; if (samples >= 4) { - if (fifo_accel_equal(buffer.f[0], buffer.f[1]) && fifo_accel_equal(buffer.f[2], buffer.f[3])) { + if (fifo_accel_equal(fifo[0], fifo[1]) && fifo_accel_equal(fifo[2], fifo[3])) { // [A0, A1, A2, A3] // A0==A1, A2==A3 accel_first_sample = 1; - } else if (fifo_accel_equal(buffer.f[1], buffer.f[2])) { + } else if (fifo_accel_equal(fifo[1], fifo[2])) { // [A0, A1, A2, A3] // A0, A1==A2, A3 accel_first_sample = 0; } else { - perf_count(_bad_transfer_perf); + // no matching accel samples is an error bad_data = true; + perf_count(_bad_transfer_perf); } } - int accel_samples = 0; - - for (int i = accel_first_sample; i < samples; i = i + 2) { - const FIFO::DATA &fifo_sample = buffer.f[i]; - int16_t accel_x = combine(fifo_sample.ACCEL_XOUT_H, fifo_sample.ACCEL_XOUT_L); - int16_t accel_y = combine(fifo_sample.ACCEL_YOUT_H, fifo_sample.ACCEL_YOUT_L); - int16_t accel_z = combine(fifo_sample.ACCEL_ZOUT_H, fifo_sample.ACCEL_ZOUT_L); + for (int i = accel_first_sample; i < samples; i = i + SAMPLES_PER_TRANSFER) { + int16_t accel_x = combine(fifo[i].ACCEL_XOUT_H, fifo[i].ACCEL_XOUT_L); + int16_t accel_y = combine(fifo[i].ACCEL_YOUT_H, fifo[i].ACCEL_YOUT_L); + int16_t accel_z = combine(fifo[i].ACCEL_ZOUT_H, fifo[i].ACCEL_ZOUT_L); // sensor's frame is +x forward, +y left, +z up // flip y & z to publish right handed with z down (x forward, y right, z down) - accel.x[accel_samples] = accel_x; - accel.y[accel_samples] = (accel_y == INT16_MIN) ? INT16_MAX : -accel_y; - accel.z[accel_samples] = (accel_z == INT16_MIN) ? INT16_MAX : -accel_z; - accel_samples++; + accel.x[accel.samples] = accel_x; + accel.y[accel.samples] = (accel_y == INT16_MIN) ? INT16_MAX : -accel_y; + accel.z[accel.samples] = (accel_z == INT16_MIN) ? INT16_MAX : -accel_z; + accel.samples++; } - accel.samples = accel_samples; + _px4_accel.set_error_count(perf_event_count(_bad_register_perf) + perf_event_count(_bad_transfer_perf) + + perf_event_count(_fifo_empty_perf) + perf_event_count(_fifo_overflow_perf)); - _px4_accel.updateFIFO(accel); + if (accel.samples > 0) { + _px4_accel.updateFIFO(accel); + } return !bad_data; } -void ICM20602::ProcessGyro(const hrt_abstime ×tamp_sample, const FIFOTransferBuffer &buffer, const uint8_t samples) +void ICM20602::ProcessGyro(const hrt_abstime ×tamp_sample, const FIFO::DATA fifo[], const uint8_t samples) { sensor_gyro_fifo_s gyro{}; gyro.timestamp_sample = timestamp_sample; gyro.samples = samples; - gyro.dt = _fifo_empty_interval_us / _fifo_gyro_samples; + gyro.dt = FIFO_SAMPLE_DT; for (int i = 0; i < samples; i++) { - const FIFO::DATA &fifo_sample = buffer.f[i]; - - const int16_t gyro_x = combine(fifo_sample.GYRO_XOUT_H, fifo_sample.GYRO_XOUT_L); - const int16_t gyro_y = combine(fifo_sample.GYRO_YOUT_H, fifo_sample.GYRO_YOUT_L); - const int16_t gyro_z = combine(fifo_sample.GYRO_ZOUT_H, fifo_sample.GYRO_ZOUT_L); + const int16_t gyro_x = combine(fifo[i].GYRO_XOUT_H, fifo[i].GYRO_XOUT_L); + const int16_t gyro_y = combine(fifo[i].GYRO_YOUT_H, fifo[i].GYRO_YOUT_L); + const int16_t gyro_z = combine(fifo[i].GYRO_ZOUT_H, fifo[i].GYRO_ZOUT_L); // sensor's frame is +x forward, +y left, +z up // flip y & z to publish right handed with z down (x forward, y right, z down) @@ -585,29 +625,28 @@ void ICM20602::ProcessGyro(const hrt_abstime ×tamp_sample, const FIFOTransf gyro.z[i] = (gyro_z == INT16_MIN) ? INT16_MAX : -gyro_z; } + _px4_gyro.set_error_count(perf_event_count(_bad_register_perf) + perf_event_count(_bad_transfer_perf) + + perf_event_count(_fifo_empty_perf) + perf_event_count(_fifo_overflow_perf)); + _px4_gyro.updateFIFO(gyro); } -bool ICM20602::ProcessTemperature(const FIFOTransferBuffer &buffer, const uint8_t samples) +bool ICM20602::ProcessTemperature(const FIFO::DATA fifo[], const uint8_t samples) { - int16_t temperature[samples]; + int16_t temperature[FIFO_MAX_SAMPLES]; + float temperature_sum{0}; for (int i = 0; i < samples; i++) { - const FIFO::DATA &fifo_sample = buffer.f[i]; - temperature[i] = combine(fifo_sample.TEMP_OUT_H, fifo_sample.TEMP_OUT_L); - } - - int32_t temperature_sum{0}; - - for (auto t : temperature) { + const int16_t t = combine(fifo[i].TEMP_OUT_H, fifo[i].TEMP_OUT_L); temperature_sum += t; + temperature[i] = t; } const float temperature_avg = temperature_sum / samples; - for (auto t : temperature) { + for (int i = 0; i < samples; i++) { // temperature changing wildly is an indication of a transfer error - if (fabsf(t - temperature_avg) > 1000) { + if (fabsf(temperature[i] - temperature_avg) > 1000) { perf_count(_bad_transfer_perf); return false; } @@ -615,8 +654,18 @@ bool ICM20602::ProcessTemperature(const FIFOTransferBuffer &buffer, const uint8_ // use average temperature reading const float temperature_C = (temperature_avg / TEMPERATURE_SENSITIVITY) + TEMPERATURE_OFFSET; - _px4_accel.set_temperature(temperature_C); - _px4_gyro.set_temperature(temperature_C); - return true; + if (PX4_ISFINITE(temperature_C) + && (temperature_C >= TEMPERATURE_SENSOR_MIN) + && (temperature_C <= TEMPERATURE_SENSOR_MAX)) { + + _px4_accel.set_temperature(temperature_C); + _px4_gyro.set_temperature(temperature_C); + return true; + + } else { + perf_count(_bad_transfer_perf); + } + + return false; } diff --git a/src/drivers/imu/invensense/icm20602/ICM20602.hpp b/src/drivers/imu/invensense/icm20602/ICM20602.hpp index 2fec260d6d..a1a2746c47 100644 --- a/src/drivers/imu/invensense/icm20602/ICM20602.hpp +++ b/src/drivers/imu/invensense/icm20602/ICM20602.hpp @@ -1,6 +1,6 @@ /**************************************************************************** * - * Copyright (c) 2019 PX4 Development Team. All rights reserved. + * Copyright (c) 2019-2020 PX4 Development Team. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -73,21 +73,23 @@ private: void exit_and_cleanup() override; // Sensor Configuration - static constexpr float FIFO_SAMPLE_DT{125.f}; - static constexpr uint32_t SAMPLES_PER_TRANSFER{2}; // ensure at least 1 new accel sample per transfer - static constexpr float GYRO_RATE{1e6f / FIFO_SAMPLE_DT}; // 8 kHz gyro - static constexpr float ACCEL_RATE{GYRO_RATE / 2.f}; // 4 kHz accel + static constexpr float FIFO_SAMPLE_DT{1e6f / 8000.f}; + static constexpr uint32_t SAMPLES_PER_TRANSFER{2}; // ensure at least 1 new accel sample per transfer + static constexpr float GYRO_RATE{1e6f / FIFO_SAMPLE_DT}; // 8000 Hz gyro + static constexpr float ACCEL_RATE{GYRO_RATE / SAMPLES_PER_TRANSFER}; // 4000 Hz accel // maximum FIFO samples per transfer is limited to the size of sensor_accel_fifo/sensor_gyro_fifo static constexpr uint32_t FIFO_MAX_SAMPLES{math::min(math::min(FIFO::SIZE / sizeof(FIFO::DATA), sizeof(sensor_gyro_fifo_s::x) / sizeof(sensor_gyro_fifo_s::x[0])), sizeof(sensor_accel_fifo_s::x) / sizeof(sensor_accel_fifo_s::x[0]) * (int)(GYRO_RATE / ACCEL_RATE))}; // Transfer data struct FIFOTransferBuffer { - uint8_t cmd{static_cast(Register::FIFO_R_W) | DIR_READ}; + uint8_t cmd{static_cast(Register::FIFO_COUNTH) | DIR_READ}; + uint8_t FIFO_COUNTH{0}; + uint8_t FIFO_COUNTL{0}; FIFO::DATA f[FIFO_MAX_SAMPLES] {}; }; // ensure no struct padding - static_assert(sizeof(FIFOTransferBuffer) == (1 + FIFO_MAX_SAMPLES *sizeof(FIFO::DATA))); + static_assert(sizeof(FIFOTransferBuffer) == (3 + FIFO_MAX_SAMPLES *sizeof(FIFO::DATA))); struct register_config_t { Register reg; @@ -110,21 +112,19 @@ private: bool DataReadyInterruptConfigure(); bool DataReadyInterruptDisable(); - bool RegisterCheck(const register_config_t ®_cfg, bool notify = false); + bool RegisterCheck(const register_config_t ®_cfg); uint8_t RegisterRead(Register reg); void RegisterWrite(Register reg, uint8_t value); void RegisterSetAndClearBits(Register reg, uint8_t setbits, uint8_t clearbits); - void RegisterSetBits(Register reg, uint8_t setbits) { RegisterSetAndClearBits(reg, setbits, 0); } - void RegisterClearBits(Register reg, uint8_t clearbits) { RegisterSetAndClearBits(reg, 0, clearbits); } uint16_t FIFOReadCount(); - bool FIFORead(const hrt_abstime ×tamp_sample, uint16_t samples); + bool FIFORead(const hrt_abstime ×tamp_sample, uint8_t samples); void FIFOReset(); - bool ProcessAccel(const hrt_abstime ×tamp_sample, const FIFOTransferBuffer &buffer, const uint8_t samples); - void ProcessGyro(const hrt_abstime ×tamp_sample, const FIFOTransferBuffer &buffer, const uint8_t samples); - bool ProcessTemperature(const FIFOTransferBuffer &buffer, const uint8_t samples); + bool ProcessAccel(const hrt_abstime ×tamp_sample, const FIFO::DATA fifo[], const uint8_t samples); + void ProcessGyro(const hrt_abstime ×tamp_sample, const FIFO::DATA fifo[], const uint8_t samples); + bool ProcessTemperature(const FIFO::DATA fifo[], const uint8_t samples); const spi_drdy_gpio_t _drdy_gpio; @@ -136,14 +136,13 @@ private: perf_counter_t _fifo_empty_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO empty")}; perf_counter_t _fifo_overflow_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO overflow")}; perf_counter_t _fifo_reset_perf{perf_alloc(PC_COUNT, MODULE_NAME": FIFO reset")}; - perf_counter_t _drdy_interval_perf{perf_alloc(PC_INTERVAL, MODULE_NAME": DRDY interval")}; + perf_counter_t _drdy_missed_perf{nullptr}; hrt_abstime _reset_timestamp{0}; hrt_abstime _last_config_check_timestamp{0}; - hrt_abstime _fifo_watermark_interrupt_timestamp{0}; - hrt_abstime _temperature_update_timestamp{0}; + int _failure_count{0}; - px4::atomic _fifo_read_samples{0}; + px4::atomic _drdy_fifo_read_samples{0}; bool _data_ready_interrupt_enabled{false}; enum class STATE : uint8_t { @@ -156,24 +155,23 @@ private: STATE _state{STATE::RESET}; uint16_t _fifo_empty_interval_us{1250}; // default 1250 us / 800 Hz transfer interval - uint8_t _fifo_gyro_samples{static_cast(_fifo_empty_interval_us / (1000000 / GYRO_RATE))}; - uint8_t _fifo_accel_samples{static_cast(_fifo_empty_interval_us / (1000000 / ACCEL_RATE))}; + uint32_t _fifo_gyro_samples{static_cast(_fifo_empty_interval_us / (1000000 / GYRO_RATE))}; uint8_t _checked_register{0}; static constexpr uint8_t size_register_cfg{12}; register_config_t _register_cfg[size_register_cfg] { // Register | Set bits, Clear bits - { Register::PWR_MGMT_1, PWR_MGMT_1_BIT::CLKSEL_0, PWR_MGMT_1_BIT::DEVICE_RESET | PWR_MGMT_1_BIT::SLEEP }, - { Register::I2C_IF, I2C_IF_BIT::I2C_IF_DIS, 0 }, + { Register::CONFIG, CONFIG_BIT::FIFO_MODE | CONFIG_BIT::DLPF_CFG_BYPASS_DLPF_8KHZ, 0 }, + { Register::GYRO_CONFIG, GYRO_CONFIG_BIT::FS_SEL_2000_DPS, GYRO_CONFIG_BIT::FCHOICE_B_8KHZ_BYPASS_DLPF }, { Register::ACCEL_CONFIG, ACCEL_CONFIG_BIT::ACCEL_FS_SEL_16G, 0 }, { Register::ACCEL_CONFIG2, ACCEL_CONFIG2_BIT::ACCEL_FCHOICE_B_BYPASS_DLPF, 0 }, - { Register::GYRO_CONFIG, GYRO_CONFIG_BIT::FS_SEL_2000_DPS, GYRO_CONFIG_BIT::FCHOICE_B_8KHZ_BYPASS_DLPF }, - { Register::CONFIG, CONFIG_BIT::FIFO_MODE | CONFIG_BIT::DLPF_CFG_BYPASS_DLPF_8KHZ, Bit7 }, - { Register::FIFO_WM_TH1, 0, 0 }, // FIFO_WM_TH[9:8] - { Register::FIFO_WM_TH2, 0, 0 }, // FIFO_WM_TH[7:0] - { Register::USER_CTRL, USER_CTRL_BIT::FIFO_EN, USER_CTRL_BIT::FIFO_RST | USER_CTRL_BIT::SIG_COND_RST }, { Register::FIFO_EN, FIFO_EN_BIT::GYRO_FIFO_EN | FIFO_EN_BIT::ACCEL_FIFO_EN, 0 }, { Register::INT_PIN_CFG, INT_PIN_CFG_BIT::INT_LEVEL | INT_PIN_CFG_BIT::LATCH_INT_EN | INT_PIN_CFG_BIT::INT_RD_CLEAR, 0 }, - { Register::INT_ENABLE, 0, INT_ENABLE_BIT::DATA_RDY_INT_EN } + { Register::INT_ENABLE, 0, INT_ENABLE_BIT::DATA_RDY_INT_EN }, + { Register::FIFO_WM_TH1, 0, 0 }, // FIFO_WM_TH[9:8] + { Register::FIFO_WM_TH2, 0, 0 }, // FIFO_WM_TH[7:0] + { Register::USER_CTRL, USER_CTRL_BIT::FIFO_EN, 0 }, + { Register::PWR_MGMT_1, PWR_MGMT_1_BIT::CLKSEL_0, PWR_MGMT_1_BIT::SLEEP }, + { Register::I2C_IF, I2C_IF_BIT::I2C_IF_DIS, 0 }, }; }; diff --git a/src/drivers/imu/invensense/icm20602/InvenSense_ICM20602_registers.hpp b/src/drivers/imu/invensense/icm20602/InvenSense_ICM20602_registers.hpp index 4da10d3892..110046544a 100644 --- a/src/drivers/imu/invensense/icm20602/InvenSense_ICM20602_registers.hpp +++ b/src/drivers/imu/invensense/icm20602/InvenSense_ICM20602_registers.hpp @@ -1,6 +1,6 @@ /**************************************************************************** * - * Copyright (c) 2019 PX4 Development Team. All rights reserved. + * Copyright (c) 2019-2020 PX4 Development Team. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -59,39 +59,44 @@ static constexpr uint8_t DIR_READ = 0x80; static constexpr uint8_t WHOAMI = 0x12; -static constexpr float TEMPERATURE_SENSITIVITY = 326.8f; // LSB/C -static constexpr float TEMPERATURE_OFFSET = 25.f; // C +static constexpr float TEMPERATURE_SENSITIVITY = 326.8f; // LSB/°C +static constexpr float TEMPERATURE_OFFSET = 25.f; // °C +static constexpr float TEMPERATURE_SENSOR_MIN = -40.f; // °C +static constexpr float TEMPERATURE_SENSOR_MAX = 85.f; // °C enum class Register : uint8_t { - CONFIG = 0x1A, - GYRO_CONFIG = 0x1B, - ACCEL_CONFIG = 0x1C, - ACCEL_CONFIG2 = 0x1D, + CONFIG = 0x1A, + GYRO_CONFIG = 0x1B, + ACCEL_CONFIG = 0x1C, + ACCEL_CONFIG2 = 0x1D, - FIFO_EN = 0x23, + FIFO_EN = 0x23, - INT_PIN_CFG = 0x37, - INT_ENABLE = 0x38, + INT_PIN_CFG = 0x37, + INT_ENABLE = 0x38, - TEMP_OUT_H = 0x41, - TEMP_OUT_L = 0x42, + TEMP_OUT_H = 0x41, + TEMP_OUT_L = 0x42, - FIFO_WM_TH1 = 0x60, - FIFO_WM_TH2 = 0x61, + FIFO_WM_TH1 = 0x60, + FIFO_WM_TH2 = 0x61, - USER_CTRL = 0x6A, - PWR_MGMT_1 = 0x6B, + SIGNAL_PATH_RESET = 0x68, - I2C_IF = 0x70, + USER_CTRL = 0x6A, + PWR_MGMT_1 = 0x6B, - FIFO_COUNTH = 0x72, - FIFO_COUNTL = 0x73, - FIFO_R_W = 0x74, - WHO_AM_I = 0x75, + I2C_IF = 0x70, + + FIFO_COUNTH = 0x72, + FIFO_COUNTL = 0x73, + FIFO_R_W = 0x74, + WHO_AM_I = 0x75, }; // CONFIG enum CONFIG_BIT : uint8_t { + // Bit7 - FIFO_WM_TH[9:0] User should ensure that bit 7 of register 0x1A is set to 0 before using this feature FIFO_MODE = Bit6, // when the FIFO is full, additional writes will not be written to FIFO DLPF_CFG_BYPASS_DLPF_8KHZ = 7, // Rate 8 kHz [2:0] @@ -139,8 +144,13 @@ enum INT_PIN_CFG_BIT : uint8_t { // INT_ENABLE enum INT_ENABLE_BIT : uint8_t { - FIFO_OFLOW_EN = Bit4, - DATA_RDY_INT_EN = Bit0 + DATA_RDY_INT_EN = Bit0, +}; + +// SIGNAL_PATH_RESET +enum SIGNAL_PATH_RESET_BIT : uint8_t { + ACCEL_RST = Bit1, + TEMP_RST = Bit0, }; // USER_CTRL @@ -155,9 +165,8 @@ enum PWR_MGMT_1_BIT : uint8_t { DEVICE_RESET = Bit7, SLEEP = Bit6, - CLKSEL_2 = Bit2, - CLKSEL_1 = Bit1, - CLKSEL_0 = Bit0, + // CLKSEL[2:0] + CLKSEL_0 = Bit0, // It is required that CLKSEL[2:0] be set to 001 to achieve full gyroscope performance. }; // I2C_IF