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synced 2026-04-14 10:07:39 +08:00
bmp388: check bus return code after register read
Check I2C/SPI bus transfer function return code after register read operation. Signed-off-by: Tero Salminen <tero.salminen@unikie.com>
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f95a2021cd
commit
e202e719b0
@ -68,7 +68,10 @@ BMP388::init()
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return -EIO;
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}
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_chip_id = _interface->get_reg(BMP3_CHIP_ID_ADDR);
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if (_interface->get_reg(BMP3_CHIP_ID_ADDR, &_chip_id) != OK) {
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PX4_WARN("failed to get chip id");
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return -EIO;
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}
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if (_chip_id != BMP388_CHIP_ID && _chip_id != BMP390_CHIP_ID) {
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PX4_WARN("id of your baro is not: 0x%02x or 0x%02x", BMP388_CHIP_ID, BMP390_CHIP_ID);
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@ -80,7 +83,10 @@ BMP388::init()
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this->_item_name = "bmp390";
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}
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_chip_rev_id = _interface->get_reg(BMP3_REV_ID_ADDR);
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if (_interface->get_reg(BMP3_REV_ID_ADDR, &_chip_rev_id) != OK) {
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PX4_WARN("failed to get chip rev id");
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return -EIO;
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}
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_cal = _interface->get_calibration(BMP3_CALIB_DATA_ADDR);
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@ -204,14 +210,22 @@ BMP388::soft_reset()
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uint8_t status;
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int ret;
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status = _interface->get_reg(BMP3_SENS_STATUS_REG_ADDR);
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ret = _interface->get_reg(BMP3_SENS_STATUS_REG_ADDR, &status);
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if (ret != OK) {
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return false;
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}
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if (status & BMP3_CMD_RDY) {
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ret = _interface->set_reg(BPM3_CMD_SOFT_RESET, BMP3_CMD_ADDR);
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if (ret == OK) {
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usleep(BMP3_POST_RESET_WAIT_TIME);
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status = _interface->get_reg(BMP3_ERR_REG_ADDR);
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ret = _interface->get_reg(BMP3_ERR_REG_ADDR, &status);
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if (ret != OK) {
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return false;
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}
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if ((status & BMP3_CMD_ERR) == 0) {
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result = true;
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@ -269,7 +283,9 @@ BMP388::validate_trimming_param()
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crc = (crc ^ 0xFF);
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stored_crc = _interface->get_reg(BMP3_TRIM_CRC_DATA_ADDR);
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if (_interface->get_reg(BMP3_TRIM_CRC_DATA_ADDR, &stored_crc) != OK) {
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return false;
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}
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return stored_crc == crc;
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}
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@ -404,7 +420,12 @@ BMP388::set_op_mode(uint8_t op_mode)
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uint8_t op_mode_reg_val;
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int ret = OK;
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op_mode_reg_val = _interface->get_reg(BMP3_PWR_CTRL_ADDR);
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ret = _interface->get_reg(BMP3_PWR_CTRL_ADDR, &op_mode_reg_val);
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if (ret != OK) {
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return false;
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}
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last_set_mode = BMP3_GET_BITS(op_mode_reg_val, BMP3_OP_MODE);
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/* Device needs to be put in sleep mode to transition */
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@ -420,7 +441,12 @@ BMP388::set_op_mode(uint8_t op_mode)
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}
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if (ret == OK) {
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op_mode_reg_val = _interface->get_reg(BMP3_PWR_CTRL_ADDR);
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ret = _interface->get_reg(BMP3_PWR_CTRL_ADDR, &op_mode_reg_val);
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if (ret != OK) {
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return false;
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}
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op_mode_reg_val = BMP3_SET_BITS(op_mode_reg_val, BMP3_OP_MODE, op_mode);
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ret = _interface->set_reg(op_mode_reg_val, BMP3_PWR_CTRL_ADDR);
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@ -292,7 +292,7 @@ public:
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virtual int init() = 0;
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// read reg value
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virtual uint8_t get_reg(uint8_t addr) = 0;
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virtual int get_reg(uint8_t addr, uint8_t *value) = 0;
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// bulk read reg value
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virtual int get_reg_buf(uint8_t addr, uint8_t *buf, uint8_t len) = 0;
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@ -49,7 +49,7 @@ public:
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int init();
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uint8_t get_reg(uint8_t addr);
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int get_reg(uint8_t addr, uint8_t *value);
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int get_reg_buf(uint8_t addr, uint8_t *buf, uint8_t len);
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int set_reg(uint8_t value, uint8_t addr);
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calibration_s *get_calibration(uint8_t addr);
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@ -78,12 +78,10 @@ int BMP388_I2C::init()
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return I2C::init();
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}
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uint8_t BMP388_I2C::get_reg(uint8_t addr)
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int BMP388_I2C::get_reg(uint8_t addr, uint8_t *value)
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{
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uint8_t cmd[2] = { (uint8_t)(addr), 0};
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transfer(&cmd[0], 1, &cmd[1], 1);
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return cmd[1];
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const uint8_t cmd = (uint8_t)(addr);
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return transfer(&cmd, sizeof(cmd), value, 1);
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}
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int BMP388_I2C::get_reg_buf(uint8_t addr, uint8_t *buf, uint8_t len)
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@ -66,7 +66,7 @@ public:
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int init();
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uint8_t get_reg(uint8_t addr);
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int get_reg(uint8_t addr, uint8_t *value);
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int get_reg_buf(uint8_t addr, uint8_t *buf, uint8_t len);
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int set_reg(uint8_t value, uint8_t addr);
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calibration_s *get_calibration(uint8_t addr);
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@ -95,12 +95,16 @@ int BMP388_SPI::init()
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return SPI::init();
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};
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uint8_t BMP388_SPI::get_reg(uint8_t addr)
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int BMP388_SPI::get_reg(uint8_t addr, uint8_t *value)
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{
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uint8_t cmd[2] = { (uint8_t)(addr | DIR_READ), 0}; //set MSB bit
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transfer(&cmd[0], &cmd[0], 2);
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int ret = transfer(&cmd[0], &cmd[0], 2);
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return cmd[1];
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if (ret == OK) {
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*value = cmd[1];
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}
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return ret;
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}
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int BMP388_SPI::get_reg_buf(uint8_t addr, uint8_t *buf, uint8_t len)
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