From dd70b3752a212796beedb5cfa17d894b4400ac9d Mon Sep 17 00:00:00 2001 From: Julian Oes Date: Sun, 31 Jul 2016 17:04:01 +0200 Subject: [PATCH] mpu9250: set accel DLPF to 41 Hz (#5177) Previously, the accel DLPF was not set, so it's not clear what the settings are or should be. --- src/drivers/mpu9250/mpu9250.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/drivers/mpu9250/mpu9250.cpp b/src/drivers/mpu9250/mpu9250.cpp index e9bc3e2462..02a21f52fd 100644 --- a/src/drivers/mpu9250/mpu9250.cpp +++ b/src/drivers/mpu9250/mpu9250.cpp @@ -169,6 +169,8 @@ #define BITS_DLPF_CFG_3600HZ 0x07 #define BITS_DLPF_CFG_MASK 0x07 +#define BITS_ACCEL_CONFIG2_41HZ 0x03 + #define BIT_RAW_RDY_EN 0x01 #define BIT_INT_ANYRD_2CLEAR 0x10 @@ -471,6 +473,9 @@ int MPU9250::reset() write_checked_reg(MPUREG_INT_PIN_CFG, BIT_INT_ANYRD_2CLEAR); // INT: Clear on any read usleep(1000); + write_checked_reg(MPUREG_ACCEL_CONFIG2, BITS_ACCEL_CONFIG2_41HZ); + usleep(1000); + uint8_t retries = 10; while (retries--) {