mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-10-18 13:53:34 +08:00
Merge branch 'master' of https://github.com/PX4/Firmware into fmuv2_bringup
This commit is contained in:
@@ -95,9 +95,16 @@ controls_tick() {
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*/
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perf_begin(c_gather_dsm);
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bool dsm_updated = dsm_input(r_raw_rc_values, &r_raw_rc_count);
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if (dsm_updated)
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uint16_t temp_count = r_raw_rc_count;
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bool dsm_updated = dsm_input(r_raw_rc_values, &temp_count);
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if (dsm_updated) {
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r_status_flags |= PX4IO_P_STATUS_FLAGS_RC_DSM;
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r_raw_rc_count = temp_count & 0x7fff;
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if (temp_count & 0x8000)
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r_status_flags |= PX4IO_P_STATUS_FLAGS_RC_DSM11;
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else
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r_status_flags &= ~PX4IO_P_STATUS_FLAGS_RC_DSM11;
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}
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perf_end(c_gather_dsm);
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perf_begin(c_gather_sbus);
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@@ -40,6 +40,7 @@
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*/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <fcntl.h>
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#include <unistd.h>
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@@ -101,6 +102,41 @@ dsm_init(const char *device)
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return dsm_fd;
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}
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void
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dsm_bind(uint16_t cmd, int pulses)
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{
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const uint32_t usart1RxAsOutp = GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN10;
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if (dsm_fd < 0)
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return;
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switch (cmd) {
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case dsm_bind_power_down:
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// power down DSM satellite
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POWER_RELAY1(0);
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break;
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case dsm_bind_power_up:
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POWER_RELAY1(1);
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dsm_guess_format(true);
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break;
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case dsm_bind_set_rx_out:
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stm32_configgpio(usart1RxAsOutp);
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break;
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case dsm_bind_send_pulses:
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for (int i = 0; i < pulses; i++) {
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stm32_gpiowrite(usart1RxAsOutp, false);
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up_udelay(50);
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stm32_gpiowrite(usart1RxAsOutp, true);
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up_udelay(50);
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}
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break;
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case dsm_bind_reinit_uart:
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// Restore USART rx pin
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stm32_configgpio(GPIO_USART1_RX);
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break;
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}
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}
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bool
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dsm_input(uint16_t *values, uint16_t *num_values)
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{
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@@ -218,7 +254,7 @@ dsm_guess_format(bool reset)
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/*
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* Iterate the set of sensible sniffed channel sets and see whether
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* decoding in 10 or 11-bit mode has yielded anything we recognise.
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* decoding in 10 or 11-bit mode has yielded anything we recognize.
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*
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* XXX Note that due to what seem to be bugs in the DSM2 high-resolution
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* stream, we may want to sniff for longer in some cases when we think we
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@@ -349,6 +385,9 @@ dsm_decode(hrt_abstime frame_time, uint16_t *values, uint16_t *num_values)
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values[channel] = value;
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}
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if (channel_shift == 11)
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*num_values |= 0x8000;
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/*
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* XXX Note that we may be in failsafe here; we need to work out how to detect that.
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*/
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@@ -106,6 +106,7 @@
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#define PX4IO_P_STATUS_FLAGS_ARM_SYNC (1 << 9) /* the arming state between IO and FMU is in sync */
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#define PX4IO_P_STATUS_FLAGS_INIT_OK (1 << 10) /* initialisation of the IO completed without error */
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#define PX4IO_P_STATUS_FLAGS_FAILSAFE (1 << 11) /* failsafe is active */
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#define PX4IO_P_STATUS_FLAGS_RC_DSM11 (1 << 12) /* DSM input is 11 bit data */
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#define PX4IO_P_STATUS_ALARMS 3 /* alarm flags - alarms latch, write 1 to a bit to clear it */
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#define PX4IO_P_STATUS_ALARMS_VBATT_LOW (1 << 0) /* [1] VBatt is very close to regulator dropout */
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@@ -169,7 +170,14 @@
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#define PX4IO_P_SETUP_VBATT_SCALE 6 /* [1] battery voltage correction factor (float) */
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#define PX4IO_P_SETUP_VSERVO_SCALE 6 /* [2] servo voltage correction factor (float) */
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/* 7 */
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#define PX4IO_P_SETUP_DSM 7 /* DSM bind state */
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enum { /* DSM bind states */
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dsm_bind_power_down = 0,
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dsm_bind_power_up,
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dsm_bind_set_rx_out,
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dsm_bind_send_pulses,
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dsm_bind_reinit_uart
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};
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/* 8 */
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#define PX4IO_P_SETUP_SET_DEBUG 9 /* debug level for IO board */
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@@ -200,6 +200,7 @@ extern void controls_init(void);
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extern void controls_tick(void);
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extern int dsm_init(const char *device);
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extern bool dsm_input(uint16_t *values, uint16_t *num_values);
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extern void dsm_bind(uint16_t cmd, int pulses);
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extern int sbus_init(const char *device);
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extern bool sbus_input(uint16_t *values, uint16_t *num_values);
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@@ -360,16 +360,16 @@ registers_set_one(uint8_t page, uint8_t offset, uint16_t value)
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value &= PX4IO_P_SETUP_RELAYS_VALID;
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r_setup_relays = value;
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#ifdef POWER_RELAY1
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POWER_RELAY1(value & (1 << 0) ? 1 : 0);
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POWER_RELAY1((value & PX4IO_P_SETUP_RELAYS_POWER1) ? 1 : 0);
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#endif
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#ifdef POWER_RELAY2
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POWER_RELAY2(value & (1 << 1) ? 1 : 0);
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POWER_RELAY2((value & PX4IO_P_SETUP_RELAYS_POWER2) ? 1 : 0);
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#endif
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#ifdef POWER_ACC1
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POWER_ACC1(value & (1 << 2) ? 1 : 0);
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POWER_ACC1((value & PX4IO_P_SETUP_RELAYS_ACC1) ? 1 : 0);
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#endif
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#ifdef POWER_ACC2
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POWER_ACC2(value & (1 << 3) ? 1 : 0);
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POWER_ACC2((value & PX4IO_P_SETUP_RELAYS_ACC2) ? 1 : 0);
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#endif
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break;
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@@ -382,6 +382,10 @@ registers_set_one(uint8_t page, uint8_t offset, uint16_t value)
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isr_debug(0, "set debug %u\n", (unsigned)r_page_setup[PX4IO_P_SETUP_SET_DEBUG]);
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break;
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case PX4IO_P_SETUP_DSM:
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dsm_bind(value & 0x0f, (value >> 4) & 7);
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break;
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default:
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return -1;
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}
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