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esp32: pwm register updates correctly on change (#25653)
- removed the bug where some overflow would occur on the PWM signal when changing the duty cycle of the signal after power up. (PWM_MAIN_DIS, PWM_MAIN_MIN or PWM_MAIN_MAX) removed commented code cleanup of previous cherry-pick Co-authored-by: henrykotze <henry@autonosky.com>
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@ -78,7 +78,6 @@
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#define LEDC_LSCH0_DUTY_REG (DR_REG_LEDC_BASE + 0x00A8)
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#define LEDC_CONF_REG (DR_REG_LEDC_BASE + 0x0190)
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#define LEDC_SIG_OUT_EN_LSCH0 1 << 2
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#define LEDC_PARA_UP_LSCH0 1 << 4
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#define DPORT_LEDC_CLK_EN 1 << 11
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@ -129,7 +128,8 @@ void get_optimal_timer_setup(uint32_t desired_freq)
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uint32_t shifted = 1;
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timer_rate = desired_freq;
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reload = (20480000000 / desired_freq + LEDC_CLKDIV_MAX) / LEDC_CLKDIV_MAX;
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uint64_t pwm_clk = 80000000;
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reload = (pwm_clk * 256 / desired_freq + LEDC_CLKDIV_MAX) / LEDC_CLKDIV_MAX;
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if (reload == 0) {
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reload = 1;
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@ -148,7 +148,7 @@ void get_optimal_timer_setup(uint32_t desired_freq)
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}
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shift = shifted;
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prescaler = (20480000000 / reload) / desired_freq;
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prescaler = (pwm_clk * 256 / reload) / desired_freq;
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}
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int up_pwm_servo_set(unsigned channel, uint16_t value)
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@ -157,10 +157,23 @@ int up_pwm_servo_set(unsigned channel, uint16_t value)
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uint32_t regval = b16toi(duty * reload + b16HALF);
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irqstate_t flags;
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flags = px4_enter_critical_section();
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SET_CHAN_REG(channel, LEDC_LSCH0_CONF0_REG, 0);
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SET_CHAN_REG(channel, LEDC_LSCH0_CONF1_REG, 0);
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/* Set pulse phase 0 */
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SET_CHAN_REG(channel, LEDC_LSCH0_HPOINT_REG, 0);
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SET_CHAN_REG(channel, LEDC_LSCH0_DUTY_REG, regval << 4);
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SET_CHAN_BITS(channel, LEDC_LSCH0_CONF0_REG, LEDC_SIG_OUT_EN_LSCH0);
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/* Start Duty counter */
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SET_CHAN_BITS(channel, LEDC_LSCH0_CONF1_REG, LEDC_DUTY_START_LSCH0);
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/* Update duty and phase to hardware */
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SET_CHAN_BITS(channel, LEDC_LSCH0_CONF0_REG, LEDC_PARA_UP_LSCH0);
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px4_leave_critical_section(flags);
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return OK;
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