From da5c61bf466b0e2b9e2db964d1e3a03a7cc64b40 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Mon, 5 Jul 2021 15:58:05 -0400 Subject: [PATCH] WIP: ctrl zero h7 pixracer pro sync --- .../ctrl-zero-h7/nuttx-config/include/board.h | 38 +++++++++---------- .../nuttx-config/include/board_dma_map.h | 9 +++-- .../ctrl-zero-h7/nuttx-config/nsh/defconfig | 4 -- .../nuttx-config/scripts/script.ld | 10 ----- .../nuttx-config/scripts/script.ld | 1 - 5 files changed, 24 insertions(+), 38 deletions(-) diff --git a/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h b/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h index 7dbde2d7d4..78a0048760 100644 --- a/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h +++ b/boards/mro/ctrl-zero-h7/nuttx-config/include/board.h @@ -221,32 +221,32 @@ /* UART/USART */ -#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */ -#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */ -#define GPIO_USART2_RTS GPIO_USART2_RTS_2 /* PD4 */ -#define GPIO_USART2_CTS GPIO_USART2_CTS_NSS_2 /* PD3 */ +#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */ +#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */ +#define GPIO_USART2_CTS GPIO_USART2_CTS_NSS_2 /* PD3 */ +#define GPIO_USART2_RTS GPIO_USART2_RTS_2 /* PD4 */ -#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */ -#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */ -#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */ -#define GPIO_USART3_CTS GPIO_USART3_CTS_NSS_2 /* PD11 */ +#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */ +#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */ +#define GPIO_USART3_CTS GPIO_USART3_CTS_NSS_2 /* PD11 */ +#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */ -#define GPIO_UART4_RX GPIO_UART4_RX_1 /* PA1 */ -#define GPIO_UART4_TX GPIO_UART4_TX_1 /* PA0 */ +#define GPIO_UART4_TX GPIO_UART4_TX_2 /* PA0 */ +#define GPIO_UART4_RX GPIO_UART4_RX_2 /* PA1 */ -#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */ -#define GPIO_USART6_TX GPIO_USART6_TX_2 /* PG14 */ +#define GPIO_USART6_TX 0 /* USART6 is RX-only */ +#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */ -#define GPIO_UART7_RX GPIO_UART7_RX_1 /* PE7 */ -#define GPIO_UART7_TX GPIO_UART7_TX_1 /* PE8 */ +#define GPIO_UART7_TX GPIO_UART7_TX_3 /* PE8 */ +#define GPIO_UART7_RX GPIO_UART7_RX_3 /* PE7 */ -#define GPIO_UART8_RX GPIO_UART8_RX_1 /* PE0 */ -#define GPIO_UART8_TX GPIO_UART8_TX_1 /* PE1 */ +#define GPIO_UART8_TX GPIO_UART8_TX_1 /* PE1 */ +#define GPIO_UART8_RX GPIO_UART8_RX_1 /* PE0 */ /* CAN */ -#define GPIO_CAN1_RX GPIO_CAN1_RX_3 /* PD0 */ -#define GPIO_CAN1_TX GPIO_CAN1_TX_3 /* PD1 */ +#define GPIO_CAN1_RX GPIO_CAN1_RX_3 /* PD0 */ +#define GPIO_CAN1_TX GPIO_CAN1_TX_3 /* PD1 */ /* SPI */ @@ -262,7 +262,7 @@ #define GPIO_SPI5_SCK ADJ_SLEW_RATE(GPIO_SPI5_SCK_1) /* PF7 */ #define GPIO_SPI5_MISO GPIO_SPI5_MISO_1 /* PF8 */ -#define GPIO_SPI5_MOSI GPIO_SPI5_MOSI_1 /* PF9 */ +#define GPIO_SPI5_MOSI GPIO_SPI5_MOSI_2 /* PF9 */ /* I2C */ diff --git a/boards/mro/ctrl-zero-h7/nuttx-config/include/board_dma_map.h b/boards/mro/ctrl-zero-h7/nuttx-config/include/board_dma_map.h index 10011ed371..305764b152 100644 --- a/boards/mro/ctrl-zero-h7/nuttx-config/include/board_dma_map.h +++ b/boards/mro/ctrl-zero-h7/nuttx-config/include/board_dma_map.h @@ -37,8 +37,9 @@ #define DMAMAP_SPI1_RX DMAMAP_DMA12_SPI1RX_0 /* DMA1:37 */ #define DMAMAP_SPI1_TX DMAMAP_DMA12_SPI1TX_0 /* DMA1:38 */ -#define DMAMAP_USART6_RX DMAMAP_DMA12_USART6RX_1 /* DMA1:71 */ -#define DMAMAP_USART6_TX DMAMAP_DMA12_USART6TX_1 /* DMA1:72 */ +#define DMAMAP_SPI2_RX DMAMAP_DMA12_SPI2RX_0 /* DMA1:39 */ +#define DMAMAP_SPI2_TX DMAMAP_DMA12_SPI2TX_0 /* DMA1:40 */ + +#define DMAMAP_SPI5_RX DMAMAP_DMA12_SPI5RX_0 /* DMA1:85 */ +#define DMAMAP_SPI5_TX DMAMAP_DMA12_SPI5TX_0 /* DMA1:86 */ -#define DMAMAP_SPI5_RX DMAMAP_DMA12_SPI5RX_0 /* DMA1:83 */ -#define DMAMAP_SPI5_TX DMAMAP_DMA12_SPI5TX_0 /* DMA1:84 */ diff --git a/boards/mro/ctrl-zero-h7/nuttx-config/nsh/defconfig b/boards/mro/ctrl-zero-h7/nuttx-config/nsh/defconfig index d102d89112..2899868c3a 100644 --- a/boards/mro/ctrl-zero-h7/nuttx-config/nsh/defconfig +++ b/boards/mro/ctrl-zero-h7/nuttx-config/nsh/defconfig @@ -53,13 +53,11 @@ CONFIG_CDCACM_VENDORSTR="mRo" CONFIG_CLOCK_MONOTONIC=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_HARDFAULT_ALERT=y -CONFIG_DEBUG_MEMFAULT=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DEFAULT_SMALL=y CONFIG_DEV_FIFO_SIZE=0 CONFIG_DEV_PIPE_MAXSIZE=1024 CONFIG_DEV_PIPE_SIZE=70 -CONFIG_DISABLE_MQUEUE=y CONFIG_EXPERIMENTAL=y CONFIG_FAT_DMAMEMORY=y CONFIG_FAT_LCNAMES=y @@ -188,10 +186,8 @@ CONFIG_STM32H7_SPI5_DMA_BUFFER=1024 CONFIG_STM32H7_SPI_DMA=y CONFIG_STM32H7_SPI_DMATHRESHOLD=8 CONFIG_STM32H7_TIM1=y -CONFIG_STM32H7_TIM2=y CONFIG_STM32H7_TIM3=y CONFIG_STM32H7_TIM4=y -CONFIG_STM32H7_TIM8=y CONFIG_STM32H7_UART4=y CONFIG_STM32H7_UART7=y CONFIG_STM32H7_UART8=y diff --git a/boards/mro/ctrl-zero-h7/nuttx-config/scripts/script.ld b/boards/mro/ctrl-zero-h7/nuttx-config/scripts/script.ld index 076ff3dcee..5c455e0c6d 100644 --- a/boards/mro/ctrl-zero-h7/nuttx-config/scripts/script.ld +++ b/boards/mro/ctrl-zero-h7/nuttx-config/scripts/script.ld @@ -206,7 +206,6 @@ SECTIONS _sram4_heap_start = ABSOLUTE(.); } > SRAM4 - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -220,13 +219,4 @@ SECTIONS .debug_line 0 : { *(.debug_line) } .debug_pubnames 0 : { *(.debug_pubnames) } .debug_aranges 0 : { *(.debug_aranges) } - - .ramfunc : { - _sramfuncs = .; - *(.ramfunc .ramfunc.*) - . = ALIGN(4); - _eramfuncs = .; - } > ITCM_RAM AT > FLASH - - _framfuncs = LOADADDR(.ramfunc); } diff --git a/boards/mro/pixracerpro/nuttx-config/scripts/script.ld b/boards/mro/pixracerpro/nuttx-config/scripts/script.ld index 68343681c0..91c5b9a4b3 100644 --- a/boards/mro/pixracerpro/nuttx-config/scripts/script.ld +++ b/boards/mro/pixracerpro/nuttx-config/scripts/script.ld @@ -198,7 +198,6 @@ SECTIONS } > AXI_SRAM /* Emit the the D3 power domain section for locating BDMA data */ - .sram4_reserve (NOLOAD) : { *(.sram4)