Interrupt priority fix + new LM3S header files

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4792 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
2012-06-01 13:22:27 +00:00
parent 904c756f81
commit d704edcac6
5 changed files with 270 additions and 19 deletions
+6
View File
@@ -2854,4 +2854,10 @@
distinguish command and data. But FSMC address bits 0-24 correspond to ARM
address bits 1-25, se we need to set bit 17 in order generate output on
FSMC_A16.
* arch/arm/src/lm3s/lm3s_epi.h and lm3s_timer.h: LM3S header files
(contributed by Max Neklyudov).
* arch/arm/src/stm32/stm32_irq.c: Some of the interrupt priorities were
not be initialized (F2 and F4 only). Thus, the very high numbered
interrupts (like UART6) and cause nested interrupts. This leads to
some very difficult to debug crashes. Fix contributed by Mike Smith.