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Interrupt priority fix + new LM3S header files
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4792 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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@@ -2854,4 +2854,10 @@
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distinguish command and data. But FSMC address bits 0-24 correspond to ARM
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address bits 1-25, se we need to set bit 17 in order generate output on
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FSMC_A16.
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* arch/arm/src/lm3s/lm3s_epi.h and lm3s_timer.h: LM3S header files
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(contributed by Max Neklyudov).
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* arch/arm/src/stm32/stm32_irq.c: Some of the interrupt priorities were
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not be initialized (F2 and F4 only). Thus, the very high numbered
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interrupts (like UART6) and cause nested interrupts. This leads to
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some very difficult to debug crashes. Fix contributed by Mike Smith.
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