More Kconfig files

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4624 7fd9a85b-ad96-42d3-883c-3090e2eb8679

nuttx/arch/arm/Kconfig

@@ -75,6 +75,27 @@ config ARCH_CHIP_STR71X
 
 endchoice
 
+config ARCH_ARM7TDMI
+	bool
+	default y			if ARCH_CHIP_C5471 || ARCH_CHIP_CALYPSO || ARCH_CHIP_LPC214X || ARCH_CHIP_LPC2378 || ARCH_CHIP_STR71X
+
+config ARCH_ARM926EJS
+	bool
+	default y			if ARCH_CHIP_DM320 || ARCH_CHIP_LPC31XX
+
+config ARCH_ARM920T
+	bool
+	default y			if ARCH_CHIP_IMX
+
+config ARCH_CORTEXM
+	bool
+	default y			if ARCH_CHIP_KINETIS || ARCH_CHIP_LM3S || ARCH_CHIP_LPC17XX || ARCH_CHIP_SAM3U || ARCH_CHIP_STM32
+
+config ARCH_FAMILY
+	string
+	default "arm"		if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
+	default "armv7-m"	if ARCH_CORTEXM
+
 config ARCH
 	string
 	default "c5471"		if ARCH_CHIP_C5471

nuttx/arch/arm/src/stm32/stm32_iwdg.c

@@ -292,12 +292,15 @@ static inline void stm32_setprescaler(FAR struct stm32_lowerhalf_s *priv)
 
   stm32_putreg(IWDG_KR_KEY_ENABLE, STM32_IWDG_KR);
 
-  /* Wait for the PVU anrd RVU bit to be reset be hardware.  These bits
+  /* Wait for the PVU and RVU bits to be reset be hardware.  These bits
    * were set the last time that the PR register was written and may not
    * yet be cleared.
+   *
+   * If the setup is only permitted one time, then this wait should not
+   * be necessary.
    */
 
-#ifdef CONFIG_STM32_IWDG_DEFERREDSETUP
+#ifndef CONFIG_STM32_IWDG_ONETIMESETUP
   while ((stm32_getreg(STM32_IWDG_SR) & (IWDG_SR_PVU|IWDG_SR_RVU)) != 0);
 #endif