bmi055 initial integration

This commit is contained in:
Sergej Scheiermann
2017-04-24 10:38:39 +02:00
committed by Lorenz Meier
parent 061bff14c8
commit cfed8ee2dd
10 changed files with 3144 additions and 1 deletions
+8 -1
View File
@@ -86,6 +86,10 @@
#define GPIO_SPI_CS_FRAM (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN10)
#define GPIO_SPI_CS_BMI055_ACC (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN15)
#define GPIO_SPI_CS_BMI055_GYR (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15)
/* Define the Ready interrupts */
#define GPIO_DRDY_MPU9250 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN15)
@@ -105,9 +109,10 @@
#define GPIO_SPI_CS_OFF_MS5611 _PIN_OFF(GPIO_SPI_CS_MS5611)
#define GPIO_SPI_CS_OFF_ICM_2060X _PIN_OFF(GPIO_SPI_CS_ICM_2060X)
#define GPIO_SPI_CS_OFF_BMI160 _PIN_OFF(GPIO_SPI_CS_BMI160)
#define GPIO_SPI_CS_OFF_BMI055_ACC _PIN_OFF(GPIO_SPI_CS_BMI055_ACC)
#define GPIO_SPI_CS_OFF_BMI055_GYR _PIN_OFF(GPIO_SPI_CS_BMI055_GYR)
#define GPIO_DRDY_OFF_MPU9250 _PIN_OFF(GPIO_DRDY_MPU9250)
#define GPIO_DRDY_OFF_HMC5983 _PIN_OFF(GPIO_DRDY_HMC5983)
#define GPIO_DRDY_OFF_ICM_2060X _PIN_OFF(GPIO_DRDY_ICM_2060X)
/* SPI1 off */
@@ -130,6 +135,8 @@
#define PX4_SPIDEV_BMA 9
#define PX4_SPIDEV_ICM_20608 10
#define PX4_SPIDEV_ICM_20602 11
#define PX4_SPIDEV_BMI055_ACC 12
#define PX4_SPIDEV_BMI055_GYR 13
/* onboard MS5611 and FRAM are both on bus SPI2
* spi_dev_e:SPIDEV_FLASH has the value 2 and is used in the NuttX ramtron driver
+50
View File
@@ -77,6 +77,20 @@ __EXPORT void stm32_spiinitialize(void)
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_2060X);
px4_arch_configgpio(GPIO_SPI_CS_BMI160);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_ACC);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_GYR);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_configgpio(GPIO_DRDY_MPU9250);
px4_arch_configgpio(GPIO_DRDY_HMC5983);
@@ -103,6 +117,8 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_ICM_20608:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
@@ -116,6 +132,8 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
@@ -125,6 +143,8 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_HMC:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
@@ -134,6 +154,8 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
@@ -146,9 +168,31 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, !selected);
break;
case PX4_SPIDEV_BMI055_ACC:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, !selected);
break;
case PX4_SPIDEV_BMI055_GYR:
/* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_2060X, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_ACC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BMI055_GYR, !selected);
break;
default:
break;
}
@@ -198,12 +242,16 @@ __EXPORT void board_spi_reset(int ms)
px4_arch_configgpio(GPIO_SPI_CS_OFF_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_OFF_ICM_2060X);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI160);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_ACC);
px4_arch_configgpio(GPIO_SPI_CS_OFF_BMI055_GYR);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MPU9250, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_HMC5983, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MS5611, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_ICM_2060X, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI160, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI055_ACC, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI055_GYR, 0);
stm32_configgpio(GPIO_SPI1_SCK_OFF);
stm32_configgpio(GPIO_SPI1_MISO_OFF);
@@ -244,6 +292,8 @@ __EXPORT void board_spi_reset(int ms)
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_2060X);
px4_arch_configgpio(GPIO_SPI_CS_BMI160);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_ACC);
px4_arch_configgpio(GPIO_SPI_CS_BMI055_GYR);
stm32_configgpio(GPIO_SPI1_SCK);
stm32_configgpio(GPIO_SPI1_MISO);