mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-11-03 08:01:36 +08:00
nuttx-configs fix code style
This commit is contained in:
committed by
Lorenz Meier
parent
b55fe24161
commit
c147424fe7
@@ -145,7 +145,7 @@
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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* Note: TIM1,8 are on APB2, others on APB1
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*/
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*/
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@@ -203,7 +203,7 @@
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/*
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/*
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* SPI
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* SPI
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*/
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*/
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/* PA[4-7] SPI1 broken out on J12 */
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/* PA[4-7] SPI1 broken out on J12 */
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#define GPIO_SPI1_NSS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) /* should be GPIO_SPI1_NSS_2 but use as a GPIO */
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#define GPIO_SPI1_NSS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) /* should be GPIO_SPI1_NSS_2 but use as a GPIO */
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#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
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@@ -1,4 +1,4 @@
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/*
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/*
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* There are no source files here, but libboard.a can't be empty, so
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* There are no source files here, but libboard.a can't be empty, so
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* we have this empty source file to keep it company.
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* we have this empty source file to keep it company.
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*/
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*/
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@@ -209,7 +209,7 @@
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/* UART DMA configuration for USART1/6 */
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/* UART DMA configuration for USART1/6 */
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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/*
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/*
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* CAN
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* CAN
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*
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*
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@@ -1,4 +1,4 @@
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/*
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/*
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* There are no source files here, but libboard.a can't be empty, so
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* There are no source files here, but libboard.a can't be empty, so
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* we have this empty source file to keep it company.
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* we have this empty source file to keep it company.
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*/
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*/
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@@ -146,21 +146,21 @@
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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* Note: TIM1,8 are on APB2, others on APB1
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*/
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*/
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#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
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#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
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#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
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#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled
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* in order to avoid RX overrun/TX underrun errors due to delayed responses
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* in order to avoid RX overrun/TX underrun errors due to delayed responses
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* to service FIFOs in interrupt driven mode. These values have not been
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* to service FIFOs in interrupt driven mode. These values have not been
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* tuned!!!
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* tuned!!!
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*
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*
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* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
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* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
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*/
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*/
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#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
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#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
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/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
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/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
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@@ -168,9 +168,9 @@
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*/
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*/
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#ifdef CONFIG_SDIO_DMA
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#ifdef CONFIG_SDIO_DMA
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# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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#else
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# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
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# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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#endif
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/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
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/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
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@@ -227,10 +227,10 @@
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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/*
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/*
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* CAN
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* CAN
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*
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*
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* CAN1 is routed to the onboard transceiver.
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* CAN1 is routed to the onboard transceiver.
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* CAN2 is routed to the expansion connector.
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* CAN2 is routed to the expansion connector.
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*/
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*/
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#define GPIO_CAN1_RX GPIO_CAN1_RX_3
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#define GPIO_CAN1_RX GPIO_CAN1_RX_3
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@@ -1,4 +1,4 @@
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/*
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/*
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* There are no source files here, but libboard.a can't be empty, so
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* There are no source files here, but libboard.a can't be empty, so
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* we have this empty source file to keep it company.
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* we have this empty source file to keep it company.
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*/
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*/
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@@ -143,7 +143,7 @@ extern "C" {
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************************************************************************************/
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************************************************************************************/
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EXTERN void stm32_boardinitialize(void);
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EXTERN void stm32_boardinitialize(void);
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#if defined(__cplusplus)
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#if defined(__cplusplus)
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}
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}
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#endif
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#endif
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@@ -1,4 +1,4 @@
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/*
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/*
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* There are no source files here, but libboard.a can't be empty, so
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* There are no source files here, but libboard.a can't be empty, so
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* we have this empty source file to keep it company.
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* we have this empty source file to keep it company.
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*/
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*/
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@@ -138,7 +138,7 @@ extern "C" {
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************************************************************************************/
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************************************************************************************/
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EXTERN void stm32_boardinitialize(void);
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EXTERN void stm32_boardinitialize(void);
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#if defined(__cplusplus)
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#if defined(__cplusplus)
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}
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}
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#endif
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#endif
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@@ -1,4 +1,4 @@
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/*
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/*
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* There are no source files here, but libboard.a can't be empty, so
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* There are no source files here, but libboard.a can't be empty, so
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* we have this empty source file to keep it company.
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* we have this empty source file to keep it company.
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*/
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*/
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