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HOTFIX: disable interrupt-driven I2C mode, configure pessimistic I2C timeout, correct handling of the NAK generation for I2C master reads.
This looks like it addresses the recent I2C lockup issue, unfortunately it also increases CPU consumption by ~5% for the I2C sensor bus.
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@@ -352,17 +352,19 @@ CONFIG_CAN2_BAUD=700000
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# I2C configuration
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#
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CONFIG_I2C=y
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#CONFIG_I2C_POLLED=y
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CONFIG_I2C_POLLED=y
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CONFIG_I2C_TRANSFER=y
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CONFIG_I2C_TRACE=n
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CONFIG_I2C_RESET=y
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# Allow 180 us per byte, a wide margin for the 400 KHz clock we're using
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# e.g. 9.6 ms for an EEPROM page write, 0.9 ms for a MAG update
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CONFIG_STM32_I2CTIMEOUS_PER_BYTE=200
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# Constant overhead for generating I2C start / stop conditions
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CONFIG_STM32_I2CTIMEOUS_START_STOP=700
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# XXX this is bad and we want it gone
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CONFIG_I2C_WRITEREAD=y
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# Dynamic timeout
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#CONFIG_STM32_I2C_DYNTIMEO=y
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#CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP=500
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#CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE=200
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# Fixed per-transaction timeout
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CONFIG_STM32_I2CTIMEOSEC=0
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CONFIG_STM32_I2CTIMEOMS=10
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#
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# General build options
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