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https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-10-25 06:03:33 +08:00
Revise recent changes to serial driver error handling: Errors other than EINTR may be returned when the driver is used very early in initialization. STM32 SPI driver will now survive repeated initializations
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5026 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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@@ -1368,15 +1368,20 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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priv = &g_spi1dev;
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/* Configure SPI1 pins: SCK, MISO, and MOSI */
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/* Only configure if the port is not already configured */
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stm32_configgpio(GPIO_SPI1_SCK);
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stm32_configgpio(GPIO_SPI1_MISO);
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stm32_configgpio(GPIO_SPI1_MOSI);
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if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
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{
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/* Configure SPI1 pins: SCK, MISO, and MOSI */
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/* Set up default configuration: Master, 8-bit, etc. */
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stm32_configgpio(GPIO_SPI1_SCK);
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stm32_configgpio(GPIO_SPI1_MISO);
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stm32_configgpio(GPIO_SPI1_MOSI);
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spi_portinitialize(priv);
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/* Set up default configuration: Master, 8-bit, etc. */
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spi_portinitialize(priv);
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}
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}
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else
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#endif
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@@ -1387,15 +1392,20 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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priv = &g_spi2dev;
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/* Configure SPI2 pins: SCK, MISO, and MOSI */
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/* Only configure if the port is not already configured */
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stm32_configgpio(GPIO_SPI2_SCK);
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stm32_configgpio(GPIO_SPI2_MISO);
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stm32_configgpio(GPIO_SPI2_MOSI);
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if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
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{
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/* Configure SPI2 pins: SCK, MISO, and MOSI */
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/* Set up default configuration: Master, 8-bit, etc. */
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stm32_configgpio(GPIO_SPI2_SCK);
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stm32_configgpio(GPIO_SPI2_MISO);
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stm32_configgpio(GPIO_SPI2_MOSI);
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spi_portinitialize(priv);
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/* Set up default configuration: Master, 8-bit, etc. */
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spi_portinitialize(priv);
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}
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}
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else
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#endif
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@@ -1406,15 +1416,20 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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priv = &g_spi3dev;
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/* Configure SPI3 pins: SCK, MISO, and MOSI */
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/* Only configure if the port is not already configured */
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stm32_configgpio(GPIO_SPI3_SCK);
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stm32_configgpio(GPIO_SPI3_MISO);
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stm32_configgpio(GPIO_SPI3_MOSI);
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if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
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{
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/* Configure SPI3 pins: SCK, MISO, and MOSI */
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/* Set up default configuration: Master, 8-bit, etc. */
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stm32_configgpio(GPIO_SPI3_SCK);
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stm32_configgpio(GPIO_SPI3_MISO);
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stm32_configgpio(GPIO_SPI3_MOSI);
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spi_portinitialize(priv);
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/* Set up default configuration: Master, 8-bit, etc. */
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spi_portinitialize(priv);
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}
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}
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#endif
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