mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-10-30 07:43:34 +08:00
boards: remove BOARD_HAS_PWM and use DIRECT_PWM_OUTPUT_CHANNELS
This commit is contained in:
@@ -153,7 +153,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (0)
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#define BOARD_ADC_PERIPH_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -139,7 +139,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -153,7 +153,6 @@
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#define HRT_TIMER 8 /* use timer8 for the HRT */
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#define HRT_TIMER 8 /* use timer8 for the HRT */
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#define HRT_TIMER_CHANNEL 1 /* use capture/compare channel */
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#define HRT_TIMER_CHANNEL 1 /* use capture/compare channel */
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_ENABLE_CONSOLE_BUFFER
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#define BOARD_ENABLE_CONSOLE_BUFFER
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#define BOARD_CONSOLE_BUFFER_SIZE (1024*3)
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#define BOARD_CONSOLE_BUFFER_SIZE (1024*3)
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@@ -154,7 +154,6 @@
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#define HRT_TIMER 8 /* use timer8 for the HRT */
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#define HRT_TIMER 8 /* use timer8 for the HRT */
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#define HRT_TIMER_CHANNEL 1 /* use capture/compare channel */
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#define HRT_TIMER_CHANNEL 1 /* use capture/compare channel */
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_ENABLE_CONSOLE_BUFFER
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#define BOARD_ENABLE_CONSOLE_BUFFER
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#define BOARD_CONSOLE_BUFFER_SIZE (1024*3)
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#define BOARD_CONSOLE_BUFFER_SIZE (1024*3)
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@@ -199,7 +199,6 @@
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/* This board provides the board_on_reset interface */
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/* This board provides the board_on_reset interface */
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#define BOARD_HAS_ON_RESET 1
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#define BOARD_HAS_ON_RESET 1
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_ENABLE_CONSOLE_BUFFER
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#define BOARD_ENABLE_CONSOLE_BUFFER
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@@ -199,7 +199,6 @@
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/* This board provides the board_on_reset interface */
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/* This board provides the board_on_reset interface */
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#define BOARD_HAS_ON_RESET 1
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#define BOARD_HAS_ON_RESET 1
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_ENABLE_CONSOLE_BUFFER
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#define BOARD_ENABLE_CONSOLE_BUFFER
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@@ -148,7 +148,6 @@
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5};
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#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5};
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@@ -143,7 +143,6 @@
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5};
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#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5};
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@@ -332,7 +332,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -122,7 +122,6 @@
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#define GPIO_RSSI_IN /* PC5 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTC|GPIO_PIN5)
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#define GPIO_RSSI_IN /* PC5 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTC|GPIO_PIN5)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -422,7 +422,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -236,7 +236,6 @@
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#define BOARD_ADC_BRICK_VALID (1)
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#define BOARD_ADC_BRICK_VALID (1)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -328,7 +328,6 @@
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# error Unsupported BOARD_HAS_LTC44XX_VALIDS value
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# error Unsupported BOARD_HAS_LTC44XX_VALIDS value
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#endif
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#endif
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -178,7 +178,6 @@
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#define BOARD_ADC_SERVO_VALID (1) /* never powers off the Servo rail */
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#define BOARD_ADC_SERVO_VALID (1) /* never powers off the Servo rail */
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#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK1_VALID))
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#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK1_VALID))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -177,7 +177,6 @@
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#define BOARD_ADC_SERVO_VALID (1) /* never powers off the Servo rail */
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#define BOARD_ADC_SERVO_VALID (1) /* never powers off the Servo rail */
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#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK1_VALID))
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#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK1_VALID))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -156,7 +156,6 @@
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_NUM_IO_TIMERS 3
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#define BOARD_NUM_IO_TIMERS 3
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@@ -155,7 +155,6 @@
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_STATIC_MANIFEST 1
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_NUM_IO_TIMERS 3
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#define BOARD_NUM_IO_TIMERS 3
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@@ -146,7 +146,6 @@
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#define BOARD_ADC_USB_VALID BOARD_ADC_USB_CONNECTED
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#define BOARD_ADC_USB_VALID BOARD_ADC_USB_CONNECTED
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#define BOARD_ADC_BRICK_VALID (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
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#define BOARD_ADC_BRICK_VALID (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_NUM_IO_TIMERS 3
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#define BOARD_NUM_IO_TIMERS 3
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#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5, 6, 7};
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#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5, 6, 7};
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120 /* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120 /* This board provides a DMA pool and APIs */
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@@ -118,7 +118,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -129,7 +129,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -330,7 +330,6 @@ __END_DECLS
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#define BOARD_ADC_PERIPH_5V_OC (0)
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#define BOARD_ADC_PERIPH_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_HAS_LED_PWM 1
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#define BOARD_HAS_LED_PWM 1
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@@ -334,7 +334,6 @@ __END_DECLS
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#define BOARD_ADC_PERIPH_5V_OC (0)
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#define BOARD_ADC_PERIPH_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_HAS_LED_PWM 1
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#define BOARD_HAS_LED_PWM 1
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@@ -391,7 +391,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -108,7 +108,6 @@ __BEGIN_DECLS
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#define DIRECT_PWM_OUTPUT_CHANNELS 1
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#define DIRECT_PWM_OUTPUT_CHANNELS 1
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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#define BOARD_HAS_LED_PWM 1
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#define BOARD_HAS_LED_PWM 1
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#define BOARD_LED_PWM_DRIVE_ACTIVE_LOW 1
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#define BOARD_LED_PWM_DRIVE_ACTIVE_LOW 1
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@@ -121,9 +121,6 @@
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#define DIRECT_PWM_OUTPUT_CHANNELS 4
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#define DIRECT_PWM_OUTPUT_CHANNELS 4
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#define DIRECT_INPUT_TIMER_CHANNELS 4
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#define DIRECT_INPUT_TIMER_CHANNELS 4
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// Has pwm outputs
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* High-resolution timer */
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/* High-resolution timer */
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#define HRT_TIMER 4 // T4C1
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#define HRT_TIMER 4 // T4C1
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#define HRT_TIMER_CHANNEL 1 // use capture/compare channel 1
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#define HRT_TIMER_CHANNEL 1 // use capture/compare channel 1
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@@ -147,7 +144,6 @@
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//#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
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//#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
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//#define SPEKTRUM_OUT(_one_true) px4_arch_gpiowrite(GPIO_PPM_IN_AS_OUT, (_one_true))
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//#define SPEKTRUM_OUT(_one_true) px4_arch_gpiowrite(GPIO_PPM_IN_AS_OUT, (_one_true))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -159,7 +159,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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||||||
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -159,7 +159,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
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||||||
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
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#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -179,7 +179,6 @@
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#define BOARD_ADC_PERIPH_5V_OC (0)
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#define BOARD_ADC_PERIPH_5V_OC (0)
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||||||
#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_ADC_HIPOWER_5V_OC (0)
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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||||||
/* This board provides a DMA pool and APIs */
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/* This board provides a DMA pool and APIs */
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||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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@@ -196,7 +196,6 @@
|
|||||||
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
|
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
|
||||||
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
|
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
|
||||||
|
|
||||||
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
|
|
||||||
|
|
||||||
/* This board provides a DMA pool and APIs */
|
/* This board provides a DMA pool and APIs */
|
||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
||||||
|
|||||||
@@ -427,7 +427,6 @@
|
|||||||
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
|
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC))
|
||||||
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
|
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC))
|
||||||
|
|
||||||
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
|
|
||||||
|
|
||||||
/* This board provides a DMA pool and APIs */
|
/* This board provides a DMA pool and APIs */
|
||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
||||||
|
|||||||
@@ -404,7 +404,6 @@
|
|||||||
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC))
|
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC))
|
||||||
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC))
|
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC))
|
||||||
|
|
||||||
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
|
|
||||||
|
|
||||||
/* This board provides a DMA pool and APIs */
|
/* This board provides a DMA pool and APIs */
|
||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
||||||
|
|||||||
@@ -380,7 +380,6 @@
|
|||||||
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC))
|
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC))
|
||||||
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC))
|
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC))
|
||||||
|
|
||||||
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
|
|
||||||
|
|
||||||
/* This board provides a DMA pool and APIs */
|
/* This board provides a DMA pool and APIs */
|
||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
||||||
|
|||||||
@@ -427,7 +427,6 @@
|
|||||||
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC))
|
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_nOC))
|
||||||
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC))
|
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_nOC))
|
||||||
|
|
||||||
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
|
|
||||||
|
|
||||||
/* This board provides a DMA pool and APIs */
|
/* This board provides a DMA pool and APIs */
|
||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
||||||
|
|||||||
@@ -122,7 +122,6 @@
|
|||||||
#define SDIO_SLOTNO 0 /* Only one slot */
|
#define SDIO_SLOTNO 0 /* Only one slot */
|
||||||
#define SDIO_MINOR 0
|
#define SDIO_MINOR 0
|
||||||
|
|
||||||
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
|
|
||||||
|
|
||||||
/* This board provides a DMA pool and APIs */
|
/* This board provides a DMA pool and APIs */
|
||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
||||||
|
|||||||
@@ -177,7 +177,6 @@
|
|||||||
#define BOARD_ADC_PERIPH_5V_OC (0)
|
#define BOARD_ADC_PERIPH_5V_OC (0)
|
||||||
#define BOARD_ADC_HIPOWER_5V_OC (0)
|
#define BOARD_ADC_HIPOWER_5V_OC (0)
|
||||||
|
|
||||||
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
|
|
||||||
|
|
||||||
/* This board provides a DMA pool and APIs */
|
/* This board provides a DMA pool and APIs */
|
||||||
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
#define BOARD_DMA_ALLOC_POOL_SIZE 5120
|
||||||
|
|||||||
@@ -44,8 +44,8 @@
|
|||||||
|
|
||||||
using namespace time_literals;
|
using namespace time_literals;
|
||||||
|
|
||||||
#if !defined(BOARD_HAS_PWM)
|
#if !defined(DIRECT_PWM_OUTPUT_CHANNELS)
|
||||||
# error "board_config.h needs to define BOARD_HAS_PWM"
|
# error "board_config.h needs to define DIRECT_PWM_OUTPUT_CHANNELS"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/** Dshot PWM frequency, Hz */
|
/** Dshot PWM frequency, Hz */
|
||||||
|
|||||||
@@ -837,7 +837,7 @@ int PWMOut::pwm_ioctl(file *filp, int cmd, unsigned long arg)
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 14
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 14
|
||||||
|
|
||||||
case PWM_SERVO_SET(13):
|
case PWM_SERVO_SET(13):
|
||||||
case PWM_SERVO_SET(12):
|
case PWM_SERVO_SET(12):
|
||||||
@@ -846,14 +846,14 @@ int PWMOut::pwm_ioctl(file *filp, int cmd, unsigned long arg)
|
|||||||
case PWM_SERVO_SET(9):
|
case PWM_SERVO_SET(9):
|
||||||
case PWM_SERVO_SET(8):
|
case PWM_SERVO_SET(8):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 8
|
||||||
case PWM_SERVO_SET(7):
|
case PWM_SERVO_SET(7):
|
||||||
case PWM_SERVO_SET(6):
|
case PWM_SERVO_SET(6):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 6
|
||||||
case PWM_SERVO_SET(5):
|
case PWM_SERVO_SET(5):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 5
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 5
|
||||||
case PWM_SERVO_SET(4):
|
case PWM_SERVO_SET(4):
|
||||||
#endif
|
#endif
|
||||||
case PWM_SERVO_SET(3):
|
case PWM_SERVO_SET(3):
|
||||||
@@ -874,7 +874,7 @@ int PWMOut::pwm_ioctl(file *filp, int cmd, unsigned long arg)
|
|||||||
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 14
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 14
|
||||||
|
|
||||||
case PWM_SERVO_GET(13):
|
case PWM_SERVO_GET(13):
|
||||||
case PWM_SERVO_GET(12):
|
case PWM_SERVO_GET(12):
|
||||||
@@ -883,14 +883,14 @@ int PWMOut::pwm_ioctl(file *filp, int cmd, unsigned long arg)
|
|||||||
case PWM_SERVO_GET(9):
|
case PWM_SERVO_GET(9):
|
||||||
case PWM_SERVO_GET(8):
|
case PWM_SERVO_GET(8):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 8
|
||||||
case PWM_SERVO_GET(7):
|
case PWM_SERVO_GET(7):
|
||||||
case PWM_SERVO_GET(6):
|
case PWM_SERVO_GET(6):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 6
|
||||||
case PWM_SERVO_GET(5):
|
case PWM_SERVO_GET(5):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 5
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 5
|
||||||
case PWM_SERVO_GET(4):
|
case PWM_SERVO_GET(4):
|
||||||
#endif
|
#endif
|
||||||
case PWM_SERVO_GET(3):
|
case PWM_SERVO_GET(3):
|
||||||
@@ -909,17 +909,17 @@ int PWMOut::pwm_ioctl(file *filp, int cmd, unsigned long arg)
|
|||||||
case PWM_SERVO_GET_RATEGROUP(1):
|
case PWM_SERVO_GET_RATEGROUP(1):
|
||||||
case PWM_SERVO_GET_RATEGROUP(2):
|
case PWM_SERVO_GET_RATEGROUP(2):
|
||||||
case PWM_SERVO_GET_RATEGROUP(3):
|
case PWM_SERVO_GET_RATEGROUP(3):
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 5
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 5
|
||||||
case PWM_SERVO_GET_RATEGROUP(4):
|
case PWM_SERVO_GET_RATEGROUP(4):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 6
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 6
|
||||||
case PWM_SERVO_GET_RATEGROUP(5):
|
case PWM_SERVO_GET_RATEGROUP(5):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 8
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 8
|
||||||
case PWM_SERVO_GET_RATEGROUP(6):
|
case PWM_SERVO_GET_RATEGROUP(6):
|
||||||
case PWM_SERVO_GET_RATEGROUP(7):
|
case PWM_SERVO_GET_RATEGROUP(7):
|
||||||
#endif
|
#endif
|
||||||
#if defined(BOARD_HAS_PWM) && BOARD_HAS_PWM >= 14
|
#if defined(DIRECT_PWM_OUTPUT_CHANNELS) && DIRECT_PWM_OUTPUT_CHANNELS >= 14
|
||||||
case PWM_SERVO_GET_RATEGROUP(8):
|
case PWM_SERVO_GET_RATEGROUP(8):
|
||||||
case PWM_SERVO_GET_RATEGROUP(9):
|
case PWM_SERVO_GET_RATEGROUP(9):
|
||||||
case PWM_SERVO_GET_RATEGROUP(10):
|
case PWM_SERVO_GET_RATEGROUP(10):
|
||||||
|
|||||||
@@ -63,8 +63,8 @@
|
|||||||
|
|
||||||
using namespace time_literals;
|
using namespace time_literals;
|
||||||
|
|
||||||
#if !defined(BOARD_HAS_PWM)
|
#if !defined(DIRECT_PWM_OUTPUT_CHANNELS)
|
||||||
# error "board_config.h needs to define BOARD_HAS_PWM"
|
# error "board_config.h needs to define DIRECT_PWM_OUTPUT_CHANNELS"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define PX4FMU_DEVICE_PATH "/dev/px4fmu"
|
#define PX4FMU_DEVICE_PATH "/dev/px4fmu"
|
||||||
|
|||||||
Reference in New Issue
Block a user