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px4dev
2012-09-14 21:33:19 -07:00
parent 53fe61a621 cfa24e37d6
commit a3f21d9140
436 changed files with 6657 additions and 3427 deletions
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nuttx/COPYING
+6 -1
View File
@@ -71,7 +71,12 @@ FAT Long File Names
FAT implementations that include support for long filenames, and that
removable solid state media and consumer devices only using short names
would be unaffected. ..."
This Wikipedia entry has been updated with recent legal decisions in favor
of Microsoft. Refer to:
http://en.wikipedia.org/wiki/File_Allocation_Table#Legal_issues
So you have been forewarned: Use the long filename at your own risk!
uIP
nuttx/ChangeLog
+99
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@@ -3250,3 +3250,102 @@
* sched/work_cancel.c: Fix a bad assertion (reported by Mike Smith)
* configs/stm3210e-eval/src/up_idle.c: Correct some power management
compilation errors (reported by Diego Sanchez).
* include/nuttx/wqueue.h, sched/work*, and others: Added logic to support
a second, lower priority work queue (CONFIG_SCHED_LPWORK).
* arch/arm/src/stm32/stm32_dma.c, chip/stm32*_memorymap.h: FSMC SRAM is
only 16-bits wide and the SDIO DMA must be set up differently.
* arch/arm/src/stm32/stm32_dma.c: Back out the 16-bit DMA change. It
is incorrect.
* configs/: Make use of UART4/5 vs USART4/5 consistent in all places.
* Kconfig: Serial 2STOP setting must be integer 0/1, not a boolean.
* lib/misc/sendfile.c and include/sys/sendfile.h: Add a Linux style
sendfile() (non-standard!)
* Kconfig: Refactor serial settings (moved from chip to drivers/serial).
AVR "teensy" now builds with Kconfig (contributed by Richard Cochran).
* Kconfig: Add configuration settings for the LPC17xx
* Kconfig: Add configuration settings for the LM3S (from Richard Cochran).
* Kconfig: Verify configuration settings for the STM32. This includes
changes in the way that the external SRAM is configured: Define
CONFIG_HEAP2_SIZE (decimal) instead of CONFIG_HEAP2_END (hex).
* tools/configure.sh: Don't append the apps directory path setting
if the correct setting is already in defined in the defconfig file.
* fs/fat/fs_utils.c: Improper constructed bool expression. This
would cause many unnecessary writes to FLASH (Thanks Ronen Vainish).
* Kconfig: Verify configuration settings for the LPC43xx. This includes
some corrections to configuration variable names and defconfig settings.
* Kconfig: Add and verify configuration settings for the LPC31xx.
* arch/arm/src/stm32/stm32_uart.h and stm32_serial.c: Add logic to
re-initialize the console UART as needed to enable DMA on the
console UART (contributed by Mike Smith).
* net/recvfrom.c, net/Kconfig, include/nuttx/net/uipopt.h: Remove delay
after receiving data. That has historical reasons to be there (it
was needed before read-ahead buffering was added), but kills performance.
(Noted by Max Holtzberg).
* configs/shenzhou: Add beginnings of a board configuration for the
Shenzhou STM32107 board (see www.armjishu.com). Very little is in
place as of this initial check-in.
* QEMU: Fixes from Richard Cochran to build QEMU with Kconfig files.
* arch/*/src/Makefile: Remove some old logic that was kicked off
when CONFIG_BOOT_RUNFROMFLASH=y. The old logic used to use
objcopy to move sections. Newer logic changes the load position
of sections in the the linker script. As far as I can tell, there
is nothing in the source tree now that depends on the old way of
doing things (if I am wrong, they will need a change to the linker
script).
* configs/fire-stm32v2: Configuration for the M3 Wildfire board. I
don't know very much about this board other than is has an
STM32F103VET6 chip, LCD, touchscreen, and ENC28J60 network. Very
little is in place on the initial check-in.
* configs/shenzhou: Coding for the Shenzhou board port is complete,
but tested has been deferred until I get the right tools.
* arch/arc/include/stm32/chip.h and arch/arm/src/stm32/chip.h:
Add support for the STM32F103VET6.
* fs/fs_fdopen.c: Bad check for failure to allocate memory. (Noted
by Ronen Vainish).
* drivers/mmcsd/mmcsd_sdio.c: If the MMC/SD driver were ever
uninitialized then there would be a double release of memory
(Noted by Ronen Vainish).
* fs/mmap/fs_rammap.c: Fix logic error and errno check (contributed
by Kate).
* arch/avr/src: Fixes from AVR32 build errors that have crept in
over the time; incorporated Kconfig for AVR3 (Richard Cochran).
* fs/fat and include/nuttx/fs/fat.h: The FAT file system allocates
memory for sector I/O buffers used to exchange data with the
configured block driver. In some contexts, the block driver may
require DMA-capable memory. If CONFIG_FAT_DMAMEMORY is defined,
then the FAT FS will use platform-provided DMA memory allocators
to allocate the block driver I/O buffers.
* CONFIG_NET_ENC28J60 renamed CONFIG_ENC28J60 to be consistent
in all places.
* drivers/enc28j60.c, include/nuttx/net/enc28j60.h, and
olimex-strp711/src/up_enc28j60.c: No longer passes IRQ number
as a parameters. Instead now passes a call table to manage
ENC28J60 GPIO interrupts. That is because GPIO interrupts are
handled in different ways by different MCUs and some do not
support IRQ numbers for GPIO interrupts.
* mm/mm_gran* and include/nuttx/gran.h: Add a simple granule-
based allocator. The intent of this allocator is to support
simple allocation of DMA I/O buffers. The initiali check-in
is code complete but untested (not event built into the
mm/Makefile yet.
* confgs/fire-stm32v2: The board port is basically functional.
Not all features have been verified. The ENC28J60 network
is not yet functional.
* configs/stm3240g-eval/discover: A configuration for testing
the UDP discovery utility. Contributed by Max Holtzberg.
* mm/README.txt: Add a new README file.
* include/nuttx/usb/usb.h, arch/*/src/*usb.c, and arch/*/src/*otg*.c:
Add hooks to to use common, external DMA buffer allocation
implementation.
* net/recvfrom.c: Don't block in recvfrom if (1) read-ahead buffering
is enabled and (2) some data was obtained from read-ahead buffers.
Blocking is a bad idea in that case because there is no timeout!
(submitted by Max Holtzberg).
* configs/stm3240g-eval/xmlrpc: An example configuration for the
Embeddable Lightweight XML-RPC Server at apps/examples/xmlrpc.
See http://www.drdobbs.com/web-development/\
an-embeddable-lightweight-xml-rpc-server/184405364 for more info.
Contributed by Max Holtzberg.
* configs/*/nxwm/defconfig and sched/task_exithook.c: Fixes for
bugs that crept in during recent changes. (Submitted by Max
Holtzberg).
nuttx/Kconfig
+76 -11
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@@ -16,7 +16,7 @@ config NUTTX_NEWCONFIG
bool
default y
menu "General Setup"
menu "Build Setup"
config EXPERIMENTAL
bool "Prompt for development and/or incomplete code/drivers"
@@ -152,26 +152,91 @@ config RAW_BINARY
should not be selected if you are not using the GNU toolchain.
endmenu
menu "Customize Header Files"
config ARCH_STDBOOL_H
bool "stdbool.h"
default n
---help---
The stdbool.h header file can be found at nuttx/include/stdbool.h.
However, that header includes logic to redirect the inclusion of an
architecture specific header file like:
#ifdef CONFIG_ARCH_STDBOOL_H
# include <arch/stdbool.h>
#else
...
#endif
Recall that that include path, include/arch, is a symbolic link and
will refer to a version of stdbool.h at nuttx/arch/<architecture>/include/stdbool.h.
config ARCH_MATH_H
bool "math.h"
default n
---help---
There is also a re-directing version of math.h in the source tree.
However, it resides out-of-the-way at include/nuttx/math.h because it
conflicts too often with the system math.h. If ARCH_MATH_H=y is
defined, however, the top-level makefile will copy the redirecting
math.h header file from include/nuttx/math.h to include/math.h. math.h
will then include the architecture-specific version of math.h that you
must provide at nuttx/arch/>architecture</include/math.h.
#ifdef CONFIG_ARCH_MATH_H
# include <arch/math.h>
#endif
So for the architectures that define ARCH_MATH_H=y, include/math.h
will be the redirecting math.h header file; for the architectures
that don't select ARCH_MATH_H, the redirecting math.h header file
will stay out-of-the-way in include/nuttx/.
config ARCH_STDARG_H
bool "stdarg.h"
default n
---help---
There is also a redirecting version of stdarg.h in the source tree
as well. It also resides out-of-the-way at include/nuttx/stdarg.h.
This is because you should normally use your toolchain's stdarg.h
file. But sometimes, your toolchain's stdarg.h file may have other
header file dependencies and so may not be usable in the NuttX build
environment. In those cases, you may have to create a architecture-
specific stdarg.h header file at nuttx/arch/<architecture>/include/stdarg.h
If ARCH_STDARG_H=y is defined, the top-level makefile will copy the
re-directing stdarg.h header file from include/nuttx/stdarg.h to
include/stdarg.h. So for the architectures that cannot use their
toolchain's stdarg.h file, they can use this alternative by defining
ARCH_STDARG_H=y and providing. If ARCH_STDARG_H, is not defined, then
the stdarg.h header file will stay out-of-the-way in include/nuttx/.
endmenu
menu "Debug Options"
config DEBUG
bool "Enable debug output"
bool "Enable debug features"
default n
---help---
enables built-in debug options
Enables built-in debug features. Selecting this option will (1) Enable
debug assertions in the code, (2) enable extended parameter testing in
many functions, and (3) enable support for debug output. Note that enabling
this option by itself does not produce debug output. Debug output must
also be selected on a subsystem-by-subsystem basis.
if DEBUG
config DEBUG_VERBOSE
bool "Enable debug verbose output"
default n
---help---
enables verbose debug output
Enables verbose debug output (assuming debug output is enabled)
config DEBUG_ENABLE
bool "Enable debug controls"
default n
---help---
Support an interface to enable or disable debug output.
Support an interface to dynamically enable or disable debug output.
config DEBUG_SCHED
bool "Enable scheduler debug output"
@@ -258,7 +323,7 @@ menu "Board Selection"
source "configs/Kconfig"
endmenu
menu "Kernel Features"
menu "RTOS Features"
source sched/Kconfig
endmenu
@@ -266,24 +331,24 @@ menu "Device Drivers"
source drivers/Kconfig
endmenu
menu "Networking support"
menu "Networking Support"
source net/Kconfig
endmenu
menu "File systems"
menu "File Systems"
source fs/Kconfig
endmenu
menu "Memory management"
menu "Memory Management"
source mm/Kconfig
endmenu
menu "Library routines"
menu "Library Routines"
source lib/Kconfig
source libxx/Kconfig
endmenu
menu "Application configuration"
menu "Application Configuration"
source "$APPSDIR/Kconfig"
endmenu
nuttx/Makefile
+15 -8
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@@ -603,7 +603,7 @@ distclean: clean subdir_distclean clean_context
ifeq ($(CONFIG_BUILD_2PASS),y)
@$(MAKE) -C $(CONFIG_PASS1_BUILDIR) TOPDIR="$(TOPDIR)" distclean
endif
@rm -f Make.defs setenv.sh .config
@rm -f Make.defs setenv.sh .config .config.old
# Application housekeeping targets. The APPDIR variable refers to the user
# application directory. A sample apps/ directory is included with NuttX,
@@ -616,9 +616,10 @@ endif
# apps_clean: Perform the clean operation only in the user application
# directory
# apps_distclean: Perform the distclean operation only in the user application
# directory. Note that the apps/.config file is preserved
# so that this is not a "full" distclean but more of a
# configuration "reset."
# directory. Note that the apps/.config file (inf any) is
# preserved so that this is not a "full" distclean but more of a
# configuration "reset." (There willnot be an apps/.config
# file if the configuration was generated via make menuconfig).
apps_clean:
ifneq ($(APPDIR),)
@@ -627,10 +628,16 @@ endif
apps_distclean:
ifneq ($(APPDIR),)
@cp "$(TOPDIR)/$(APPDIR)/.config" _SAVED_APPS_config || \
{ echo "Copy of $(APPDIR)/.config failed" ; exit 1 ; }
@if [ -r "$(TOPDIR)/$(APPDIR)/.config" ]; then \
cp "$(TOPDIR)/$(APPDIR)/.config" _SAVED_APPS_config || \
{ echo "Copy of $(APPDIR)/.config failed" ; exit 1 ; } \
else \
rm -f _SAVED_APPS_config; \
fi
@$(MAKE) -C "$(TOPDIR)/$(APPDIR)" TOPDIR="$(TOPDIR)" distclean
@mv _SAVED_APPS_config "$(TOPDIR)/$(APPDIR)/.config" || \
{ echo "Copy of _SAVED_APPS_config failed" ; exit 1 ; }
@if [ -r _SAVED_APPS_config ]; then \
@mv _SAVED_APPS_config "$(TOPDIR)/$(APPDIR)/.config" || \
{ echo "Copy of _SAVED_APPS_config failed" ; exit 1 ; } \
fi
endif
nuttx/README.txt
+8
View File
@@ -654,6 +654,8 @@ nuttx
| | |- ostest/README.txt
| | |- poll/README.txt
| | `- README.txt
| |- fire-stm32v2/
| | `- README.txt
| |- hymini-stm32v/
| | |- include/README.txt
| | |- src/README.txt
@@ -735,6 +737,8 @@ nuttx
| | |- include/README.txt
| | |- src/README.txt
| | `- README.txt
| |- shenzhou/
| | `- README.txt
| |- skp16c26/
| | |- include/README.txt
| | |- src/README.txt
@@ -802,6 +806,8 @@ nuttx
| `- README.txt
|- libxx/
| `- README.txt
|- mm/
| `- README.txt
|- syscall/
| `- README.txt
`- tools/
@@ -820,6 +826,8 @@ apps
|- modbus/
| `- README.txt
|- netutils/
| |- discover
| | `- README.txt
| |- ftpc
| | `- README.txt
| |- telnetd
nuttx/arch/Kconfig
+73 -3
View File
@@ -14,23 +14,27 @@ config ARCH_8051
config ARCH_ARM
bool "ARM"
select ARCH_HAVE_INTERRUPTSTACK
---help---
The ARM architectures
config ARCH_AVR
bool "AVR"
select ARCH_NOINTC
select ARCH_HAVE_INTERRUPTSTACK
---help---
Atmel 8-bit bit AVR and 32-bit AVR32 architectures
config ARCH_HC
bool "Freescale HC"
select ARCH_NOINTC
select ARCH_HAVE_INTERRUPTSTACK
---help---
Freescale HC architectures (M9S12)
config ARCH_MIPS
bool "MIPS"
select ARCH_HAVE_INTERRUPTSTACK
---help---
MIPS architectures (PIC32)
@@ -43,6 +47,7 @@ config ARCH_RGMP
config ARCH_SH
bool "Renesas"
select ARCH_NOINTC
select ARCH_HAVE_INTERRUPTSTACK
---help---
Renesas architectures (SH and M16C).
@@ -58,11 +63,13 @@ config ARCH_X86
config ARCH_Z16
bool "ZNEO"
select ARCH_HAVE_HEAP2
---help---
ZiLOG ZNEO 16-bit architectures (z16f).
config ARCH_Z80
bool "z80"
select ARCH_HAVE_HEAP2
---help---
ZiLOG 8-bit architectures (z80, ez80, z8).
@@ -100,6 +107,10 @@ config ARCH_NOINTC
bool
default n
config ARCH_DMA
bool
default n
config ARCH_STACKDUMP
bool "Dump stack on assertions"
default n
@@ -117,11 +128,70 @@ config BOARD_LOOPSPERMSEC
is 100 seconds.
config DRAM_START
hex "DRAM start address"
hex "DRAM start physical address"
help
The physical start address of installed RAM.
The physical start address of installed RAM. Despite the naming,
this may be SDRAM or SRAM or any other RAM technology that support
program execution.
config DRAM_VSTART
hex "DRAM start virtual address"
depends on ARCH_HAVE_MMU
help
The virtual start address of installed RAM. Despite the naming,
this may be SDRAM or SRAM or any other RAM technology that support
program execution.
config DRAM_SIZE
int "DRAM size"
help
The size in bytes of the installed RAM.
The size in bytes of the installed RAM. Despite the naming,
this may be SDRAM or SRAM or any other RAM technology that support
program execution.
config ARCH_HAVE_INTERRUPTSTACK
bool
config ARCH_INTERRUPTSTACK
bool "Use interrupt stack"
depends on ARCH_HAVE_INTERRUPTSTACK
default y
---help---
This architecture supports an interrupt stack. If defined, this symbol
is the size of the interrupt stack in bytes. If not defined, the user
task stacks will be used during interrupt handling.
comment "Boot options"
choice
prompt "Boot Mode"
default BOOT_RUNFROMFLASH
config BOOT_RUNFROMEXTSRAM
bool "Run from external SRAM"
---help---
Some configuration support booting and running from external SRAM.
config BOOT_RUNFROMFLASH
bool "Boot and run from flash"
---help---
Most configurations support XIP operation from FLASH but must copy
initialized .data sections to RAM. (This is the default).
config BOOT_RUNFROMISRAM
bool "Boot and run from internal SRAM"
---help---
Some configuration support booting and running from internal SRAM.
config BOOT_RUNFROMSDRAM
bool "Boot and run from external SDRAM"
---help---
Some configuration support booting and running from external SDRAM.
config BOOT_COPYTORAM
bool "Boot from FLASH but copy to ram"
---help---
Some configurations boot in FLASH but copy themselves entirely into
RAM for better performance.
endchoice
nuttx/arch/arm/Kconfig
+104 -20
View File
@@ -10,71 +10,106 @@ choice
config ARCH_CHIP_C5471
bool "TMS320 C5471"
select ARCH_ARM7TDMI
select ARCH_HAVE_LOWVECTORS
---help---
TI TMS320 C5471, A180, or DA180 (ARM7TDMI)
config ARCH_CHIP_CALYPSO
bool "Calypso"
select ARCH_ARM7TDMI
select ARCH_HAVE_HEAP2
select ARCH_HAVE_LOWVECTORS
---help---
TI Calypso-based cell phones (ARM7TDMI)
config ARCH_CHIP_DM320
bool "TMS320 DM320"
select ARCH_ARM926EJS
select ARCH_HAVE_LOWVECTORS
select ARCH_HAVE_MMU
---help---
TI DMS320 DM320 (ARM926EJS)
config ARCH_CHIP_IMX
bool "Freescale iMX"
select ARCH_ARM920T
select ARCH_HAVE_HEAP2
select ARCH_HAVE_LOWVECTORS
select ARCH_HAVE_MMU
---help---
Freescale iMX architectures (ARM920T)
config ARCH_CHIP_KINETIS
bool "Freescale Kinetis"
select ARCH_CORTEXM4
select ARCH_HAVE_MPU
---help---
Freescale Kinetis Architectures (ARM Cortex-M4)
config ARCH_CHIP_LM3S
bool "TI Stellaris"
select ARCH_CORTEXM3
select ARCH_HAVE_MPU
---help---
TI Stellaris LMS3 architecutres (ARM Cortex-M3)
config ARCH_CHIP_LPC17XX
bool "NXP LPC17xx"
select ARCH_CORTEXM3
select ARCH_HAVE_MPU
---help---
NXP LPC17xx architectures (ARM Cortex-M3)
config ARCH_CHIP_LPC214X
bool "NXP LPC214x"
select ARCH_ARM7TDMI
select ARCH_HAVE_LOWVECTORS
---help---
NXP LPC2145x architectures (ARM7TDMI)
config ARCH_CHIP_LPC2378
bool "NXP LPC2378"
select ARCH_ARM7TDMI
select ARCH_HAVE_LOWVECTORS
---help---
NXP LPC2145x architectures (ARM7TDMI)
config ARCH_CHIP_LPC31XX
bool "NXP LPC31XX"
select ARCH_ARM926EJS
select ARCH_HAVE_LOWVECTORS
select ARCH_HAVE_MMU
---help---
NPX LPC31XX architectures (ARM926EJS).
config ARCH_CHIP_LPC43XX
bool "NXP LPC43XX"
select ARCH_CORTEXM4
select ARCH_HAVE_CMNVECTOR
select ARMV7M_CMNVECTOR
select ARCH_HAVE_MPU
---help---
NPX LPC43XX architectures (ARM Cortex-M4).
config ARCH_CHIP_SAM3U
bool "Atmel AT91SAM3U"
select ARCH_CORTEXM3
select ARCH_HAVE_MPU
---help---
Atmel AT91SAM3U architectures (ARM Cortex-M3)
config ARCH_CHIP_STM32
bool "STMicro STM32"
select ARCH_HAVE_CMNVECTOR
select ARCH_HAVE_MPU
---help---
STMicro STM32 architectures (ARM Cortex-M3/4).
config ARCH_CHIP_STR71X
bool "STMicro STR71x"
select ARCH_ARM7TDMI
select ARCH_HAVE_LOWVECTORS
---help---
STMicro STR71x architectures (ARM7TDMI).
@@ -82,24 +117,23 @@ endchoice
config ARCH_ARM7TDMI
bool
default y if ARCH_CHIP_C5471 || ARCH_CHIP_CALYPSO || ARCH_CHIP_LPC214X || ARCH_CHIP_LPC2378 || ARCH_CHIP_STR71X
config ARCH_ARM926EJS
bool
default y if ARCH_CHIP_DM320 || ARCH_CHIP_LPC31XX
config ARCH_ARM920T
bool
default y if ARCH_CHIP_IMX
config ARCH_CORTEXM
config ARCH_CORTEXM3
bool
config ARCH_CORTEXM4
bool
default y if ARCH_CHIP_KINETIS || ARCH_CHIP_LM3S || ARCH_CHIP_LPC17XX || ARCH_CHIP_LPC43XX || ARCH_CHIP_SAM3U || ARCH_CHIP_STM32
config ARCH_FAMILY
string
default "arm" if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
default "armv7-m" if ARCH_CORTEXM
default "armv7-m" if ARCH_CORTEXM3 || ARCH_CORTEXM4
config ARCH_CHIP
string
@@ -109,7 +143,7 @@ config ARCH_CHIP
default "imx" if ARCH_CHIP_IMX
default "kinetis" if ARCH_CHIP_KINETIS
default "lm3s" if ARCH_CHIP_LM3S
default "lpc17x" if ARCH_CHIP_LPC17XX
default "lpc17xx" if ARCH_CHIP_LPC17XX
default "lpc214x" if ARCH_CHIP_LPC214X
default "lpc2378" if ARCH_CHIP_LPC2378
default "lpc31xx" if ARCH_CHIP_LPC31XX
@@ -118,27 +152,77 @@ config ARCH_CHIP
default "stm32" if ARCH_CHIP_STM32
default "str71x" if ARCH_CHIP_STR71X
config ARCH_LEDS
bool "Use board LEDs to show state"
default y
config ARMV7M_CMNVECTOR
bool "Use common ARMv7-M vectors"
default n
depends on ARCH_HAVE_CMNVECTOR
---help---
Use LEDs to show state. Unique to boards that have LEDs
Some architectures use their own, built-in vector logic. Some use only
the common vector logic. Some can use either their own built-in vector
logic or the common vector logic. This applies only to ARMv7-M
architectures.
config ARCH_INTERRUPTSTACK
bool "Use interrupt stack"
config ARCH_FPU
bool "FPU support"
default y
depends on ARCH_CORTEXM4
---help---
This architecture supports an interrupt stack. If defined, this symbol
is the size of the interrupt stack in bytes. If not defined, the user
task stacks will be used during interrupt handling.
Build in support for the ARM Cortex-M4 Floating Point Unit (FPU).
Check your chip specifications first; not all Cortex-M4 chips support the FPU.
config ARCH_HAVE_MPU
bool
config ARMV7M_MPU
bool "MPU support"
default n
depends on ARCH_HAVE_MPU
---help---
Build in support for the ARM Cortex-M3/4 Memory Protection Unit (MPU).
Check your chip specifications first; not all Cortex-M3/4 chips support the MPU.
config ARCH_HAVE_LOWVECTORS
bool
config ARCH_LOWVECTORS
bool "Vectors in low memory"
default n
depends on ARCH_HAVE_LOWVECTORS
---help---
Support ARM vectors in low memory.
config ARCH_HAVE_MMU
bool
config PGTABLE_VADDR
hex "Page table virtual address"
depends on ARCH_HAVE_MMU
---help---
Page table virtual address (might be defined in the board.h file). Not
applicable to all architectures.
config ARCH_ROMPGTABLE
bool "ROM page table"
default n
depends on ARCH_HAVE_MMU
---help---
Support a fixed memory mapping use a (read-only) page table in ROM/FLASH.
config PAGING
bool "On-demand paging"
default n
depends on ARCH_HAVE_MMU && !ARCH_ROMPGTABLE
---help---
If set =y in your configation file, this setting will enable the on-demand
paging feature as described in http://www.nuttx.org/NuttXDemandPaging.html.
config ARCH_IRQPRIO
bool "Interrupt priority"
default y if ARCH_CORTEXM
default y if ARCH_CORTEXM3 || ARCH_CORTEXM4
---help---
Select if your board supports interrupt prioritization.
config ARCH_LOOPSPERMSEC
config BOARD_LOOPSPERMSEC
int "Delay loops per millisecond"
default 5000
---help---
@@ -150,8 +234,8 @@ config ARCH_CALIBRATION
---help---
Enables some built in instrumentation that causes a 100 second delay
during boot-up. This 100 second delay serves no purpose other than it
allows you to calibratre ARCH_LOOPSPERMSEC. You simply use a stop
watch to measure the 100 second delay then adjust ARCH_LOOPSPERMSEC until
allows you to calibratre BOARD_LOOPSPERMSEC. You simply use a stop
watch to measure the 100 second delay then adjust BOARD_LOOPSPERMSEC until
the delay actually is 100 seconds.
if ARCH_CHIP_C5471
nuttx/arch/arm/include/arch.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/arch.h
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/arm/irq.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/arm/irq.h
*
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/arm/syscall.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/arm/syscall.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/armv7-m/syscall.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/armv7-m/syscall.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/irq.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/irq.h
*
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/serial.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/serial.h
*
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/stm32/chip.h
+47 -29
View File
@@ -56,6 +56,8 @@
* the chip datasheet.
*/
/* STM32 F100 Value Line ************************************************************/
#if defined(CONFIG_ARCH_CHIP_STM32F100C8) || defined(CONFIG_ARCH_CHIP_STM32F100CB) \
|| defined(CONFIG_ARCH_CHIP_STM32F100R8) || defined(CONFIG_ARCH_CHIP_STM32F100RB) \
|| defined(CONFIG_ARCH_CHIP_STM32F100V8) || defined(CONFIG_ARCH_CHIP_STM32F100VB)
@@ -87,34 +89,10 @@
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */
# define STM32_NFSMC 1 /* FSMC */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */
# define STM32_NBTIM 0 /* No basic timers */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 2 /* SPI1-2 */
# define STM32_NI2S 0 /* No I2S (?) */
# define STM32_NUSART 3 /* USART1-3 */
# define STM32_NI2C 2 /* I2C1-2 */
# define STM32_NCAN 1 /* CAN1 */
# define STM32_NSDIO 1 /* SDIO */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 112 /* GPIOA-G */
# define STM32_NADC 1 /* ADC1 */
# define STM32_NDAC 0 /* No DAC */
# define STM32_NCRC 0 /* No CRC */
# define STM32_NETHERNET 0 /* No ethernet */
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
/* STM32 F103 High Density Family ***************************************************/
/* STM32F103RC, STM32F103RD, and STM32F103RE are all provided in 64 pin packages and differ
* only in the available FLASH and SRAM.
*/
#elif defined(CONFIG_ARCH_CHIP_STM32F103RET6)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
@@ -145,7 +123,11 @@
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6)
/* STM32F103VC, STM32F103VD, and STM32F103VE are all provided in 100 pin packages and differ
* only in the available FLASH and SRAM.
*/
#elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) || defined(CONFIG_ARCH_CHIP_STM32F103VET6)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
@@ -174,6 +156,40 @@
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
/* STM32F103ZC, STM32F103ZD, and STM32F103ZE are all provided in 144 pin packages and differ
* only in the available FLASH and SRAM.
*/
#elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */
# define STM32_NFSMC 1 /* FSMC */
# define STM32_NATIM 1 /* One advanced timer TIM1 */
# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */
# define STM32_NBTIM 0 /* No basic timers */
# define STM32_NDMA 2 /* DMA1-2 */
# define STM32_NSPI 2 /* SPI1-2 */
# define STM32_NI2S 0 /* No I2S (?) */
# define STM32_NUSART 3 /* USART1-3 */
# define STM32_NI2C 2 /* I2C1-2 */
# define STM32_NCAN 1 /* CAN1 */
# define STM32_NSDIO 1 /* SDIO */
# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */
# define STM32_NGPIO 112 /* GPIOA-G */
# define STM32_NADC 1 /* ADC1 */
# define STM32_NDAC 0 /* No DAC */
# define STM32_NCRC 0 /* No CRC */
# define STM32_NETHERNET 0 /* No ethernet */
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
/* STM32 F105/F107 Connectivity Line *******************************************************/
#elif defined(CONFIG_ARCH_CHIP_STM32F105VBT7)
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
@@ -232,6 +248,7 @@
# define STM32_NRNG 0 /* No random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
/* STM32 F2 Family ******************************************************************/
#elif defined(CONFIG_ARCH_CHIP_STM32F207IG) /* UFBGA-176 1024Kb FLASH 128Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
@@ -263,6 +280,7 @@
# define STM32_NRNG 1 /* Random number generator (RNG) */
# define STM32_NDCMI 1 /* Digital camera interface (DCMI) */
/* STM23 F4 Family ******************************************************************/
#elif defined(CONFIG_ARCH_CHIP_STM32F405RG) /* LQFP 64 10x10x1.4 1024Kb FLASH 192Kb SRAM */
# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
nuttx/arch/arm/include/syscall.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/syscall.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/types.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/types.h
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/include/watchdog.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/include/watchdog.h
*
* Copyright (C) 2007, 2008, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/Makefile
-5
View File
@@ -111,11 +111,6 @@ nuttx: $(HEAD_OBJ) board/libboard$(LIBEXT)
@echo "LD: nuttx"
@$(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \
--start-group $(LDLIBS) -lboard $(EXTRA_LIBS) $(LIBGCC) --end-group
ifeq ($(CONFIG_BOOT_RUNFROMFLASH),y)
@export flashloc=`$(OBJDUMP) --all-headers $(NUTTX)$(EXEEXT) | grep _eronly | cut -d' ' -f1`; \
$(OBJCOPY) $(OBJCOPYARGS) --adjust-section-vma=.data=0x$$flashloc $(NUTTX)$(EXEEXT) $(NUTTX).flashimage
@mv $(NUTTX).flashimage $(NUTTX)$(EXEEXT)
endif
@$(NM) $(NUTTX)$(EXEEXT) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
sort > $(TOPDIR)/System.map
nuttx/arch/arm/src/armv7-m/psr.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/psr.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/svcall.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/svcall.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_assert.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_assert.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_blocktask.c
Executable → Regular
View File
nuttx/arch/arm/src/armv7-m/up_copystate.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_copystate.c
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_doirq.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_doirq.c
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_hardfault.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_hardfault.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_memfault.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_memfault.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_mpu.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_mpu.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_releasepending.c
Executable → Regular
View File
nuttx/arch/arm/src/armv7-m/up_reprioritizertr.c
Executable → Regular
View File
nuttx/arch/arm/src/armv7-m/up_saveusercontext.S
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_saveusercontext.S
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_sigdeliver.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_sigdeliver.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_switchcontext.S
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/armv7-m/up_switchcontext.S
*
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/armv7-m/up_unblocktask.c
Executable → Regular
View File
nuttx/arch/arm/src/common/up_allocateheap.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_allocateheap.c
*
* Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_arch.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_arch.h
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_checkstack.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_checkstack.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_etherstub.c
Executable → Regular
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_etherstub.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_idle.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_idle.c
*
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_interruptcontext.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_interruptcontext.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_lowputs.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_lowputs.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_mdelay.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_mdelay.c
*
* Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_modifyreg16.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_modifyreg16.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_modifyreg32.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_modifyreg32.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_modifyreg8.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_modifyreg8.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_puts.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_puts.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_releasestack.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_releasestack.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_udelay.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_udelay.c
*
* Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/common/up_usestack.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/common/up_usestack.c
*
* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/Kconfig
+233 -360
View File
@@ -3,81 +3,188 @@
# see misc/tools/kconfig-language.txt.
#
comment "STM32 Configuration Options"
choice
prompt "STM32 Chip Selection"
default ARCH_CHIP_STM32F103ZET6
depends on ARCH_CHIP_STM32
config ARCH_CHIP_STM32F103ZET6
bool "STM32F103ZET6"
config ARCH_CHIP_STM32F100C8
bool "STM32F100C8"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_VALUELINE
config ARCH_CHIP_STM32F100CB
bool "STM32F100CB"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_VALUELINE
config ARCH_CHIP_STM32F100R8
bool "STM32F100R8"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_VALUELINE
config ARCH_CHIP_STM32F100RB
bool "STM32F100RB"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_VALUELINE
config ARCH_CHIP_STM32F100V8
bool "STM32F100V8"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_VALUELINE
config ARCH_CHIP_STM32F100VB
bool "STM32F100VB"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_VALUELINE
config ARCH_CHIP_STM32F103RET6
bool "STM32F103RET6"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_HIGHDENSITY
config ARCH_CHIP_STM32F103VCT6
bool "STM32F103VCT6"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_HIGHDENSITY
config ARCH_CHIP_STM32F103VET6
bool "STM32F103VET6"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_HIGHDENSITY
config ARCH_CHIP_STM32F103ZET6
bool "STM32F103ZET6"
select ARCH_CORTEXM3
select STM32_STM32F10XX
config ARCH_CHIP_STM32F105VBT7
bool "STM32F105VBT7"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_CONNECTIVITYLINE
config ARCH_CHIP_STM32F107VC
bool "STM32F107VC"
select ARCH_CORTEXM3
select STM32_STM32F10XX
select STM32_CONNECTIVITYLINE
config ARCH_CHIP_STM32F207IG
bool "STM32F207IG"
select ARCH_CORTEXM3
select STM32_STM32F20XX
config ARCH_CHIP_STM32F405RG
bool "STM32F405RG"
select ARCH_CORTEXM4
select STM32_STM32F40XX
config ARCH_CHIP_STM32F405VG
bool "STM32F405VG"
select ARCH_CORTEXM4
select STM32_STM32F40XX
config ARCH_CHIP_STM32F405ZG
bool "STM32F405ZG"
select ARCH_CORTEXM4
select STM32_STM32F40XX
config ARCH_CHIP_STM32F407VE
bool "STM32F407VE"
select ARCH_CORTEXM4
select STM32_STM32F40XX
config ARCH_CHIP_STM32F407VG
bool "STM32F407VG"
select ARCH_CORTEXM3
select STM32_STM32F40XX
config ARCH_CHIP_STM32F407ZE
bool "STM32F407ZE"
select ARCH_CORTEXM4
select STM32_STM32F40XX
config ARCH_CHIP_STM32F407ZG
bool "STM32F407ZG"
select ARCH_CORTEXM4
select STM32_STM32F40XX
config ARCH_CHIP_STM32F407IE
bool "STM32F407IE"
select ARCH_CORTEXM4
select STM32_STM32F40XX
config ARCH_CHIP_STM32F407IG
bool "STM32F407IG"
select ARCH_CORTEXM4
select STM32_STM32F40XX
endchoice
config STM32_STM32F10XX
bool
default y if ARCH_CHIP_STM32F103ZET6 || ARCH_CHIP_STM32F103RET6 || ARCH_CHIP_STM32F103VCT6 || ARCH_CHIP_STM32F105VBT7 || ARCH_CHIP_STM32F107VC
config STM32_VALUELINE
bool
config STM32_HIGHDENSITY
bool
config STM32_CONNECTIVITYLINE
bool
default y if ARCH_CHIP_STM32F105VBT7 || ARCH_CHIP_STM32F107VC
config STM32_STM32F20XX
bool
default y if ARCH_CHIP_STM32F207IG
config STM32_STM32F40XX
bool
default y if ARCH_CHIP_STM32F405RG || ARCH_CHIP_STM32F405VG || ARCH_CHIP_STM32F405ZG || ARCH_CHIP_STM32F407VE || ARCH_CHIP_STM32F407VG || ARCH_CHIP_STM32F407ZE || ARCH_CHIP_STM32F407ZG || ARCH_CHIP_STM32F407IE || ARCH_CHIP_STM32F407IE
config ARCH_CORTEXM3
bool
default y if !STM32_STM32F40XX
choice
prompt "Toolchain Selection"
default STM32_CODESOURCERYW
depends on ARCH_CHIP_STM32
config ARCH_CORTEXM4
bool
default y if STM32_STM32F40XX
config STM32_CODESOURCERYW
bool "CodeSourcery for Windows"
config STM32_CODESOURCERYL
bool "CodeSourcery for Linux"
config STM32_ATOLLIC_LITE
bool "Atollic Lite for Windows"
config STM32_ATOLLIC_PRO
bool "Atollic Pro for Windows"
config STM32_DEVKITARM
bool "DevkitARM (Windows)"
config STM32_RAISONANCE
bool "STMicro Raisonance for Windows"
config STM32_BUILDROOT
bool "NuttX buildroot (Cygwin or Linux)"
endchoice
config STM32_DFU
bool "DFU bootloader"
default n
---help---
Configure and position code for use with the STMicro DFU bootloader. Do
not select this option if you will load code using JTAG/SWM.
menu "STM32 Peripheral Support"
@@ -100,10 +207,12 @@ config STM32_CRC
config STM32_DMA1
bool "DMA1"
default n
select ARCH_DMA
config STM32_DMA2
bool "DMA2"
default n
select ARCH_DMA
config STM32_BKP
bool "BKP"
@@ -118,11 +227,13 @@ config STM32_BKPSRAM
config STM32_CAN1
bool "CAN1"
default n
select CAN
config STM32_CAN2
bool "CAN2"
default n
depends on STM32_STM32F20XX || STM32_STM32F40XX
select CAN
config STM32_CCMDATARAM
bool "CMD/DATA RAM"
@@ -150,11 +261,12 @@ config STM32_DCMI
config STM32_ETHMAC
bool "Ethernet MAC"
default n
depends on STM32_STM32F20XX || STM32_STM32F40XX
depends on STM32_CONNECTIVITYLINE || STM32_STM32F20XX || STM32_STM32F40XX
config STM32_FSMC
bool "FSMC"
default n
depends on !STM32_CONNECTIVITYLINE
config STM32_HASH
bool "HASH"
@@ -177,6 +289,7 @@ config STM32_I2C3
config STM32_IWDG
bool "IWDG"
default n
select WATCHDOG
config STM32_OTGFS
bool "OTG FS"
@@ -200,28 +313,33 @@ config STM32_RNG
config STM32_SDIO
bool "SDIO"
default n
depends on !STM32_CONNECTIVITYLINE
config STM32_SPI1
bool "SPI1"
default n
select SPI
config STM32_SPI2
bool "SPI2"
default n
select SPI
config STM32_SPI3
bool "SPI3"
default n
depends on STM32_STM32F20XX || STM32_STM32F40XX
select SPI
config STM32_SPI4
bool "SPI4"
default n
depends on STM32_STM32F10XX
select SPI
config STM32_SYSCFG
bool "SYSCFG"
default n
default y
depends on STM32_STM32F20XX || STM32_STM32F40XX
config STM32_TIM1
@@ -289,36 +407,44 @@ config STM32_TIM14
config STM32_USART1
bool "USART1"
default n
select ARCH_HAVE_USART1
config STM32_USART2
bool "USART2"
default n
select ARCH_HAVE_USART2
config STM32_USART3
bool "USART3"
default n
select ARCH_HAVE_USART3
config STM32_UART4
bool "UART4"
default n
select ARCH_HAVE_UART4
config STM32_UART5
bool "UART5"
default n
select ARCH_HAVE_UART5
config STM32_USART6
bool "USART6"
default n
depends on STM32_STM32F20XX || STM32_STM32F40XX
select ARCH_HAVE_USART6
config STM32_USB
bool "USB Device"
default n
depends on STM32_STM32F10XX
select USBDEV
config STM32_WWDG
bool "WWDG"
default n
select WATCHDOG
endmenu
@@ -334,14 +460,12 @@ config STM32_SPI
bool
default y if STM32_SPI1 || STM32_SPI2 || STM32_SPI3 || STM32_SPI4
config STM32_DMA
bool
default y if STM32_DMA1 || STM32_DMA2
config STM32_CAN
bool
default y if STM32_CAN1 || STM32_CAN2
menu "Alternate Pin Mapping"
choice
prompt "TIM1 Alternate Pin Mappings"
depends on STM32_STM32F10XX && STM32_TIM1
@@ -447,18 +571,25 @@ choice
config STM32_CAN1_NO_REMAP
bool "No pin remapping"
config STM32_CAN1_FULL_REMAP
bool "Full pin remapping"
config CONFIG_STM32_CAN1_REMAP1
bool "CAN1 alternate pin remapping #1"
config STM32_CAN1_PARTIAL_REMAP
bool "Partial pin remapping"
config CONFIG_STM32_CAN1_REMAP2
bool "CAN1 alternate pin remapping #2"
endchoice
config STM32_CAN2_REMAP
bool "CAN2 Alternate Pin Mapping"
default n
depends on STM32_STM32F10XX && STM32_CAN2
depends on STM32_CONNECTIVITYLINE && STM32_CAN2
config STM32_ETH_REMAP
bool "Ethernet Alternate Pin Mapping"
default n
depends on STM32_CONNECTIVITYLINE && STM32_ETHMAC
endmenu
choice
prompt "JTAG Configuration"
@@ -497,39 +628,18 @@ config ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
config STM32_CCMEXCLUDE
bool "Exclude CCM SRAM from the heap"
depends on STM32_STM32F20XX || STM32_STM32F40XX
default y if STM32_DMA1 || STM32_DMA2
default y if ARCH_DMA
---help---
Exclude CCM SRAM from the HEAP because it cannot be used for DMA.
config STM32_FSMC_SRAM
bool "External SRAM on FSMC"
default n
depends on FSMC
depends on STM32_FSMC
select ARCH_HAVE_HEAP2
---help---
In addition to internal SRAM, SRAM may also be available through the FSMC.
config HEAP2_BASE
hex "FSMC SRAM base address"
default 0x00000000
depends on STM32_FSMC_SRAM
---help---
The base address of the SRAM in the FSMC address space.
config HEAP2_END
hex "FSMC SRAM end+1 address"
default 0x00000000
depends on STM32_FSMC_SRAM
---help---
The end (+1) of the SRAM in the FSMC address space
config ARCH_FPU
bool "FPU support"
default y
depends on ARCH_CORTEXM4
---help---
Build in support for the ARM Cortex-M4 FPU. Only the STM3240xxx supports
a floating point unit (FPU)
config STM32_TIM1_PWM
bool "TIM1 PWM"
default n
@@ -1420,342 +1530,48 @@ config STM32_TIM14_DAC2
endchoice
menu "USART1 Configuration"
depends on STM32_USART1
config USART1_SERIAL_CONSOLE
bool "USART1 serial console"
default y
---help---
Selects the USART1 for the console and ttys0 (default is the USART1).
config USART1_RXBUFSIZE
int "USART1 Rx buffer size"
default 256
---help---
Characters are buffered as received. This specific the size of the receive
buffer.
config USART1_TXBUFSIZE
int "USART1 Tx buffer size"
default 256
---help---
Characters are buffered before being sent. This specific the size of the
transmit buffer
config USART1_BAUD
int "USART1 BAUD"
default 11520
---help---
The configured BAUD of the UART
config USART1_BITS
int "USART1 number of bits"
default 8
---help---
The number of bits. Must be either 7 or 8.
config USART1_PARITY
int "USART1 parity"
default 0
---help---
0=no parity, 1=odd parity, 2=even parity
config USART1_2STOP
bool "USART1 two stop bits"
default n
---help---
Two stop bits
config USART1_RXDMA
bool "USART1 Rx DMA"
default n
depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA2
depends on STM32_STM32F40XX && STM32_DMA2
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
endmenu
menu "USART2 Configuration"
depends on STM32_USART2
config USART2_SERIAL_CONSOLE
bool "USART2 serial console"
default y if !STM32_USART1
---help---
Selects the USART2 for the console and ttys0 (default is the USART2).
config USART2_RXBUFSIZE
int "USART2 Rx buffer size"
default 256
---help---
Characters are buffered as received. This specific the size of the receive
buffer.
config USART2_TXBUFSIZE
int "USART2 Tx buffer size"
default 256
---help---
Characters are buffered before being sent. This specific the size of the
transmit buffer
config USART2_BAUD
int "USART2 BAUD"
default 11520
---help---
The configured BAUD of the UART
config USART2_BITS
int "USART2 number of bits"
default 8
---help---
The number of bits. Must be either 7 or 8.
config USART2_PARITY
int "USART2 parity"
default 0
---help---
0=no parity, 1=odd parity, 2=even parity
config USART2_2STOP
bool "USART2 two stop bits"
default n
---help---
Two stop bits
config USART2_RXDMA
bool "USART2 Rx DMA"
default n
depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA1
depends on STM32_STM32F40XX && STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
endmenu
menu "USART3 Configuration"
depends on STM32_USART3
config USART3_SERIAL_CONSOLE
bool "USART3 serial console"
default y if !STM32_USART1 && !STM32_USART2
---help---
Selects the USART3 for the console and ttys0 (default is the USART3).
config USART3_RXBUFSIZE
int "USART3 Rx buffer size"
default 256
---help---
Characters are buffered as received. This specific the size of the receive
buffer.
config USART3_TXBUFSIZE
int "USART3 Tx buffer size"
default 256
---help---
Characters are buffered before being sent. This specific the size of the
transmit buffer
config USART3_BAUD
int "USART3 BAUD"
default 11520
---help---
The configured BAUD of the UART
config USART3_BITS
int "USART3 number of bits"
default 8
---help---
The number of bits. Must be either 7 or 8.
config USART3_PARITY
int "USART3 parity"
default 0
---help---
0=no parity, 1=odd parity, 2=even parity
config USART3_2STOP
bool "USART3 two stop bits"
default n
---help---
Two stop bits
config USART3_RXDMA
bool "USART3 Rx DMA"
default n
depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA1
depends on STM32_STM32F40XX && STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
endmenu
menu "UART4 Configuration"
depends on STM32_UART4
config USART4_SERIAL_CONSOLE
bool "UART4 serial console"
default y if !STM32_USART1 && !STM32_USART2 && !STM32_USART3
---help---
Selects the UART4 for the console and ttys0 (default is the USART1).
config USART4_RXBUFSIZE
int "UART4 Rx buffer size"
default 256
---help---
Characters are buffered as received. This specific the size of the receive
buffer.
config USART4_TXBUFSIZE
int "UART4 Tx buffer size"
default 256
---help---
Characters are buffered before being sent. This specific the size of the
transmit buffer
config USART4_BAUD
int "UART4 BAUD"
default 11520
---help---
The configured BAUD of the UART
config USART4_BITS
int "UART4 number of bits"
default 8
---help---
The number of bits. Must be either 7 or 8.
config USART4_PARITY
int "UART4 parity"
default 0
---help---
0=no parity, 1=odd parity, 2=even parity
config USART4_2STOP
bool "UART4 two stop bits"
config UART4_RXDMA
bool "UART4 Rx DMA"
default n
---help---
Two stop bits
config USART4_RXDMA
bool "USART4 Rx DMA"
default n
depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA1
depends on STM32_STM32F40XX && STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
endmenu
menu "UART5 Configuration"
depends on STM32_UART5
config USART5_SERIAL_CONSOLE
bool "UART5 serial console"
default y if !STM32_USART1 && !STM32_USART2 && !STM32_USART3 && !STM32_UART4
---help---
Selects the UART5 for the console and ttys0 (default is the USART1).
config USART5_RXBUFSIZE
int "USART5 Rx buffer size"
default 256
---help---
Characters are buffered as received. This specific the size of the receive
buffer.
config USART5_TXBUFSIZE
int "UART5 Tx buffer size"
default 256
---help---
Characters are buffered before being sent. This specific the size of the
transmit buffer
config USART5_BAUD
int "UART5 BAUD"
default 11520
---help---
The configured BAUD of the UART
config USART5_BITS
int "UART5 number of bits"
default 8
---help---
The number of bits. Must be either 7 or 8.
config USART5_PARITY
int "UART5 parity"
default 0
---help---
0=no parity, 1=odd parity, 2=even parity
config USART5_2STOP
bool "UART5 two stop bits"
config UART5_RXDMA
bool "UART5 Rx DMA"
default n
---help---
Two stop bits
config USART5_RXDMA
bool "USART5 Rx DMA"
default n
depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA1
depends on STM32_STM32F40XX && STM32_DMA1
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
endmenu
menu "USART6 Configuration"
depends on STM32_USART6
config USART6_SERIAL_CONSOLE
bool "USART6 serial console"
default y if !STM32_USART1 && !STM32_USART2 && !STM32_USART3 && !STM32_UART4 && !STM32_UART5
---help---
Selects the USART6 for the console and ttys0 (default is the USART6).
config USART6_RXBUFSIZE
int "USART6 Rx buffer size"
default 256
---help---
Characters are buffered as received. This specific the size of the receive
buffer.
config USART6_TXBUFSIZE
int "USART6 Tx buffer size"
default 256
---help---
Characters are buffered before being sent. This specific the size of the
transmit buffer
config USART6_BAUD
int "USART6 BAUD"
default 11520
---help---
The configured BAUD of the UART
config USART6_BITS
int "USART6 number of bits"
default 8
---help---
The number of bits. Must be either 7 or 8.
config USART6_PARITY
int "USART6 parity"
default 0
---help---
0=no parity, 1=odd parity, 2=even parity
config USART6_2STOP
bool "USART6 two stop bits"
default n
---help---
Two stop bits
config USART6_RXDMA
bool "USART6 Rx DMA"
default n
depends on STM32_STM32F40XX && ARCH_DMA && STM32_DMA2
depends on STM32_STM32F40XX && STM32_DMA2
---help---
In high data rate usage, Rx DMA may eliminate Rx overrun errors
endmenu
config SERIAL_TERMIOS
bool "Serial driver TERMIOS supported"
depends on STM32_USART1 || STM32_USART2 || STM32_USART3 || STM32_UART4 || STM32_UART5 || STM32_USART6
@@ -1819,32 +1635,60 @@ menu "Ethernet MAC configuration"
config STM32_PHYADDR
int "PHY address"
default 1
---help---
The 5-bit address of the PHY on the board
The 5-bit address of the PHY on the board. Default: 1
config STM32_MII
bool "Use MII interface"
default n
depends on STM32_ETHMAC
---help---
Support Ethernet MII interface.
choice
prompt "MII clock configuration"
default STM32_MII_MCO if STM32_STM32F10XX
default STM32_MII_MCO1 if STM32_STM32F20XX || STM32_STM32F40XX
depends on STM32_MII
config STM32_MII_MCO
bool "Use MC0 as MII clock"
depends on STM32_STM32F10XX
---help---
Use MCO to clock the MII interface. Default: Use MC0
config STM32_MII_MCO1
bool "Use MC01 as MII clock"
depends on (STM32_STM32F20XX || STM32_STM32F40XX)
---help---
Use MCO1 to clock the MII interface. Default: Use MC01
config STM32_MII_MCO2
bool "Use MC02 as MII clock"
default n
depends on STM32_MII
depends on (STM32_STM32F20XX || STM32_STM32F40XX)
---help---
Use MCO2 to clock the MII interface. Default: Use MC01
config STM32_MII_EXTCLK
bool "External MII clock"
---help---
Clocking is provided by external logic. Don't use MCO for MII
clock. Default: Use MC0[1]
endchoice
config STM32_AUTONEG
bool "Use autonegtiation"
default y
depends on STM32_ETHMAC
---help---
Use PHY autonegotion to determine speed and mode
config STM32_ETHFD
bool "Full duplex"
default n
depends on !STM32_AUTONEG
depends on STM32_ETHMAC && !STM32_AUTONEG
---help---
If STM32_AUTONEG is not defined, then this may be defined to select full duplex
mode. Default: half-duplex
@@ -1852,7 +1696,7 @@ config STM32_ETHFD
config STM32_ETH100MBPS
bool "100 Mbps"
default n
depends on !STM32_AUTONEG
depends on STM32_ETHMAC && !STM32_AUTONEG
---help---
If STM32_AUTONEG is not defined, then this may be defined to select 100 MBps
speed. Default: 10 Mbps
@@ -1896,6 +1740,7 @@ config STM32_PHYSR_FULLDUPLEX
config STM32_ETH_PTP
bool "Precision Time Protocol (PTP)"
default n
depends on STM32_ETHMAC
---help---
Precision Time Protocol (PTP). Not supported but some hooks are indicated
with this condition.
@@ -1905,11 +1750,39 @@ endmenu
config STM32_RMII
bool
default y if !STM32_MII
depends on STM32_ETHMAC
config STM32_MII_MCO1
bool
default y if !STM32_MII_MCO2
depends on STM32_MII
choice
prompt "RMII clock configuration"
default STM32_RMII_MCO if STM32_STM32F10XX
default STM32_RMII_MCO1 if STM32_STM32F20XX || STM32_STM32F40XX
depends on STM32_RMII
config STM32_RMII_MCO
bool "Use MC0 as RMII clock"
depends on STM32_STM32F10XX
---help---
Use MCO to clock the RMII interface. Default: Use MC0
config STM32_RMII_MCO1
bool "Use MC01 as RMII clock"
depends on (STM32_STM32F20XX || STM32_STM32F40XX)
---help---
Use MCO1 to clock the RMII interface. Default: Use MC01
config STM32_RMII_MCO2
bool "Use MC02 as RMII clock"
depends on (STM32_STM32F20XX || STM32_STM32F40XX)
---help---
Use MCO2 to clock the RMII interface. Default: Use MC01
config STM32_RMII_EXTCLK
bool "External RMII clock"
---help---
Clocking is provided by external logic. Don't use MCO for RMII
clock. Default: Use MC0[1]
endchoice
menu "USB Host Configuration"
nuttx/arch/arm/src/stm32/chip.h
+30 -3
View File
@@ -48,24 +48,51 @@
/* Include the chip pin configuration file */
/* STM32 F1 Family ******************************************************************/
#if defined(CONFIG_STM32_STM32F10XX)
/* STM32F100 Value Line */
# if defined(CONFIG_STM32_VALUELINE)
# include "chip/stm32f100_pinmap.h"
# elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
# include "chip/stm32f103ze_pinmap.h"
/* STM32 F103 High Density Family */
/* STM32F103RC, STM32F103RD, and STM32F103RE are all provided in 64 pin packages and differ
* only in the available FLASH and SRAM.
*/
# elif defined(CONFIG_ARCH_CHIP_STM32F103RET6)
# include "chip/stm32f103re_pinmap.h"
# elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6)
/* STM32F103VC, STM32F103VD, and STM32F103VE are all provided in 100 pin packages and differ
* only in the available FLASH and SRAM.
*/
# elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) || defined(CONFIG_ARCH_CHIP_STM32F103VET6)
# include "chip/stm32f103vc_pinmap.h"
/* STM32F103ZC, STM32F103ZD, and STM32F103ZE are all provided in 144 pin packages and differ
* only in the available FLASH and SRAM.
*/
# elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
# include "chip/stm32f103ze_pinmap.h"
/* STM32 F105/F107 Connectivity Line */
# elif defined(CONFIG_ARCH_CHIP_STM32F105VBT7)
# include "chip/stm32f105vb_pinmap.h"
# elif defined(CONFIG_ARCH_CHIP_STM32F107VC)
# include "chip/stm32f107vc_pinmap.h"
# else
# error "Unsupported STM32F10XXX chip"
# endif
/* STM32 F2 Family ******************************************************************/
#elif defined(CONFIG_STM32_STM32F20XX)
# include "chip/stm32f20xxx_pinmap.h"
/* STM32 F4 Family ******************************************************************/
#elif defined(CONFIG_STM32_STM32F40XX)
# include "chip/stm32f40xxx_pinmap.h"
#else
nuttx/arch/arm/src/stm32/chip/stm32_bkp.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32_bkp.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/chip/stm32_exti.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32_exti.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/chip/stm32_memorymap.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32_memorymap.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/chip/stm32f100_pinmap.h
+1 -1
View File
@@ -4,7 +4,7 @@
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2011 Uros Platise. All rights reserved.
* Copyright (C) 2012 Michael Smith. All Rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
* Uros Platise <uros.platise@isotel.eu>
*
* Redistribution and use in source and binary forms, with or without
nuttx/arch/arm/src/stm32/chip/stm32f103re_pinmap.h
+1 -1
View File
@@ -3,7 +3,7 @@
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2011 Uros Platise. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
* Uros Platise <uros.platise@isotel.eu>
*
* Redistribution and use in source and binary forms, with or without
nuttx/arch/arm/src/stm32/chip/stm32f105vb_pinmap.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32f105vb_pinmap.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h
+27 -27
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32f107vc_pinmap.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -93,41 +93,41 @@
#define GPIO_ETH_MDC (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ETH_MDIO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ETH_MIICOL (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ETH_MIICRSWKUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ETH_MIIRXCLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ETH_MII_COL (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ETH_MII_CRS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ETH_MII_RX_CLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#if defined(CONFIG_STM32_ETH_REMAP)
# define GPIO_ETH_MIIRXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
# define GPIO_ETH_MIIRXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
# define GPIO_ETH_MIIRXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11)
# define GPIO_ETH_MIIRXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12)
# define GPIO_ETH_MIIRXDV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
# define GPIO_ETH_MII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
# define GPIO_ETH_MII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
# define GPIO_ETH_MII_RXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11)
# define GPIO_ETH_MII_RXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12)
# define GPIO_ETH_MII_RX_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
#else
# define GPIO_ETH_MIIRXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_ETH_MIIRXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
# define GPIO_ETH_MIIRXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
# define GPIO_ETH_MIIRXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
# define GPIO_ETH_MIIRXDV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
# define GPIO_ETH_MII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_ETH_MII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
# define GPIO_ETH_MII_RXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
# define GPIO_ETH_MII_RXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
# define GPIO_ETH_MII_RX_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
#endif
#define GPIO_ETH_MIIRXER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
#define GPIO_ETH_MIITXCLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ETH_MIITXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_ETH_MIITXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#define GPIO_ETH_MIITXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ETH_MIITXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
#define GPIO_ETH_MIITXEN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
#define GPIO_ETH_MII_RX_ER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
#define GPIO_ETH_MII_TX_CLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ETH_MII_TXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_ETH_MII_TXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#define GPIO_ETH_MII_TXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ETH_MII_TXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
#define GPIO_ETH_MII_TX_EN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
#define GPIO_ETH_PPS_OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_ETH_RMII_REF_CLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#if defined(CONFIG_STM32_ETH_REMAP)
# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
#else
# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
#endif
#define GPIO_ETH_RMII_TXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_ETH_RMII_TXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
+11 -2
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -47,6 +47,9 @@
#define STM32_SRAMBB_BASE 0x22000000
#define STM32_PERIPH_BASE 0x40000000
#define STM32_REGION_MASK 0xf0000000
#define STM32_IS_SRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
/* Register Base Address ************************************************************/
/* APB1 bus */
@@ -123,7 +126,13 @@
/* Flexible SRAM controller (FSMC) */
#define STM32_FSMC_BASE 0xa0000000
#define STM32_FSMC_BANK1 0x60000000 /* 0x60000000-0x6fffffff: 256Mb NOR/SRAM */
#define STM32_FSMC_BANK2 0x70000000 /* 0x70000000-0x7fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BANK3 0x80000000 /* 0x80000000-0x8fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BANK4 0x90000000 /* 0x90000000-0x9fffffff: 256Mb PC CARD*/
#define STM32_IS_EXTSRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)
#define STM32_FSMC_BASE 0xa0000000 /* 0xa0000000-0xbfffffff: 512Mb FSMC register block */
/* Other registers -- see armv7-m/nvic.h for standard Cortex-M3 registers in this
* address range
nuttx/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h
+9 -1
View File
@@ -46,11 +46,19 @@
#define STM32_SRAM_BASE 0x20000000 /* 0x20000000-0x3fffffff: 512Mb sram block */
#define STM32_PERIPH_BASE 0x40000000 /* 0x40000000-0x5fffffff: 512Mb peripheral block */
#define STM32_FSMC_BASE12 0x60000000 /* 0x60000000-0x7fffffff: 512Mb FSMC bank1&2 block */
# define STM32_FSMC_BANK1 0x60000000 /* 0x60000000-0x6fffffff: 256Mb NOR/SRAM */
# define STM32_FSMC_BANK2 0x70000000 /* 0x70000000-0x7fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BASE34 0x80000000 /* 0x80000000-0x8fffffff: 512Mb FSMC bank3&4 block */
# define STM32_FSMC_BANK3 0x80000000 /* 0x80000000-0x8fffffff: 256Mb NAND FLASH */
# define STM32_FSMC_BANK4 0x90000000 /* 0x90000000-0x9fffffff: 256Mb PC CARD*/
#define STM32_FSMC_BASE 0xa0000000 /* 0xa0000000-0xbfffffff: 512Mb FSMC register block */
/* 0xc0000000-0xdfffffff: 512Mb (not used) */
#define STM32_CORTEX_BASE 0xe0000000 /* 0xe0000000-0xffffffff: 512Mb Cortex-M4 block */
#define STM32_REGION_MASK 0xf0000000
#define STM32_IS_SRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
#define STM32_IS_EXTSRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)
/* Code Base Addresses **************************************************************/
#define STM32_BOOT_BASE 0x00000000 /* 0x00000000-0x000fffff: Aliased boot memory */
@@ -185,7 +193,7 @@
#define STM32_HASH_BASE 0x50060400 /* 0x50060400-0x500607ff: HASH */
#define STM32_RNG_BASE 0x50060800 /* 0x50060800-0x50060bff: RNG */
/* Cortex-M4 Base Addresses *********************************************************/
/* Cortex-M3 Base Addresses *********************************************************/
/* Other registers -- see armv7-m/nvic.h for standard Cortex-M3 registers in this
* address range
*/
nuttx/arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/chip/stm32f40xxx_gpio.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32f40xxx_gpio.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h
+8
View File
@@ -46,11 +46,19 @@
#define STM32_SRAM_BASE 0x20000000 /* 0x20000000-0x3fffffff: 512Mb sram block */
#define STM32_PERIPH_BASE 0x40000000 /* 0x40000000-0x5fffffff: 512Mb peripheral block */
#define STM32_FSMC_BASE12 0x60000000 /* 0x60000000-0x7fffffff: 512Mb FSMC bank1&2 block */
# define STM32_FSMC_BANK1 0x60000000 /* 0x60000000-0x6fffffff: 256Mb NOR/SRAM */
# define STM32_FSMC_BANK2 0x70000000 /* 0x70000000-0x7fffffff: 256Mb NAND FLASH */
#define STM32_FSMC_BASE34 0x80000000 /* 0x80000000-0x8fffffff: 512Mb FSMC bank3&4 block */
# define STM32_FSMC_BANK3 0x80000000 /* 0x80000000-0x8fffffff: 256Mb NAND FLASH */
# define STM32_FSMC_BANK4 0x90000000 /* 0x90000000-0x9fffffff: 256Mb PC CARD*/
#define STM32_FSMC_BASE 0xa0000000 /* 0xa0000000-0xbfffffff: 512Mb FSMC register block */
/* 0xc0000000-0xdfffffff: 512Mb (not used) */
#define STM32_CORTEX_BASE 0xe0000000 /* 0xe0000000-0xffffffff: 512Mb Cortex-M4 block */
#define STM32_REGION_MASK 0xf0000000
#define STM32_IS_SRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
#define STM32_IS_EXTSRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)
/* Code Base Addresses **************************************************************/
#define STM32_BOOT_BASE 0x00000000 /* 0x00000000-0x000fffff: Aliased boot memory */
nuttx/arch/arm/src/stm32/chip/stm32f40xxx_rtc.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/chip/stm32f40xxx_rtc.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_allocateheap.c
+12 -11
View File
@@ -73,13 +73,14 @@
*
* CONFIG_STM32_FSMC=y : Enables the FSMC
* CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the
* FSMC (as opposed to an LCD or FLASH).
* FSMC (as opposed to an LCD or FLASH).
* CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
* address space
* CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
* address space
* address space
* CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC
* address space
* CONFIG_MM_REGIONS : Must be set to a large enough value to
* include the FSMC SRAM (as determined by the rules provided below)
* include the FSMC SRAM (as determined by
* the rules provided below)
*/
#ifndef CONFIG_STM32_FSMC
@@ -211,7 +212,7 @@
* should be 3.
*/
# ifdef CONFIG_STM32_DMA
# ifdef CONFIG_ARCH_DMA
# warning "CCM SRAM is included in the heap AND DMA is enabled"
# endif
# if CONFIG_MM_REGIONS != 3
@@ -237,7 +238,7 @@
* should be disabled and CONFIG_MM_REGIONS should be 2.
*/
# ifdef CONFIG_STM32_DMA
# ifdef CONFIG_ARCH_DMA
# warning "CCM SRAM is included in the heap AND DMA is enabled"
# endif
# if CONFIG_MM_REGIONS < 2
@@ -256,12 +257,12 @@
/* If FSMC SRAM is going to be used as heap, then verify that the starting
* address and size of the external SRAM region has been provided in the
* configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_END).
* configuration (as CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE).
*/
#ifdef CONFIG_STM32_FSMC_SRAM
# if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_END)
# error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_END must be provided"
# if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_SIZE)
# error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_SIZE must be provided"
# undef CONFIG_STM32_FSMC_SRAM
# endif
#endif
@@ -317,7 +318,7 @@ void up_addregion(void)
/* Add the external FSMC SRAM heap region. */
#ifdef CONFIG_STM32_FSMC_SRAM
mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
#endif
}
#endif
nuttx/arch/arm/src/stm32/stm32_dbgmcu.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_dbgmcu.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_eth.c
+133 -15
View File
@@ -102,11 +102,32 @@
#endif
#ifdef CONFIG_STM32_MII
# if !defined(CONFIG_STM32_MII_MCO1) && !defined(CONFIG_STM32_MII_MCO2)
# warning "Neither CONFIG_STM32_MII_MCO1 nor CONFIG_STM32_MII_MCO2 defined"
# if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# if !defined(CONFIG_STM32_MII_MCO1) && !defined(CONFIG_STM32_MII_MCO2) && !defined(CONFIG_STM32_MII_EXTCLK)
# warning "Neither CONFIG_STM32_MII_MCO1, CONFIG_STM32_MII_MCO2, nor CONFIG_STM32_MII_EXTCLK defined"
# endif
# if defined(CONFIG_STM32_MII_MCO1) && defined(CONFIG_STM32_MII_MCO2)
# error "Both CONFIG_STM32_MII_MCO1 and CONFIG_STM32_MII_MCO2 defined"
# endif
# elif defined(CONFIG_STM32_CONNECTIVITYLINE)
# if !defined(CONFIG_STM32_MII_MCO) && !defined(CONFIG_STM32_MII_EXTCLK)
# warning "Neither CONFIG_STM32_MII_MCO nor CONFIG_STM32_MII_EXTCLK defined"
# endif
# endif
# if defined(CONFIG_STM32_MII_MCO1) && defined(CONFIG_STM32_MII_MCO2)
# error "Both CONFIG_STM32_MII_MCO1 and CONFIG_STM32_MII_MCO2 defined"
#endif
#ifdef CONFIG_STM32_RMII
# if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# if !defined(CONFIG_STM32_RMII_MCO1) && !defined(CONFIG_STM32_RMII_MCO2) && !defined(CONFIG_STM32_RMII_EXTCLK)
# warning "Neither CONFIG_STM32_RMII_MCO1, CONFIG_STM32_RMII_MCO2, nor CONFIG_STM32_RMII_EXTCLK defined"
# endif
# if defined(CONFIG_STM32_RMII_MCO1) && defined(CONFIG_STM32_RMII_MCO2)
# error "Both CONFIG_STM32_RMII_MCO1 and CONFIG_STM32_RMII_MCO2 defined"
# endif
# elif defined(CONFIG_STM32_CONNECTIVITYLINE)
# if !defined(CONFIG_STM32_RMII_MCO) && !defined(CONFIG_STM32_RMII_EXTCLK)
# warning "Neither CONFIG_STM32_RMII_MCO nor CONFIG_STM32_RMII_EXTCLK defined"
# endif
# endif
#endif
@@ -608,6 +629,12 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv);
/* MAC/DMA Initialization */
#ifdef CONFIG_STM32_MII
static inline void stm32_selectmii(void);
#endif
#ifdef CONFIG_STM32_RMII
static inline void stm32_selectrmii(void);
#endif
static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv);
static void stm32_ethreset(FAR struct stm32_ethmac_s *priv);
static int stm32_macconfig(FAR struct stm32_ethmac_s *priv);
@@ -2570,6 +2597,66 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
return OK;
}
/************************************************************************************
* Name: stm32_selectmii
*
* Description:
* Selects the MII inteface.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
#ifdef CONFIG_STM32_MII
static inline void stm32_selectmii(void)
{
uint32_t regval;
#ifdef CONFIG_STM32_CONNECTIVITYLINE
regval = getreg32(STM32_AFIO_MAPR);
regval &= ~AFIO_MAPR_MII_RMII_SEL;
putreg32(regval, STM32_AFIO_MAPR);
#else
regval = getreg32(STM32_SYSCFG_PMC);
regval &= ~SYSCFG_PMC_MII_RMII_SEL;
putreg32(regval, STM32_SYSCFG_PMC);
#endif
}
#endif
/************************************************************************************
* Name: stm32_selectrmii
*
* Description:
* Selects the RMII inteface.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
static inline void stm32_selectrmii(void)
{
uint32_t regval;
#ifdef CONFIG_STM32_CONNECTIVITYLINE
regval = getreg32(STM32_AFIO_MAPR);
regval |= AFIO_MAPR_MII_RMII_SEL;
putreg32(regval, STM32_AFIO_MAPR);
#else
regval = getreg32(STM32_SYSCFG_PMC);
regval |= SYSCFG_PMC_MII_RMII_SEL;
putreg32(regval, STM32_SYSCFG_PMC);
#endif
}
/****************************************************************************
* Function: stm32_ethgpioconfig
*
@@ -2605,7 +2692,7 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
stm32_selectmii();
/* Provide clocking via MCO1 or MCO2:
/* Provide clocking via MCO, MCO1 or MCO2:
*
* "MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
* clock (through a configurable prescaler) on PA8 pin."
@@ -2614,7 +2701,7 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
* PLLI2S clock (through a configurable prescaler) on PC9 pin."
*/
# if defined(CONFIG_STM32_MII_MCO1)
# if defined(CONFIG_STM32_MII_MCO1)
/* Configure MC01 to drive the PHY. Board logic must provide MC01 clocking
* info.
*/
@@ -2622,14 +2709,20 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
stm32_configgpio(GPIO_MCO1);
stm32_mco1config(BOARD_CFGR_MC01_SOURCE, BOARD_CFGR_MC01_DIVIDER);
# elif defined(CONFIG_STM32_MII_MCO2)
# elif defined(CONFIG_STM32_MII_MCO2)
/* Configure MC02 to drive the PHY. Board logic must provide MC02 clocking
* info.
*/
stm32_configgpio(GPIO_MCO2);
stm32_mco2config(BOARD_CFGR_MC02_SOURCE, BOARD_CFGR_MC02_DIVIDER);
# endif
# elif defined(CONFIG_STM32_MII_MCO)
/* Setup MCO pin for alternative usage */
stm32_configgpio(GPIO_MCO);
stm32_mcoconfig(BOARD_CFGR_MCO_SOURCE);
# endif
/* MII interface pins (17):
*
@@ -2657,17 +2750,42 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
#elif defined(CONFIG_STM32_RMII)
/* Setup MCO pin for alternative usage */
#if defined(CONFIG_STM32_RMII_MCO)
stm32_configgpio(GPIO_MCO);
stm32_mcoconfig(BOARD_CFGR_MCO_SOURCE);
#endif
/* Select the RMII interface */
stm32_selectrmii();
/* Provide clocking via MCO, MCO1 or MCO2:
*
* "MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
* clock (through a configurable prescaler) on PA8 pin."
*
* "MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or
* PLLI2S clock (through a configurable prescaler) on PC9 pin."
*/
# if defined(CONFIG_STM32_RMII_MCO1)
/* Configure MC01 to drive the PHY. Board logic must provide MC01 clocking
* info.
*/
stm32_configgpio(GPIO_MCO1);
stm32_mco1config(BOARD_CFGR_MC01_SOURCE, BOARD_CFGR_MC01_DIVIDER);
# elif defined(CONFIG_STM32_RMII_MCO2)
/* Configure MC02 to drive the PHY. Board logic must provide MC02 clocking
* info.
*/
stm32_configgpio(GPIO_MCO2);
stm32_mco2config(BOARD_CFGR_MC02_SOURCE, BOARD_CFGR_MC02_DIVIDER);
# elif defined(CONFIG_STM32_RMII_MCO)
/* Setup MCO pin for alternative usage */
stm32_configgpio(GPIO_MCO);
stm32_mcoconfig(BOARD_CFGR_MCO_SOURCE);
# endif
/* RMII interface pins (7):
*
* RMII_TXD[1:0], RMII_TX_EN, RMII_RXD[1:0], RMII_CRS_DV, MDC, MDIO,
nuttx/arch/arm/src/stm32/stm32_eth.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_eth.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_gpio.h
+1 -1
View File
@@ -3,7 +3,7 @@
*
* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2011 Uros Platise. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
* Uros Platise <uros.platise@isotel.eu>
*
* Redistribution and use in source and binary forms, with or without
nuttx/arch/arm/src/stm32/stm32_i2c.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_i2c.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_lowputc.c
+10 -10
View File
@@ -85,22 +85,22 @@
# define STM32_CONSOLE_2STOP CONFIG_USART3_2STOP
# define STM32_CONSOLE_TX GPIO_USART3_TX
# define STM32_CONSOLE_RX GPIO_USART3_RX
#elif defined(CONFIG_USART4_SERIAL_CONSOLE)
#elif defined(CONFIG_UART4_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_UART4_BASE
# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
# define STM32_CONSOLE_BAUD CONFIG_USART4_BAUD
# define STM32_CONSOLE_BITS CONFIG_USART4_BITS
# define STM32_CONSOLE_PARITY CONFIG_USART4_PARITY
# define STM32_CONSOLE_2STOP CONFIG_USART4_2STOP
# define STM32_CONSOLE_BAUD CONFIG_UART4_BAUD
# define STM32_CONSOLE_BITS CONFIG_UART4_BITS
# define STM32_CONSOLE_PARITY CONFIG_UART4_PARITY
# define STM32_CONSOLE_2STOP CONFIG_UART4_2STOP
# define STM32_CONSOLE_TX GPIO_UART4_TX
# define STM32_CONSOLE_RX GPIO_UART4_RX
#elif defined(CONFIG_USART5_SERIAL_CONSOLE)
#elif defined(CONFIG_UART5_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_UART5_BASE
# define STM32_APBCLOCK STM32_PCLK1_FREQUENCY
# define STM32_CONSOLE_BAUD CONFIG_USART5_BAUD
# define STM32_CONSOLE_BITS CONFIG_USART5_BITS
# define STM32_CONSOLE_PARITY CONFIG_USART5_PARITY
# define STM32_CONSOLE_2STOP CONFIG_USART5_2STOP
# define STM32_CONSOLE_BAUD CONFIG_UART5_BAUD
# define STM32_CONSOLE_BITS CONFIG_UART5_BITS
# define STM32_CONSOLE_PARITY CONFIG_UART5_PARITY
# define STM32_CONSOLE_2STOP CONFIG_UART5_2STOP
# define STM32_CONSOLE_TX GPIO_UART5_TX
# define STM32_CONSOLE_RX GPIO_UART5_RX
#elif defined(CONFIG_USART6_SERIAL_CONSOLE)
nuttx/arch/arm/src/stm32/stm32_lowputc.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_lowputc.h
*
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_otgfsdev.c
+15 -5
View File
@@ -607,7 +607,7 @@ static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep,
/* Endpoint buffer management */
#ifdef CONFIG_ARCH_USBDEV_DMA
#ifdef CONFIG_USBDEV_DMA
static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes);
static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf);
#endif
@@ -669,7 +669,7 @@ static const struct usbdev_epops_s g_epops =
.disable = stm32_ep_disable,
.allocreq = stm32_ep_allocreq,
.freereq = stm32_ep_freereq,
#ifdef CONFIG_ARCH_USBDEV_DMA
#ifdef CONFIG_USBDEV_DMA
.allocbuffer = stm32_ep_allocbuffer,
.freebuffer = stm32_ep_freebuffer,
#endif
@@ -4070,11 +4070,16 @@ static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
*
*******************************************************************************/
#ifdef CONFIG_ARCH_USBDEV_DMA
#ifdef CONFIG_USBDEV_DMA
static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes)
{
usbtrace(TRACE_EPALLOCBUFFER, privep->epphy);
return malloc(bytes)
#ifdef CONFIG_USBDEV_DMAMEMORY
return usbdev_dma_alloc(bytes);
#else
return malloc(bytes);
#endif
}
#endif
@@ -4086,11 +4091,16 @@ static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes)
*
*******************************************************************************/
#ifdef CONFIG_STM32_USBDEV_DMA
#ifdef CONFIG_USBDEV_DMA
static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf)
{
usbtrace(TRACE_EPFREEBUFFER, privep->epphy);
#ifdef CONFIG_USBDEV_DMAMEMORY
usbdev_dma_free(buf);
#else
free(buf);
#endif
}
#endif
nuttx/arch/arm/src/stm32/stm32_pwr.c
+1 -1
View File
@@ -95,4 +95,4 @@ void stm32_pwr_enablebkp(void)
stm32_pwr_modifyreg(STM32_PWR_CR_OFFSET, 0, PWR_CR_DBP);
}
#endif // defined(CONFIG_STM32_PWR)
#endif /* CONFIG_STM32_PWR */
nuttx/arch/arm/src/stm32/stm32_pwr.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_pwr.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_sdio.c
+3 -1
View File
@@ -2512,6 +2512,7 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
stm32_sample(priv, SAMPLENDX_AFTER_SETUP);
ret = OK;
}
return ret;
}
#endif
@@ -2587,6 +2588,7 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
ret = OK;
}
return ret;
}
#endif
@@ -2660,7 +2662,7 @@ static void stm32_callback(void *arg)
/* Yes.. queue it */
fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
(void)work_queue(&priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
(void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
}
else
{
nuttx/arch/arm/src/stm32/stm32_serial.c
+35 -35
View File
@@ -90,7 +90,7 @@
# endif
# if defined(CONFIG_USART2_RXDMA) || defined(CONFIG_USART3_RXDMA) || \
defined(CONFIG_USART4_RXDMA) || defined(CONFIG_USART5_RXDMA)
defined(CONFIG_UART4_RXDMA) || defined(CONFIG_UART5_RXDMA)
# ifndef CONFIG_STM32_DMA1
# error STM32 USART2/3/4/5 receive DMA requires CONFIG_STM32_DMA1
# endif
@@ -113,11 +113,11 @@
# error "USART3 DMA channel not defined (DMAMAP_USART3_RX)"
# endif
# if defined(CONFIG_USART4_RXDMA) && !defined(DMAMAP_UART4_RX)
# if defined(CONFIG_UART4_RXDMA) && !defined(DMAMAP_UART4_RX)
# error "UART4 DMA channel not defined (DMAMAP_UART4_RX)"
# endif
# if defined(CONFIG_USART5_RXDMA) && !defined(DMAMAP_UART5_RX)
# if defined(CONFIG_UART5_RXDMA) && !defined(DMAMAP_UART5_RX)
# error "UART5 DMA channel not defined (DMAMAP_UART5_RX)"
# endif
@@ -338,17 +338,17 @@ static char g_usart3rxfifo[RXDMA_BUFFER_SIZE];
#endif
#ifdef CONFIG_STM32_UART4
static char g_uart4rxbuffer[CONFIG_USART4_RXBUFSIZE];
static char g_uart4txbuffer[CONFIG_USART4_TXBUFSIZE];
# ifdef CONFIG_USART4_RXDMA
static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
# ifdef CONFIG_UART4_RXDMA
static char g_uart4rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
#ifdef CONFIG_STM32_UART5
static char g_uart5rxbuffer[CONFIG_USART5_RXBUFSIZE];
static char g_uart5txbuffer[CONFIG_USART5_TXBUFSIZE];
# ifdef CONFIG_USART5_RXDMA
static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE];
static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
# ifdef CONFIG_UART5_RXDMA
static char g_uart5rxfifo[RXDMA_BUFFER_SIZE];
# endif
#endif
@@ -526,15 +526,15 @@ static struct up_dev_s g_uart4priv =
#endif
.recv =
{
.size = CONFIG_USART4_RXBUFSIZE,
.size = CONFIG_UART4_RXBUFSIZE,
.buffer = g_uart4rxbuffer,
},
.xmit =
{
.size = CONFIG_USART4_TXBUFSIZE,
.size = CONFIG_UART4_TXBUFSIZE,
.buffer = g_uart4txbuffer,
},
#ifdef CONFIG_USART4_RXDMA
#ifdef CONFIG_UART4_RXDMA
.ops = &g_uart_dma_ops,
#else
.ops = &g_uart_ops,
@@ -543,21 +543,21 @@ static struct up_dev_s g_uart4priv =
},
.irq = STM32_IRQ_UART4,
.parity = CONFIG_USART4_PARITY,
.bits = CONFIG_USART4_BITS,
.stopbits2 = CONFIG_USART4_2STOP,
.baud = CONFIG_USART4_BAUD,
.parity = CONFIG_UART4_PARITY,
.bits = CONFIG_UART4_BITS,
.stopbits2 = CONFIG_UART4_2STOP,
.baud = CONFIG_UART4_BAUD,
.apbclock = STM32_PCLK1_FREQUENCY,
.usartbase = STM32_UART4_BASE,
.tx_gpio = GPIO_UART4_TX,
.rx_gpio = GPIO_UART4_RX,
#ifdef GPIO_USART4_CTS
#ifdef GPIO_UART4_CTS
.cts_gpio = GPIO_UART4_CTS,
#endif
#ifdef GPIO_USART4_RTS
#ifdef GPIO_UART4_RTS
.rts_gpio = GPIO_UART4_RTS,
#endif
#ifdef CONFIG_USART4_RXDMA
#ifdef CONFIG_UART4_RXDMA
.rxdma_channel = DMAMAP_UART4_RX,
.rxfifo = g_uart4rxfifo,
#endif
@@ -577,15 +577,15 @@ static struct up_dev_s g_uart5priv =
#endif
.recv =
{
.size = CONFIG_USART5_RXBUFSIZE,
.size = CONFIG_UART5_RXBUFSIZE,
.buffer = g_uart5rxbuffer,
},
.xmit =
{
.size = CONFIG_USART5_TXBUFSIZE,
.size = CONFIG_UART5_TXBUFSIZE,
.buffer = g_uart5txbuffer,
},
#ifdef CONFIG_USART5_RXDMA
#ifdef CONFIG_UART5_RXDMA
.ops = &g_uart_dma_ops,
#else
.ops = &g_uart_ops,
@@ -594,21 +594,21 @@ static struct up_dev_s g_uart5priv =
},
.irq = STM32_IRQ_UART5,
.parity = CONFIG_USART5_PARITY,
.bits = CONFIG_USART5_BITS,
.stopbits2 = CONFIG_USART5_2STOP,
.baud = CONFIG_USART5_BAUD,
.parity = CONFIG_UART5_PARITY,
.bits = CONFIG_UART5_BITS,
.stopbits2 = CONFIG_UART5_2STOP,
.baud = CONFIG_UART5_BAUD,
.apbclock = STM32_PCLK1_FREQUENCY,
.usartbase = STM32_UART5_BASE,
.tx_gpio = GPIO_UART5_TX,
.rx_gpio = GPIO_UART5_RX,
#ifdef GPIO_USART5_CTS
#ifdef GPIO_UART5_CTS
.cts_gpio = GPIO_UART5_CTS,
#endif
#ifdef GPIO_USART5_RTS
#ifdef GPIO_UART5_RTS
.rts_gpio = GPIO_UART5_RTS,
#endif
#ifdef CONFIG_USART5_RXDMA
#ifdef CONFIG_UART5_RXDMA
.rxdma_channel = DMAMAP_UART5_RX,
.rxfifo = g_uart5rxfifo,
#endif
@@ -1840,13 +1840,13 @@ void up_serialinit(void)
(void)uart_register("/dev/console", &uart_devs[CONSOLE_UART - 1]->dev);
(void)uart_register("/dev/ttyS0", &uart_devs[CONSOLE_UART - 1]->dev);
/* If we need to re-initialise the console (e.g. to enable DMA) do that here. */
/* If we need to re-initialise the console to enable DMA do that here. */
# if CONFIG_SERIAL_CONSOLE_REINIT
uart_devs[CONSOLE_UART - 1]->dev.ops->setup(&uart_devs[CONSOLE_UART - 1]->dev);
# ifdef SERIAL_HAVE_CONSOLE_DMA
up_dma_setup(&uart_devs[CONSOLE_UART - 1]->dev);
# endif
#endif
#endif /* CONSOLE_UART > 0 */
/* Register all remaining USARTs */
@@ -1909,14 +1909,14 @@ void stm32_serial_dma_poll(void)
}
#endif
#ifdef CONFIG_USART4_RXDMA
#ifdef CONFIG_UART4_RXDMA
if (g_uart4priv.rxdma != NULL)
{
up_dma_rxcallback(g_uart4priv.rxdma, 0, &g_uart4priv);
}
#endif
#ifdef CONFIG_USART5_RXDMA
#ifdef CONFIG_UART5_RXDMA
if (g_uart5priv.rxdma != NULL)
{
up_dma_rxcallback(g_uart5priv.rxdma, 0, &g_uart5priv);
nuttx/arch/arm/src/stm32/stm32_spi.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_spi.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_syscfg.h
+1 -51
View File
@@ -45,60 +45,10 @@
#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# include "chip/stm32_syscfg.h"
#endif /* CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F40XX */
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/****************************************************************************************************
* Inline Functions
****************************************************************************************************/
/************************************************************************************
* Name: stm32_selectmii
*
* Description:
* Selects the MII inteface.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
static inline void stm32_selectmii(void)
{
uint32_t regval;
regval = getreg32(STM32_SYSCFG_PMC);
regval &= ~SYSCFG_PMC_MII_RMII_SEL;
putreg32(regval, STM32_SYSCFG_PMC);
}
/************************************************************************************
* Name: stm32_selectrmii
*
* Description:
* Selects the RMII inteface.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
static inline void stm32_selectrmii(void)
{
uint32_t regval;
regval = getreg32(STM32_SYSCFG_PMC);
regval |= SYSCFG_PMC_MII_RMII_SEL;
putreg32(regval, STM32_SYSCFG_PMC);
}
#endif /* CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F40XX */
#endif /* __ARCH_ARM_SRC_STM32_STM32_SYSCFG_H */
nuttx/arch/arm/src/stm32/stm32_timerisr.c
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_timerisr.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_uart.h
+39 -22
View File
@@ -84,40 +84,40 @@
#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1)
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_USART4_SERIAL_CONSOLE
# undef CONFIG_USART5_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
# undef CONFIG_UART5_SERIAL_CONSOLE
# undef CONFIG_USART6_SERIAL_CONSOLE
# define CONSOLE_UART 1
# define HAVE_CONSOLE 1
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_USART4_SERIAL_CONSOLE
# undef CONFIG_USART5_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
# undef CONFIG_UART5_SERIAL_CONSOLE
# undef CONFIG_USART6_SERIAL_CONSOLE
# define CONSOLE_UART 2
# define HAVE_CONSOLE 1
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART4_SERIAL_CONSOLE
# undef CONFIG_USART5_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
# undef CONFIG_UART5_SERIAL_CONSOLE
# undef CONFIG_USART6_SERIAL_CONSOLE
# define CONSOLE_UART 3
# define HAVE_CONSOLE 1
#elif defined(CONFIG_USART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4)
#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_USART5_SERIAL_CONSOLE
# undef CONFIG_UART5_SERIAL_CONSOLE
# undef CONFIG_USART6_SERIAL_CONSOLE
# define CONSOLE_UART 4
# define HAVE_CONSOLE 1
#elif defined(CONFIG_USART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5)
#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5)
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_USART4_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
# undef CONFIG_USART6_SERIAL_CONSOLE
# define CONSOLE_UART 5
# define HAVE_CONSOLE 1
@@ -125,16 +125,16 @@
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_USART4_SERIAL_CONSOLE
# undef CONFIG_USART5_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
# undef CONFIG_UART5_SERIAL_CONSOLE
# define CONSOLE_UART 6
# define HAVE_CONSOLE 1
#else
# undef CONFIG_USART1_SERIAL_CONSOLE
# undef CONFIG_USART2_SERIAL_CONSOLE
# undef CONFIG_USART3_SERIAL_CONSOLE
# undef CONFIG_USART4_SERIAL_CONSOLE
# undef CONFIG_USART5_SERIAL_CONSOLE
# undef CONFIG_UART4_SERIAL_CONSOLE
# undef CONFIG_UART5_SERIAL_CONSOLE
# undef CONFIG_USART6_SERIAL_CONSOLE
# define CONSOLE_UART 0
# undef HAVE_CONSOLE
@@ -149,8 +149,8 @@
# undef CONFIG_USART1_RXDMA
# undef CONFIG_USART2_RXDMA
# undef CONFIG_USART3_RXDMA
# undef CONFIG_USART4_RXDMA
# undef CONFIG_USART5_RXDMA
# undef CONFIG_UART4_RXDMA
# undef CONFIG_UART5_RXDMA
# undef CONFIG_USART6_RXDMA
#endif
@@ -169,11 +169,11 @@
#endif
#ifndef CONFIG_STM32_UART4
# undef CONFIG_USART4_RXDMA
# undef CONFIG_UART4_RXDMA
#endif
#ifndef CONFIG_STM32_UART5
# undef CONFIG_USART5_RXDMA
# undef CONFIG_UART5_RXDMA
#endif
#ifndef CONFIG_STM32_USART6
@@ -184,11 +184,28 @@
#undef SERIAL_HAVE_DMA
#if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \
defined(CONFIG_USART3_RXDMA) || defined(CONFIG_USART4_RXDMA) || \
defined(CONFIG_USART5_RXDMA) || defined(CONFIG_USART6_RXDMA)
defined(CONFIG_USART3_RXDMA) || defined(CONFIG_UART4_RXDMA) || \
defined(CONFIG_UART5_RXDMA) || defined(CONFIG_USART6_RXDMA)
# define SERIAL_HAVE_DMA 1
#endif
/* Is DMA used on the console UART? */
#undef SERIAL_HAVE_CONSOLE_DMA
#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_RXDMA)
# define SERIAL_HAVE_CONSOLE_DMA 1
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_USART2_RXDMA)
# define SERIAL_HAVE_CONSOLE_DMA 1
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_USART3_RXDMA)
# define SERIAL_HAVE_CONSOLE_DMA 1
#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_UART4_RXDMA)
# define SERIAL_HAVE_CONSOLE_DMA 1
#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_UART5_RXDMA)
# define SERIAL_HAVE_CONSOLE_DMA 1
#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_USART6_RXDMA)
# define SERIAL_HAVE_CONSOLE_DMA 1
#endif
/* Is DMA used on all (enabled) USARTs */
#define SERIAL_HAVE_ONLY_DMA 1
@@ -198,9 +215,9 @@
# undef SERIAL_HAVE_ONLY_DMA
#elif defined(CONFIG_STM32_USART3) && !defined(CONFIG_USART3_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_USART4_RXDMA)
#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_UART4_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_USART5_RXDMA)
#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_UART5_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
#elif defined(CONFIG_STM32_USART6) && !defined(CONFIG_USART6_RXDMA)
# undef SERIAL_HAVE_ONLY_DMA
nuttx/arch/arm/src/stm32/stm32_usbdev.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_usbdev.h
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32_wdg.h
+1 -1
View File
@@ -2,7 +2,7 @@
* arch/arm/src/stm32/stm32_wdg.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/arch/arm/src/stm32/stm32f10xxx_rtc.c
+4
View File
@@ -113,6 +113,10 @@
# error "CONFIG_STM32_BKP is required for CONFIG_RTC"
#endif
#ifndef CONFIG_STM32_PWR
# error "CONFIG_STM32_PWR is required for CONFIG_RTC"
#endif
/* RTC/BKP Definitions *************************************************************/
/* STM32_RTC_PRESCALAR_VALUE
* RTC pre-scalar value. The RTC is driven by a 32,768Hz input clock. This input
nuttx/binfmt/Makefile
+1 -1
View File
@@ -2,7 +2,7 @@
# nxflat/Makefile
#
# Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_dumpmodule.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_dumpmodule.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_exec.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_exec.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_execmodule.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_execmodule.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_globals.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_globals.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_internal.h
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_internal.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_loadmodule.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_loadmodule.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_register.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_register.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_unloadmodule.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_loadmodule.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/binfmt_unregister.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/binfmt_unregister.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/libnxflat/Make.defs
+1 -1
View File
@@ -2,7 +2,7 @@
# nxflat/lib/Make.defs
#
# Copyright (C) 2009 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
nuttx/binfmt/libnxflat/gnu-nxflat.ld
+1 -1
View File
@@ -2,7 +2,7 @@
* examples/nxflat/nxflat.ld
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/libnxflat/libnxflat_bind.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/libnxflat/libnxflat_bind.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/libnxflat/libnxflat_init.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/libnxflat/libnxflat_init.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/libnxflat/libnxflat_load.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/libnxflat/libnxflat_load.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/libnxflat/libnxflat_read.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/libnxflat/libnxflat_read.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
nuttx/binfmt/libnxflat/libnxflat_uninit.c
+1 -1
View File
@@ -2,7 +2,7 @@
* binfmt/libnxflat/libnxflat_uninit.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions

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