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https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-11-06 04:41:36 +08:00
Add z180 system timer
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5438 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
@@ -175,11 +175,12 @@ config Z180_ESCCB
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---help---
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Select to enable a serial port on ESCC Channel B
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config Z180_TMR1
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config Z180_PRT1
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bool "Timer 1"
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default n
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---help---
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Select to enable a Timer 1 (Timer 0 is used by NuttX as the system timer)
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Select to enable a Programmable Reload Timer 1 (PRT1, PRT0 is used
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by NuttX as the system timer)
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# config Z180_DMA0
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# bool "DMA0"
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@@ -60,3 +60,4 @@ endif
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CHIP_CSRCS = z180_copystate.c z180_initialstate.c z180_io.c z180_irq.c
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CHIP_CSRCS += z180_lowscc.c z180_lowserial.c z180_modifiyreg8.c z180_mmu.c
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CHIP_CSRCS += z180_registerdump.c z180_schedulesigaction.c z180_sigdeliver.c
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CHIP_CSRCS += z180_timerisr.c
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@@ -44,6 +44,8 @@
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#include <arch/z180/chip.h>
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#include "up_internal.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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@@ -103,7 +105,7 @@
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# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
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#endif
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#ifndef CONFIG_Z180_ESCCA
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#ifndef CONFIG_Z180_ESCCB
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# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
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#endif
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@@ -114,34 +116,106 @@
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#undef HAVE_SERIAL_CONSOLE
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#if defined(CONFIG_Z180_UART0_SERIAL_CONSOLE)
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# define HAVE_UART_CONSOLE 1
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# define HAVE_SERIAL_CONSOLE 1
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/* Disable other console selections */
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# undef CONFIG_Z180_UART1_SERIAL_CONSOLE
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# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
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# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
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# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
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/* If we are not using the serial driver, then the serial console is all
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* that we will support.
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*/
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# ifndef USE_SERIALDRIVER
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# undef CONFIG_Z180_UART1
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# undef CONFIG_Z180_SCC
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# undef CONFIG_Z180_ESCCA
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# undef CONFIG_Z180_ESCCB
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# endif
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#elif defined(CONFIG_Z180_UART1_SERIAL_CONSOLE)
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# define HAVE_UART_CONSOLE 1
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_Z180_UART1_SERIAL_CONSOLE)
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/* Disable other console selections */
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# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
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# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
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# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
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# define HAVE_UART_CONSOLE 1
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/* If we are not using the serial driver, then the serial console is all
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* that we will support.
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*/
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# ifndef USE_SERIALDRIVER
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# undef CONFIG_Z180_UART0
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# undef CONFIG_Z180_SCC
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# undef CONFIG_Z180_ESCCA
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# undef CONFIG_Z180_ESCCB
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# endif
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#elif defined(CONFIG_Z180_SCC_SERIAL_CONSOLE)
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# define HAVE_SCC_CONSOLE 1
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_Z180_ESCC_SERIAL_CONSOLE)
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/* Disable other console selections */
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# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
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# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
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/* If we are not using the serial driver, then the serial console is all
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* that we will support.
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*/
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# ifndef USE_SERIALDRIVER
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# undef CONFIG_Z180_UART0
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# undef CONFIG_Z180_UART1
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# undef CONFIG_Z180_ESCCA
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# undef CONFIG_Z180_ESCCB
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# endif
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#elif defined(CONFIG_Z180_ESCCA_SERIAL_CONSOLE)
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# define HAVE_SCC_CONSOLE 1
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# define HAVE_SERIAL_CONSOLE 1
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#elif defined(CONFIG_Z180_ESCCA_SERIAL_CONSOLE)
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/* Disable other console selections */
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# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
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# define HAVE_SCC_CONSOLE 1
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# define HAVE_SERIAL_CONSOLE 1
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/* If we are not using the serial driver, then the serial console is all
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* that we will support.
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*/
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# ifndef USE_SERIALDRIVER
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# undef CONFIG_Z180_UART0
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# undef CONFIG_Z180_UART1
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# undef CONFIG_Z180_SCC
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# undef CONFIG_Z180_ESCCB
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# endif
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/* If we are not using the serial driver, then the serial console is all
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* that we will support.
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*/
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#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
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# define HAVE_SCC_CONSOLE 1
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# define HAVE_SERIAL_CONSOLE 1
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/* If we are not using the serial driver, then the serial console is all
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* that we will support.
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*/
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# ifndef USE_SERIALDRIVER
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# undef CONFIG_Z180_UART0
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# undef CONFIG_Z180_UART1
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# undef CONFIG_Z180_SCC
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# undef CONFIG_Z180_ESCCA
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# endif
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#endif
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/************************************************************************************
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@@ -89,18 +89,18 @@
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#define Z180_CSIO_CNTR (SFR_OFFSET+0x0a) /* CSI/O Control Register */
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#define Z180_CSIO_TRD (SFR_OFFSET+0x0b) /* Transmit/Receive Data Register */
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/* Timer Registers */
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/* Programmable Reload Timer (PTR) Registers */
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#define Z180_TMR0_DRL (SFR_OFFSET+0x0c) /* Timer Data Register Ch 0 L */
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#define Z180_TMR0_DRH (SFR_OFFSET+0x0d) /* Data Register Ch 0 H */
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#define Z180_TMR0_RLDRL (SFR_OFFSET+0x0e) /* Reload Register Ch 0 L */
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#define Z180_TMR0_RLDRH (SFR_OFFSET+0x0f) /* Reload Register Ch 0 H */
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#define Z180_TMR_TCR (SFR_OFFSET+0x10) /* Timer Control Register */
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#define Z180_PRT0_DRL (SFR_OFFSET+0x0c) /* Timer Data Register Ch 0 L */
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#define Z180_PRT0_DRH (SFR_OFFSET+0x0d) /* Data Register Ch 0 H */
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#define Z180_PRT0_RLDRL (SFR_OFFSET+0x0e) /* Reload Register Ch 0 L */
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#define Z180_PRT0_RLDRH (SFR_OFFSET+0x0f) /* Reload Register Ch 0 H */
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#define Z180_PRT_TCR (SFR_OFFSET+0x10) /* Timer Control Register */
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#define Z180_TMR1_DRL (SFR_OFFSET+0x14) /* Data Register Ch 1 L */
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#define Z180_TMR1_DRH (SFR_OFFSET+0x15) /* Data Register Ch 1 H */
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#define Z180_TMR1_RLDRL (SFR_OFFSET+0x16) /* Reload Register Ch 1 L */
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#define Z180_TMR1_RLDRH (SFR_OFFSET+0x17) /* Reload Register Ch 1 H */
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#define Z180_PRT1_DRL (SFR_OFFSET+0x14) /* Data Register Ch 1 L */
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#define Z180_PRT1_DRH (SFR_OFFSET+0x15) /* Data Register Ch 1 H */
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#define Z180_PRT1_RLDRL (SFR_OFFSET+0x16) /* Reload Register Ch 1 L */
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#define Z180_PRT1_RLDRH (SFR_OFFSET+0x17) /* Reload Register Ch 1 H */
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#define Z180_FRC (SFR_OFFSET+0x18) /* Free Running Counter */
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@@ -398,16 +398,16 @@
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/* Timer Reload Register Channel 0L (RLDR0L: 0x0e) -- 8-bit data */
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/* Timer Reload Register Channel 0H (RLDR0H: 0x0f) -- 8-bit data */
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/* Timer Control Register (TCR: 0x10) */
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/* Programmable Reload Timer (PTR) Control Register (TCR: 0x10) */
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#define TMR_TCR_TIF1 (0x80) /* Bit 7: Timer 1 Interrupt Flag */
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#define TMR_TCR_TIF0 (0x40) /* Bit 6: Timer 0 Interrupt Flag */
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#define TMR_TCR_TIE1 (0x20) /* Bit 5: Timer 1 Interrupt Enable */
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#define TMR_TCR_TIE0 (0x10) /* Bit 4: Timer 0 Interrupt Enable */
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#define TMR_TCR_TOC1 (0x08) /* Bit 3: Timer 1 Output Control */
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#define TMR_TCR_TOC0 (0x04) /* Bit 2: Timer 0 Output Control */
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#define TMR_TCR_TDE1 (0x02) /* Bit 1: Timer 1 Down Count Enable */
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#define TMR_TCR_TDE0 (0x01) /* Bit 0: Timer 0 Down Count Enable */
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#define PRT_TCR_TIF1 (0x80) /* Bit 7: Timer 1 Interrupt Flag */
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#define PRT_TCR_TIF0 (0x40) /* Bit 6: Timer 0 Interrupt Flag */
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#define PRT_TCR_TIE1 (0x20) /* Bit 5: Timer 1 Interrupt Enable */
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#define PRT_TCR_TIE0 (0x10) /* Bit 4: Timer 0 Interrupt Enable */
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#define PRT_TCR_TOC1 (0x08) /* Bit 3: Timer 1 Output Control */
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#define PRT_TCR_TOC0 (0x04) /* Bit 2: Timer 0 Output Control */
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#define PRT_TCR_TDE1 (0x02) /* Bit 1: Timer 1 Down Count Enable */
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#define PRT_TCR_TDE0 (0x01) /* Bit 0: Timer 0 Down Count Enable */
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/* Timer Data Register 1L (TMDR1L: 0x14) -- 8-bit data */
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/* Timer Data Register 1H (TMDR1H: 0x15) -- 8-bit data */
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@@ -90,20 +90,6 @@
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: z180_scc_setbaud
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*
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* Description:
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*
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****************************************************************************/
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#if defined(HAVE_SCC_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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static void z180_scc_setbaud(void)
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{
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#warning "Missing logic"
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}
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#endif /* HAVE_SCC_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@@ -112,34 +98,19 @@ static void z180_scc_setbaud(void)
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* Name: z180_scc_lowinit
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*
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* Description:
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* Called early in the boot sequence to initialize the [E]SCC channel(s)
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* Called early in the boot sequence to initialize the [E]SCC console
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* channel (only).
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*
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****************************************************************************/
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#ifdef USE_LOWSERIALINIT
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void z180_scc_lowinit(void)
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{
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#warning "Missing logic"
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/* Configure for usage of {E]SCC channels (whether or not we have a console) */
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#ifdef CONFIG_Z180_SCC
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#ifdef HAVE_SCC_CONSOLE
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#warning "Missing logic"
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#endif
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#ifdef CONFIG_Z180_ESCCA
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#warning "Missing logic"
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#endif
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#ifdef CONFIG_Z180_ESCCB
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#warning "Missing logic"
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#endif
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/* Configure the console for immediate usage */
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#if defined(HAVE_SCC_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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#warning "Missing logic"
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#endif /* HAVE_SCC_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
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}
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#endif
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/****************************************************************************
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* Name: z180_putc
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@@ -83,20 +83,6 @@
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: z180_uart_setbaud
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*
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* Description:
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*
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****************************************************************************/
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#if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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static void z180_uart_setbaud(void)
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{
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#warning "Missing logic"
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}
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#endif /* HAVE_UART_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@@ -105,30 +91,19 @@ static void z180_uart_setbaud(void)
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* Name: z180_uart_lowinit
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*
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* Description:
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* Called early in the boot sequence to initialize the [E]SCC channel(s)
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* Called early in the boot sequence to initialize the uart console
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* channel (only).
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*
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****************************************************************************/
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#ifdef USE_LOWSERIALINIT
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void z180_uart_lowinit(void)
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{
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#warning "Missing logic"
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/* Configure for usage of {E]SCC channels (whether or not we have a console) */
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#ifdef CONFIG_Z180_UART0
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#ifdef HAVE_UART_CONSOLE
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#warning "Missing logic"
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#endif
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#ifdef CONFIG_Z180_UART1
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#warning "Missing logic"
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#endif
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/* Configure the console for immediate usage */
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#if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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#warning "Missing logic"
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#endif /* HAVE_UART0_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
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}
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#endif
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/****************************************************************************
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* Name: z180_putc
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@@ -57,11 +57,12 @@
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* Name: z180_uart_lowinit
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*
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* Description:
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* Called early in the boot sequence to initialize the UART(s)
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* Called early in the boot sequence to initialize the uart console
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* channel (only).
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*
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****************************************************************************/
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#ifdef HAVE_UART
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#if defined(HAVE_UART) && defined(USE_LOWSERIALINIT)
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void z180_uart_lowinit(void);
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#else
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# define z180_uart_lowinit()
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@@ -71,11 +72,12 @@ void z180_uart_lowinit(void);
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* Name: z180_scc_lowinit
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*
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* Description:
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* Called early in the boot sequence to initialize the [E]SCC channel(s)
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* Called early in the boot sequence to initialize the [E]SCC console
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* channel (only).
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*
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****************************************************************************/
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#ifdef HAVE_SCC
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#if defined(HAVE_SCC) && defined(USE_LOWSERIALINIT)
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void z180_scc_lowinit(void);
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#else
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# define z180_scc_lowinit()
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@@ -0,0 +1,157 @@
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/****************************************************************************
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* arch/z80/src/z180/z180_timerisr.c
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
|
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <debug.h>
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#include <arch/board/board.h>
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#include "clock_internal.h"
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#include "up_internal.h"
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#include "chip.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* "The Z180 contains a two channel 16-bit Programmable Reload Timer. Each
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* PRT channel contains a 16-bit down counter and a 16-bit reload register."
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* Channel 0 is dedicated as the system timer.
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*/
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/* "The PRT input clock for both channels is equal to the system clock
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* divided by 20."
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*/
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#define Z180_PRT_CLOCK (Z180_SYSCLOCK / 20)
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/* The data Register "(TMDR) is decremented once every twenty clocks. When
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* TMDR counts down to 0, it is automatically reloaded with the value
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* contained in the Reload Register (RLDR)."
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*/
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#define A180_PRT0_RELOAD (Z180_PRT_CLOCK / CLK_TCK)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Global Functions
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****************************************************************************/
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/****************************************************************************
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* Function: up_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for various portions
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* of the systems.
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*
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****************************************************************************/
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int up_timerisr(int irq, chipreg_t *regs)
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{
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volatile uint8_t regval;
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|
||||
/* "When TMDR0 decrements to 0, TIF0 is set to 1. This generates an interrupt
|
||||
* request if enabled by TIE0 = 1. TIF0 is reset to 0 when TCR is read and
|
||||
* the higher or lower byte of TMDR0 is read."
|
||||
*/
|
||||
|
||||
regval = inp(Z180_PRT_TCR);
|
||||
regval = inp(Z180_PRT0_DRL);
|
||||
regval = inp(Z180_PRT0_DRH);
|
||||
|
||||
/* Process timer interrupt */
|
||||
|
||||
sched_process_timer();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Function: up_timerinit
|
||||
*
|
||||
* Description:
|
||||
* This function is called during start-up to initialize the timer
|
||||
* interrupt.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_timerinit(void)
|
||||
{
|
||||
uint8_t regval;
|
||||
|
||||
/* Configure PRT0 to interrupt at the requested rate */
|
||||
/* First stop PRT0 and disable interrupts */
|
||||
|
||||
regval = inp(Z180_PRT_TCR);
|
||||
regval &= (PRT_TCR_TIF0|PRT_TCR_TIE0|PRT_TCR_TDE0);
|
||||
outp(Z180_PRT_TCR, regval);
|
||||
|
||||
/* Set the timer reload value so that the timer will interrupt at the
|
||||
* desired frequency. "For writing, the TMDR down counting must be
|
||||
* inhibited using the TDE (Timer Down Count Enable) bits in the TCR
|
||||
* (Timer Control Register). Then, any or both higher and lower bytes of
|
||||
* TMDR can be freely written (and read) in any order."
|
||||
*/
|
||||
|
||||
outp(Z180_PRT0_RLDRL, (A180_PRT0_RELOAD & 0xff));
|
||||
outp(Z180_PRT0_RLDRH, (A180_PRT0_RELOAD >> 8));
|
||||
|
||||
/* Enable down-counting */
|
||||
|
||||
regval |= PRT_TCR_TDE0;
|
||||
outp(Z180_PRT_TCR, regval);
|
||||
|
||||
/* Attach the timer interrupt vector */
|
||||
|
||||
(void)irq_attach(Z180_PRT0, (xcpt_t)up_timerisr);
|
||||
|
||||
/* And enable the timer interrupt */
|
||||
|
||||
regval |= PRT_TCR_TIE0;
|
||||
outp(Z180_PRT_TCR, regval);
|
||||
}
|
||||
Reference in New Issue
Block a user