fix(mpl3115a2): correct timestamp_sample to integration midpoint

The MPL3115A2 ADC conversion at OSR 2 (ratio 4) takes ~18ms. The
driver polls until the conversion completes, so the read time is at
the end of the integration window. Correct timestamp_sample to the
midpoint by subtracting CONVERSION_TIME / 2.
This commit is contained in:
Jacob Dahl 2026-03-31 14:49:27 -08:00 committed by Jacob Dahl
parent 4b6cd37a23
commit a09c76d30d
2 changed files with 11 additions and 1 deletions

View File

@ -50,6 +50,7 @@
#define MPL3115A2_CONVERSION_INTERVAL 10000 /* microseconds */
#define MPL3115A2_OSR 2 /* Over Sample rate of 4 18MS Minimum time between data samples */
#define MPL3115A2_CONVERSION_TIME 18000 /* ADC conversion time at OSR 2 (ratio 4), microseconds */
#define MPL3115A2_CTRL_TRIGGER (CTRL_REG1_OST | CTRL_REG1_OS(MPL3115A2_OSR))
MPL3115A2::MPL3115A2(const I2CSPIDriverConfig &config) :
@ -200,6 +201,8 @@ int MPL3115A2::measure()
perf_count(_comms_errors);
}
_measure_start_time = hrt_absolute_time();
perf_end(_measure_perf);
return PX4_OK;
@ -228,7 +231,12 @@ int MPL3115A2::collect()
*/
uint8_t b[3 + 2] {};
uint8_t reg = OUT_P_MSB;
const hrt_abstime timestamp_sample = hrt_absolute_time();
/* Correct for measurement integration delay: the conversion was
* started in measure(), so the effective sample midpoint is half the
* conversion time after the start. Using the stored start time avoids
* jitter from the polling interval. */
const hrt_abstime timestamp_sample = _measure_start_time + MPL3115A2_CONVERSION_TIME / 2;
ret = transfer(&reg, 1, &b[0], sizeof(b));
if (ret == -EIO) {

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@ -81,6 +81,8 @@ private:
bool _collect_phase{false};
hrt_abstime _measure_start_time{0};
perf_counter_t _sample_perf;
perf_counter_t _measure_perf;
perf_counter_t _comms_errors;