diff --git a/boards/nxp/imxrt1170-evk/src/board_config.h b/boards/nxp/imxrt1170-evk/src/board_config.h index da5ff40056..79e129f5c3 100644 --- a/boards/nxp/imxrt1170-evk/src/board_config.h +++ b/boards/nxp/imxrt1170-evk/src/board_config.h @@ -272,7 +272,8 @@ /* PWM */ -#define DIRECT_PWM_OUTPUT_CHANNELS 8 +#define DIRECT_PWM_OUTPUT_CHANNELS 12 +#define BOARD_NUM_IO_TIMERS 12 // Input Capture not supported on MVP @@ -534,7 +535,7 @@ extern void imxrt_usbinitialize(void); extern void board_peripheral_reset(int ms); -extern void fmurt1062_timer_initialize(void); +extern void fmurt107x_timer_initialize(void); #include diff --git a/boards/nxp/imxrt1170-evk/src/init.c b/boards/nxp/imxrt1170-evk/src/init.c index de214e9806..1c7d851702 100644 --- a/boards/nxp/imxrt1170-evk/src/init.c +++ b/boards/nxp/imxrt1170-evk/src/init.c @@ -219,7 +219,7 @@ __EXPORT void imxrt_boardinitialize(void) imxrt_usb_initialize(); - fmurt1062_timer_initialize(); + fmurt107x_timer_initialize(); } diff --git a/boards/nxp/imxrt1170-evk/src/timer_config.cpp b/boards/nxp/imxrt1170-evk/src/timer_config.cpp index c6583729b7..b132f1028e 100644 --- a/boards/nxp/imxrt1170-evk/src/timer_config.cpp +++ b/boards/nxp/imxrt1170-evk/src/timer_config.cpp @@ -58,7 +58,7 @@ /* QTimer3 register accessors */ -#define REG(_reg) _REG(IMXRT_QTIMER3_BASE + IMXRT_TMR_OFFSET(IMXRT_TMR_CH0,(_reg))) +#define REG(_reg) _REG(IMXRT_TMR3_BASE + IMXRT_TMR_OFFSET(IMXRT_TMR_CH0,(_reg))) #define rCOMP1 REG(IMXRT_TMR_COMP1_OFFSET) #define rCOMP2 REG(IMXRT_TMR_COMP2_OFFSET) @@ -75,23 +75,52 @@ #define rDMA REG(IMXRT_TMR_DMA_OFFSET) #define rENBL REG(IMXRT_TMR_ENBL_OFFSET) + +// GPIO_EMC_B1_23 FMU_CH1 FLEXPWM1_PWM0_A +// GPIO_EMC_B1_25 FMU_CH2 FLEXPWM1_PWM1_A + FLEXIO1_IO25 +// GPIO_EMC_B1_27 FMU_CH3 FLEXPWM1_PWM2_A + FLEXIO1_IO27 +// GPIO_EMC_B1_06 FMU_CH4 FLEXPWM2_PWM0_A + FLEXIO1_IO06 +// GPIO_EMC_B1_08 FMU_CH5 FLEXPWM2_PWM1_A + FLEXIO1_IO08 +// GPIO_EMC_B1_10 FMU_CH6 FLEXPWM2_PWM2_A + FLEXIO1_IO10 +// GPIO_EMC_B1_19 FMU_CH7 FLEXPWM2_PWM3_A + FLEXIO1_IO19 +// GPIO_EMC_B1_29 FMU_CH8 FLEXPWM3_PWM0_A + FLEXIO1_IO29 +// GPIO_EMC_B1_31 FMU_CH9 FLEXPWM3_PWM1_A + FLEXIO1_IO31 +// GPIO_EMC_B1_21 FMU_CH10 FLEXPWM3_PWM3_A + FLEXIO1_IO21 +// GPIO_EMC_B1_00 FMU_CH11 FLEXPWM4_PWM0_A + FLEXIO1_IO00 +// GPIO_EMC_B1_02 FMU_CH12 FLEXPWM4_PWM1_A + FLEXIO1_IO02 + + constexpr io_timers_t io_timers[MAX_IO_TIMERS] = { - initIOPWM(PWM::FlexPWM2), - initIOPWM(PWM::FlexPWM3), - initIOPWM(PWM::FlexPWM4), + initIOPWM(PWM::FlexPWM1, PWM::Submodule0), + initIOPWM(PWM::FlexPWM1, PWM::Submodule1), + initIOPWM(PWM::FlexPWM1, PWM::Submodule2), + initIOPWM(PWM::FlexPWM2, PWM::Submodule0), + initIOPWM(PWM::FlexPWM2, PWM::Submodule1), + initIOPWM(PWM::FlexPWM2, PWM::Submodule2), + initIOPWM(PWM::FlexPWM2, PWM::Submodule3), + initIOPWM(PWM::FlexPWM3, PWM::Submodule0), + initIOPWM(PWM::FlexPWM3, PWM::Submodule1), + initIOPWM(PWM::FlexPWM3, PWM::Submodule3), + initIOPWM(PWM::FlexPWM4, PWM::Submodule0), + initIOPWM(PWM::FlexPWM4, PWM::Submodule1), }; constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { - initIOTimerChannel(io_timers, {PWM::PWM2_PWM_X, PWM::Submodule0}, IOMUX::Pad::GPIO_AD_10), - initIOTimerChannel(io_timers, {PWM::PWM2_PWM_X, PWM::Submodule1}, IOMUX::Pad::GPIO_AD_11), - initIOTimerChannel(io_timers, {PWM::PWM2_PWM_X, PWM::Submodule2}, IOMUX::Pad::GPIO_AD_12), - initIOTimerChannel(io_timers, {PWM::PWM2_PWM_X, PWM::Submodule3}, IOMUX::Pad::GPIO_AD_13), - initIOTimerChannel(io_timers, {PWM::PWM3_PWM_X, PWM::Submodule0}, IOMUX::Pad::GPIO_AD_14), - initIOTimerChannel(io_timers, {PWM::PWM3_PWM_X, PWM::Submodule3}, IOMUX::Pad::GPIO_AD_17), - initIOTimerChannel(io_timers, {PWM::PWM4_PWM_X, PWM::Submodule2}, IOMUX::Pad::GPIO_AD_20), - initIOTimerChannel(io_timers, {PWM::PWM4_PWM_X, PWM::Submodule3}, IOMUX::Pad::GPIO_AD_21), + /* FMU_CH1 */ initIOTimerChannel(io_timers, {PWM::PWM1_PWM_A, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_B1_23), + /* FMU_CH2 */ initIOTimerChannel(io_timers, {PWM::PWM1_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_B1_25), + /* FMU_CH3 */ initIOTimerChannel(io_timers, {PWM::PWM1_PWM_A, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_B1_27), + /* FMU_CH4 */ initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_B1_06), + /* FMU_CH5 */ initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_B1_08), + /* FMU_CH6 */ initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule2}, IOMUX::Pad::GPIO_EMC_B1_10), + /* FMU_CH7 */ initIOTimerChannel(io_timers, {PWM::PWM2_PWM_A, PWM::Submodule3}, IOMUX::Pad::GPIO_EMC_B1_19), + /* FMU_CH8 */ initIOTimerChannel(io_timers, {PWM::PWM3_PWM_A, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_B1_29), + /* FMU_CH9 */ initIOTimerChannel(io_timers, {PWM::PWM3_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_B1_31), + /* FMU_CH10 */ initIOTimerChannel(io_timers, {PWM::PWM3_PWM_A, PWM::Submodule3}, IOMUX::Pad::GPIO_EMC_B1_21), + /* FMU_CH11 */ initIOTimerChannel(io_timers, {PWM::PWM4_PWM_A, PWM::Submodule0}, IOMUX::Pad::GPIO_EMC_B1_00), + /* FMU_CH12 */ initIOTimerChannel(io_timers, {PWM::PWM4_PWM_A, PWM::Submodule1}, IOMUX::Pad::GPIO_EMC_B1_02), }; + constexpr io_timers_channel_mapping_t io_timers_channel_mapping = initIOTimerChannelMapping(io_timers, timer_io_channels); @@ -102,17 +131,16 @@ constexpr timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = { }; -void fmurt1062_timer_initialize(void) +void fmurt107x_timer_initialize(void) { /* We must configure Qtimer 3 as the IPG divide by to yield 16 Mhz - * and deliver that clock to the eFlexPWM234 via XBAR + * and deliver that clock to the eFlexPWM1,2,34 via XBAR * * IPG = 144 Mhz * 16Mhz = 144 / 9 * COMP 1 = 5, COMP2 = 4 * * */ -#if 0 /* Enable Block Clocks for Qtimer and XBAR1 */ imxrt_clockall_timer3(); @@ -143,8 +171,9 @@ void fmurt1062_timer_initialize(void) */ rCTRL = (TMR_CTRL_CM_MODE1 | TMR_CTRL_PCS_DIV1 | TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE_TOG_ALT); - /* QTIMER3_TIMER0 -> Flexpwm234ExtClk */ + /* QTIMER3_TIMER0 -> Flexpwm1,2,34ExtClk */ - imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM234_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT); -#endif + imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM1_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT); + imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM2_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT); + imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM34_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT); }