From 9a0fbe5623077030435d8632192c49e92dec04b2 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 7 Apr 2017 13:47:12 -1000 Subject: [PATCH] Inital commit of nxphlite-v3 per v3 schematic --- nuttx-configs/nxphlite-v3/Kconfig | 28 ++ nuttx-configs/nxphlite-v3/include/board.h | 272 +++++++++---- src/drivers/boards/nxphlite-v3/CMakeLists.txt | 1 - src/drivers/boards/nxphlite-v3/board_config.h | 356 ++++++++++-------- .../boards/nxphlite-v3/nxphlite_automount.c | 12 +- .../boards/nxphlite-v3/nxphlite_bringup.c | 123 ------ .../boards/nxphlite-v3/nxphlite_init.c | 116 +++++- .../boards/nxphlite-v3/nxphlite_sdhc.c | 38 +- src/drivers/boards/nxphlite-v3/nxphlite_spi.c | 116 ++++-- src/drivers/boards/nxphlite-v3/nxphlite_usb.c | 8 + 10 files changed, 639 insertions(+), 431 deletions(-) delete mode 100644 src/drivers/boards/nxphlite-v3/nxphlite_bringup.c diff --git a/nuttx-configs/nxphlite-v3/Kconfig b/nuttx-configs/nxphlite-v3/Kconfig index 4d6f855e11..92ae593819 100644 --- a/nuttx-configs/nxphlite-v3/Kconfig +++ b/nuttx-configs/nxphlite-v3/Kconfig @@ -4,6 +4,34 @@ # if ARCH_BOARD_NXPHLITE_V3 +config NXPHLITE_SDHC_AUTOMOUNT + bool "SDHC automounter" + default n + depends on FS_AUTOMOUNTER && KINETIS_SDHC + +if NXPHLITE_SDHC_AUTOMOUNT + +config NXPHLITE_SDHC_AUTOMOUNT_FSTYPE + string "SDHC file system type" + default "vfat" + +config NXPHLITE_SDHC_AUTOMOUNT_BLKDEV + string "SDHC block device" + default "/dev/mmcsd0" + +config NXPHLITE_SDHC_AUTOMOUNT_MOUNTPOINT + string "SDHC mount point" + default "/mnt/sdcard" + +config NXPHLITE_SDHC_AUTOMOUNT_DDELAY + int "SDHC debounce delay (milliseconds)" + default 1000 + +config NXPHLITE_SDHC_AUTOMOUNT_UDELAY + int "SDHC unmount retry delay (milliseconds)" + default 2000 + +endif # NXPHLITE_SDHC_AUTOMOUNT config BOARD_HAS_PROBES bool "Board provides GPIO or other Hardware for signaling to timing analyze." diff --git a/nuttx-configs/nxphlite-v3/include/board.h b/nuttx-configs/nxphlite-v3/include/board.h index 30f5166af5..41b45a0edd 100644 --- a/nuttx-configs/nxphlite-v3/include/board.h +++ b/nuttx-configs/nxphlite-v3/include/board.h @@ -72,12 +72,12 @@ /* PLL Configuration. Either the external clock or crystal frequency is used to * select the PRDIV value. Only reference clock frequencies are supported that will - * produce a KINETIS_MCG_PLL_REF_MIN >= PLLIN <=KINETIS_MCG_PLL_REF_MAX + * produce a KINETIS_MCG_PLL_REF_MIN=8MHz >= PLLIN <=KINETIS_MCG_PLL_REF_MAX=16Mhz * reference clock to the PLL. * * PLL Input frequency: PLLIN = REFCLK / PRDIV = 16 MHz / 2 = 8Mhz MHz * PLL Output frequency: PLLOUT = PLLIN * VDIV = 8 MHz * 42 = 336 MHz - * MCG Frequency: PLLOUT = 168 Mhz = 336 MHz / KINETIS_MCG_PLL_INTERNAL_DIVBY + * MCG Frequency: PLLOUT = 168 Mhz = 336 MHz / KINETIS_MCG_PLL_INTERNAL_DIVBY=2 * * PRDIV register value is the divider minus KINETIS_MCG_C5_PRDIV_BASE. * VDIV register value is offset by KINETIS_MCG_C6_VDIV_BASE. @@ -154,12 +154,20 @@ * SDCLK frequency = (base clock) / (prescaler * divisor) * * The SDHC module is always configure configured so that the core clock is the base - * clock. Possible values for presscaler and divisor are: + * clock. Possible values for prescaler and divisor are: * * SDCLKFS: {2, 4, 8, 16, 32, 63, 128, 256} * DVS: {1..16} */ +/* SDHC pull-up resistors **********************************************************/ + +/* There are no external pull-ups on the NXPhlite + * So enable them. + */ + +#define BOARD_SDHC_ENABLE_PULLUPS 1 + /* Identification mode: Optimal 400KHz, Actual 168Mhz / (32 * 14) = 375 KHz */ #define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV32 @@ -187,6 +195,7 @@ # define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(5) #endif + /* LED definitions ******************************************************************/ /* The NXPHlite-v3 has a separate Red, Green and Blue LEDs driven by the K66 as * follows: @@ -240,24 +249,54 @@ */ /* CAN + * Signal Conn Port Pin Name + * ------- -------- ----- ----- -------- + * CAN0TX P8-2(H) PTB18 97 CAN0_TX + * CAN0RX P8-3(L) PTB19 98 CAN0_RX + * CAN1TX P19-2(H) PTC16 123 CAN1_TX + * CAN1RX P19-3(L) PTC17 124 CAN1_RX * */ #define PIN_CAN0_RX PIN_CAN0_RX_2 #define PIN_CAN0_TX PIN_CAN0_TX_2 +#define PIN_CAN1_RX PIN_CAN1_RX_2 +#define PIN_CAN1_TX PIN_CAN1_TX_2 /* 12C * */ -/* I2C0 MPL3115A2 Pressure Sensor */ +/* I2C0 + * + * This device can be pinned out to be either or -#define PIN_I2C0_SCL PIN_I2C0_SCL_4 /* PTE24 P_SCL */ -#define PIN_I2C0_SDA PIN_I2C0_SDA_4 /* PTE25 P_SDA */ + * Bit Pin Device Signal Usage Conn + * ----- --- ------- --------------------------- ------ + * PTB2 83 I2C0_SCL U_ECH Ultrasonic P13-3 + * PTB3 84 I2C0_SDA U_TRI Ultrasonic P13-2 + * ----- --- ------- --------------------------- ------ + * + * Bit Pin Device Signal Usage Conn + * ----- --- ------- --------------------------- ------ + * PTE24 45 I2C0_SCL IIC_SCL NFC Connector, IIC P2-2 + * PTE25 46 I2C0_SDA IIC_SDA NFC Connector, IIC P2-3 + * ----- --- ------- --------------------------- ------ + */ -/* I2C1 NFC Connector */ +#define PIN_I2C0_SCL PIN_I2C0_SCL_4 /* PTE24 IIC_SCL */ +#define PIN_I2C0_SDA PIN_I2C0_SDA_4 /* PTE25 IIC_SDA */ -#define PIN_I2C1_SCL PIN_I2C1_SCL_1 /* PTC10 NFC_SCL P2-2 */ -#define PIN_I2C1_SDA PIN_I2C1_SDA_1 /* PTC11 NFC_SDA P2-3 */ +/* I2C1 + * + * Bit Pin Device Signal Usage Conn + * ----- --- ------- -------------- ------------- ------ + * PTC10 115 I2C1_SCL P_SCL, GPS_SCL Pressure, GPS P3-4 + * PTC11 116 I2C1_SDA P_SDA, GPS_SDA Pressure, GPS P3-5 + * ----- --- ------- -------------- ------------- ------ + */ + +#define PIN_I2C1_SCL PIN_I2C1_SCL_1 /* PTC10 GPS / Pressure Sensor*/ +#define PIN_I2C1_SDA PIN_I2C1_SDA_1 /* PTC11 GPS / Pressure Sensor */ /* PWM @@ -266,90 +305,83 @@ /* PWM Channels */ -#define GPIO_FTM3_CH0OUT PIN_FTM3_CH0_2 /* PTE5 PWM1 P4-34 */ -#define GPIO_FTM3_CH1OUT PIN_FTM3_CH1_2 /* PTE6 PWM2 P4-31 */ -#define GPIO_FTM3_CH2OUT PIN_FTM3_CH2_2 /* PTE7 PWM3 P4-28 */ -#define GPIO_FTM3_CH3OUT PIN_FTM3_CH3_2 /* PTE8 PWM4 P4-25 */ -#define GPIO_FTM3_CH4OUT PIN_FTM3_CH4_2 /* PTE9 PWM5 P4-22 */ -#define GPIO_FTM3_CH5OUT PIN_FTM3_CH5_2 /* PTE10 PWM6 P4-29 */ -#define GPIO_FTM3_CH6OUT PIN_FTM3_CH6_2 /* PTE11 PWM7 P4-26 */ -#define GPIO_FTM3_CH7OUT PIN_FTM3_CH7_2 /* PTE12 PWM8 P4-13 */ +#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_2 /* PTC1 FMU_CH1 P4-34 */ +#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1 /* PTA6 FMU_CH2 P4-41 */ +#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_3 /* PTD4 FMU_CH3 P4-35 */ +#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_3 /* PTD5 FMU_CH4 P4-32 */ +#define GPIO_FTM0_CH6OUT PIN_FTM0_CH6_2 /* PTD6 FMU_CH5 P4-29 */ +#define GPIO_FTM0_CH7OUT PIN_FTM0_CH7_2 /* PTD7 FMU_CH6 P4-26 */ -#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_3 /* PTD4 PWM0 P4-46 */ -#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_3 /* PTD5 PWM10 P4-43 */ -#define GPIO_FTM0_CH6OUT PIN_FTM0_CH6_2 /* PTD6 PWM11 P4-40 */ -#define GPIO_FTM0_CH7OUT PIN_FTM0_CH7_2 /* PTD7 PWM12 P4-37 */ +#define GPIO_FTM3_CH0OUT PIN_FTM3_CH0_1 /* PTD0 IO_CH1 P4-23 */ +#define GPIO_FTM3_CH1OUT PIN_FTM3_CH1_2 /* PTE6 IO_CH2 P4-20 */ +#define GPIO_FTM3_CH2OUT PIN_FTM3_CH2_2 /* PTE7 IO_CH3 P4-17 */ +#define GPIO_FTM3_CH3OUT PIN_FTM3_CH3_2 /* PTE8 IO_CH4 P4-14 */ +#define GPIO_FTM3_CH4OUT PIN_FTM3_CH4_2 /* PTE9 IO_CH5 P4-11 */ +#define GPIO_FTM3_CH5OUT PIN_FTM3_CH5_2 /* PTE10 IO_CH6 P4-8 */ +#define GPIO_FTM3_CH6OUT PIN_FTM3_CH6_2 /* PTE11 IO_CH7 P4-5 */ +#define GPIO_FTM3_CH7OUT PIN_FTM3_CH7_2 /* PTE12 IO_CH8 P4-2 */ -#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1 /* PTA6 PWM13 P4-7 */ -#define GPIO_FTM0_CH2OUT PIN_FTM0_CH2_2 /* PTC3 PWM14 P4-10 */ +//todo:This is a Guess on timer utilization -//todo:This is a Guess on timer utilisation -#define GPIO_FTM3_CH0IN PIN_FTM3_CH0_2 /* PTE5 PWM1 P4-34 */ -#define GPIO_FTM3_CH1IN PIN_FTM3_CH1_2 /* PTE6 PWM2 P4-31 */ -#define GPIO_FTM3_CH2IN PIN_FTM3_CH2_2 /* PTE7 PWM3 P4-28 */ -#define GPIO_FTM3_CH3IN PIN_FTM3_CH3_2 /* PTE8 PWM4 P4-25 */ -#define GPIO_FTM3_CH4IN PIN_FTM3_CH4_2 /* PTE9 PWM5 P4-22 */ -#define GPIO_FTM3_CH5IN PIN_FTM3_CH5_2 /* PTE10 PWM6 P4-29 */ -#define GPIO_FTM3_CH6IN PIN_FTM3_CH6_2 /* PTE11 PWM7 P4-26 */ -#define GPIO_FTM3_CH7IN PIN_FTM3_CH7_2 /* PTE12 PWM8 P4-13 */ +#define GPIO_FTM0_CH0IN PIN_FTM0_CH0_2 /* PTC1 FMU_CH1 P4-34 */ +#define GPIO_FTM0_CH3IN PIN_FTM0_CH3_1 /* PTA6 FMU_CH2 P4-41 */ +#define GPIO_FTM0_CH4IN PIN_FTM0_CH4_3 /* PTD4 FMU_CH3 P4-35 */ +#define GPIO_FTM0_CH5IN PIN_FTM0_CH5_3 /* PTD5 FMU_CH4 P4-32 */ +#define GPIO_FTM0_CH6IN PIN_FTM0_CH6_2 /* PTD6 FMU_CH5 P4-29 */ +#define GPIO_FTM0_CH7IN PIN_FTM0_CH7_2 /* PTD7 FMU_CH6 P4-26 */ -#define GPIO_FTM0_CH4IN PIN_FTM0_CH4_3 /* PTD4 PWM0 P4-46 */ -#define GPIO_FTM0_CH5IN PIN_FTM0_CH5_3 /* PTD5 PWM10 P4-43 */ -#define GPIO_FTM0_CH6IN PIN_FTM0_CH6_2 /* PTD6 PWM11 P4-40 */ -#define GPIO_FTM0_CH7IN PIN_FTM0_CH7_2 /* PTD7 PWM12 P4-37 */ +#define GPIO_FTM3_CH0IN PIN_FTM3_CH0_1 /* PTD0 IO_CH1 P4-23 */ +#define GPIO_FTM3_CH1IN PIN_FTM3_CH1_2 /* PTE6 IO_CH2 P4-20 */ +#define GPIO_FTM3_CH2IN PIN_FTM3_CH2_2 /* PTE7 IO_CH3 P4-17 */ +#define GPIO_FTM3_CH3IN PIN_FTM3_CH3_2 /* PTE8 IO_CH4 P4-14 */ +#define GPIO_FTM3_CH4IN PIN_FTM3_CH4_2 /* PTE9 IO_CH5 P4-11 */ +#define GPIO_FTM3_CH5IN PIN_FTM3_CH5_2 /* PTE10 IO_CH6 P4-8 */ +#define GPIO_FTM3_CH6IN PIN_FTM3_CH6_2 /* PTE11 IO_CH7 P4-5 */ +#define GPIO_FTM3_CH7IN PIN_FTM3_CH7_2 /* PTE12 IO_CH8 P4-2 */ -#define GPIO_FTM0_CH3IN PIN_FTM0_CH3_1 /* PTA6 PWM13 P4-7 */ -#define GPIO_FTM0_CH2IN PIN_FTM0_CH2_2 /* PTC3 PWM14 P4-10 */ /* SPI * */ -/* SPI0 SD Card */ +/* SPI0 FRAM */ -#define PIN_SPI0_PCS0 PIN_SPI0_PCS0_2 /* PTC4 SPI_CS SD1-2 */ -#define PIN_SPI0_SCK PIN_SPI0_SCK_2 /* PTC5 SPI_CLK SD1-5 */ -#define PIN_SPI0_OUT PIN_SPI0_SOUT_2 /* PTC6 SPI_OUT SD1-3 */ -#define PIN_SPI0_SIN PIN_SPI0_SIN_2 /* PTC7 SPI_IN SD1-5 */ +#define PIN_SPI0_PCS0 PIN_SPI0_PCS2_1 /* PTC2 SPI_CS FRAM_CS */ +#define PIN_SPI0_SCK PIN_SPI0_SCK_2 /* PTC5 SPI_CLK FRAM_SCK */ +#define PIN_SPI0_OUT PIN_SPI0_SOUT_2 /* PTC6 SPI_OUT FRAM_MOSI */ +#define PIN_SPI0_SIN PIN_SPI0_SIN_2 /* PTC7 SPI_IN FRAM_MISO */ -/* SPI1 FXOS8700CQ Accelerometer */ +/* SPI1 + * FXOS8700CQ Accelerometer + * FXAS21002CQ Gyroscope + */ #define PIN_SPI1_PCS0 PIN_SPI1_PCS0_1 /* PTB10 A_CS */ +#define PIN_SPI1_PCS1 PIN_SPI1_PCS1_1 /* PTB9 GM_CS */ #define PIN_SPI1_SCK PIN_SPI1_SCK_1 /* PTB11 A_SCLK */ #define PIN_SPI1_OUT PIN_SPI1_SOUT_1 /* PTB16 A_MOSI */ #define PIN_SPI1_SIN PIN_SPI1_SIN_1 /* PTB17 A_MISO */ -/* SPI2 FXAS21002CQ Gyroscope */ +/* SPI2 + * Bit Pin Device Signal Conn + * ----- --- ------- --------- ------ + * PTB20 99 SPI2_PCS0 SPI2_CS P18-5 + * PTB21 100 SPI2_SCK SPI2_CLK P18-2 + * PTB22 101 SPI2_SOUT SPI2_OUT P18-3 + * PTB23 102 SPI2_SIN SPI2_IN P18-4 + * + */ -#define PIN_SPI2_PCS0 PIN_SPI2_PCS0_1 /* PTB20 GM_CS */ -#define PIN_SPI2_SCK PIN_SPI2_SCK_1 /* PTB21 GM_SCLK */ -#define PIN_SPI2_OUT PIN_SPI2_SOUT_1 /* PTB22 GM_MOSI */ -#define PIN_SPI2_SIN PIN_SPI2_SIN_1 /* PTB23 GM_MISO */ +#define PIN_SPI2_PCS0 PIN_SPI2_PCS0_1 /* PTB20 SPI2_CS */ +#define PIN_SPI2_SCK PIN_SPI2_SCK_1 /* PTB21 SPI2_CLK */ +#define PIN_SPI2_OUT PIN_SPI2_SOUT_1 /* PTB22 SPI2_OUT */ +#define PIN_SPI2_SIN PIN_SPI2_SIN_1 /* PTB23 SPI2_IN */ /* UART * - * NuttX Will use UART4 as the Console - */ - -#define PIN_UART0_RX PIN_UART0_RX_4 /* PTD6 P4-40 PWM11 */ -#define PIN_UART0_TX PIN_UART0_TX_4 /* PTD7 P4-37 PWM12 */ - -#define PIN_UART1_RX PIN_UART1_RX_2 /* PTE1 UART P14-3 */ -#define PIN_UART1_TX PIN_UART1_TX_2 /* PTE0 UART P14-2 */ - -/* No Alternative pins for UART2 - * PD2 BL P1-5 - * PD3 BL P1-4 - */ - -#define PIN_UART3_RX PIN_UART3_RX_2 /* PTC16 GPS P3-3 */ -#define PIN_UART3_TX PIN_UART3_TX_2 /* PTC17 GPS P3-2 */ - -#define PIN_UART4_RX PIN_UART4_RX_1 /* PTC14 UART P10-3 */ -#define PIN_UART4_TX PIN_UART4_TX_1 /* PTC15 UART P10-2 */ - -/* LPUART + * NuttX Will use LPUART0 as the Console * + * LPUAR0 * P16 Pin Name K66 Name * -------- ------------ ------ --------- * 2 UART_TX PTD9 LPUART0_TX @@ -360,9 +392,107 @@ #define PIN_LPUART0_RX PIN_LPUART0_RX_3 #define PIN_LPUART0_TX PIN_LPUART0_TX_3 -/* UART5 is not connected on V1 +/* UART0 + * + * P7 Pin Name K66 Name + * -------- ------------ ------- --------- + * 2 IR_Transmitter PTA2 UART0_TX + * 4 IR_Receiver PTA1 UART0_RX + * -------- ------------ ------- --------- */ +#define PIN_UART0_RX PIN_UART0_RX_1 +#define PIN_UART0_TX PIN_UART0_TX_1 + +/* UART1 + * + * Pin Name K66 Name + * ------------- -------------- ----- --------- + * P14-3,P15-2 FrSky_IN_RC_IN PTC3 UART1_RX + * P14-2 FrSky_OUT PTC4 UART1_TX + * ------------- ------------ ----- --------- + */ + +#define PIN_UART1_RX PIN_UART1_RX_1 +#define PIN_UART1_TX PIN_UART1_TX_1 + +/* UART2 + * No Alternative pins for UART2 + * + * P7 Pin Name K66 Name + * -------- ------------ ------- --------- + * 2 GPS_TX PTD3 UART2_TX + * 3 GPS_RX PTD2 UART2_RX + * -------- ------------ ------- --------- + */ + +/* UART3 + * + * P10 Pin Name K66 Name + * -------- ------------ ------- --------- + * 2 UART4_TX PTC15 UART4_TX + * 3 UART4_RX PTC14 UART4_RX + * 4 UART4_CTS PTC13 UART4_CTS + * 5 UART4_RTS PTC12 UART4_RTS + * -------- ------------ ------- --------- + */ + +#define PIN_UART4_RX PIN_UART4_RX_1 +#define PIN_UART4_TX PIN_UART4_TX_1 +#define PIN_UART4_RTS PIN_UART4_RTS_1 +#define PIN_UART4_CTS PIN_UART4_CTS_1 + +/* + * Ethernet TJA1100 OPEN Alliance BroadR-Reach PHY for Automotive Ethernet + * ----------------------------------------------------------------------- + * + * -------------- ----------------- ----------------------------------------- + * TJA1100 Board Signal(s) K66F Pin + * Pin Signal Function pinmux Name + * --- ---------- ----------------- ------------------------------------------ + * 1 MDC RMII0_MDC PTB1/RMII0_MDC PIN_RMII0_MDC + * 2 INT RMII0_INT_B, PTA27 PTA27 + * 3 nRST ENET_RST PTA28 PTA28 + * 4 VDDA(1V8) Cap to GND --- --- + * 5 XO 25Mhz OSC --- --- + * 6 XI 25Mhz OSC --- --- + * 7 VDDA(3V3) E_3V3 --- --- + * 8 LED (LED_ENABLE = 1) WAKE (LED_ENABLE = 0) --- + * 8 VBAT E_3V3 --- --- + * 10 nINH ENET_INH PTA8 PTA8 + * 11 VDDA(TX) E_3V3 --- --- + * 12 TRX_P ENET_P --- --- + * 13 TRX_M ENET_P --- --- + * 14 VDDD(3V3) E_3V3 --- --- + * 15 GND --- --- --- + * 16 VDDD(1V8) Cap to GND --- --- + * 17 RXER RMII0_RXER PTA5/RMII0_RXER PIN_RMII0_RXER + * 18 CRS_DIV RMII_CRSDV PTA14/RMII0_CRS_DV PIN_RMII0_CRS_DV + * 19 TXEN RMII0_TXEN PTA15/RMII0_TXEN PIN_RMII0_TXEN + * 20 GND --- --- --- + * 21 CONFIG1 ENET_CON1 THIS PIN IS A NO CONNECT + * 22 CONFIG0 ENET_CONFIG0 PTA24 PTA24 + * 23 RXD1 RMII0_RXD_1 PTA12/RMII0_RXD1 PIN_RMII0_RXD1 + * 24 RXD0 RMII0_RXD_0 PTA13/RMII0_RXD0 PIN_RMII0_RXD0 + * 25 REF_CLK E_REF_CLK PTE26/ENET_1588_CLKIN PIN_ENET_1588_CLKIN + * 26 GND2 --- --- --- + * 27 VDD(IO) E_3V3 --- --- + * 28 TXC --- --- --- + * 29 TXEN RMII_TXEN PTA15/RMII0_TXEN PIN_RMII0_TXEN + * 30 TXD3 + * 31 TXD2 + * 32 TXD1 RMII0_TXD_1 PTA17/RMII0_TXD1 PIN_RMII0_TXD1 + * 33 TXD0 RMII0_TXD_0 PTA16/RMII0_TXD0 PIN_RMII0_TXD0 + * 34 TXER + * 35 EN ENET_EN PTA29 PTA29 + * 36 MDIO RMII0_MDIO PTB0/RMII0_MDIO PIN_RMII0_MDIO + * --- ---------- ----------------- ------------------------------------ + * + */ + +#define PIN_RMII0_MDIO PIN_RMII0_MDIO_1 +#define PIN_RMII0_MDC PIN_RMII0_MDC_1 + /************************************************************************************ * Public Data ************************************************************************************/ diff --git a/src/drivers/boards/nxphlite-v3/CMakeLists.txt b/src/drivers/boards/nxphlite-v3/CMakeLists.txt index a7ccc4be02..b53d8cd436 100644 --- a/src/drivers/boards/nxphlite-v3/CMakeLists.txt +++ b/src/drivers/boards/nxphlite-v3/CMakeLists.txt @@ -41,7 +41,6 @@ px4_add_module( ../common/board_dma_alloc.c nxphlite_autoleds.c nxphlite_automount.c - nxphlite_bringup.c nxphlite_can.c nxphlite_init.c nxphlite_led.c diff --git a/src/drivers/boards/nxphlite-v3/board_config.h b/src/drivers/boards/nxphlite-v3/board_config.h index ece33a40d3..601150da8a 100644 --- a/src/drivers/boards/nxphlite-v3/board_config.h +++ b/src/drivers/boards/nxphlite-v3/board_config.h @@ -65,50 +65,75 @@ __BEGIN_DECLS * BLUE CMP0_IN2/ FB_AD7 / I2S0_MCLK/ FTM3_CH4/ ADC1_SE4b/ PTC8 */ -#define GPIO_LED_R (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTD | PIN1) -#define GPIO_LED_G (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN9) -#define GPIO_LED_B (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN8) +#define GPIO_LED_R (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTD | PIN1) +#define GPIO_LED_G (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN9) +#define GPIO_LED_B (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN8) + + +#define GPIO_LED_D9 (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTD | PIN14) +#define GPIO_LED_D10 (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTD | PIN13) + +#define GPIO_NFC_IO (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN26) +#define GPIO_SENSOR_P_EN (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTB | PIN8) + + +/* UART tty Mapping + * Device tty alt Connector Name + * ------- ---------- -------------- --------- ------------------------- + * LPUART0 /dev/tty0 /dev/console P16 DCD-Mini + * UART0 /dev/tty1 --- P7 IR transmitter & receiver + * UART1 /dev/tty2 --- P14,P15 SERIAL4/FrSky, RC_IN + * UART2 /dev/tty3 --- P3 GPS connector + * UART4 /dev/tty4 --- P10 UART (Bluetooth) + */ + +#define GPS_DEFAULT_UART_PORT "/dev/ttyS3" /* UART2 */ /* High-resolution timer */ -#define HRT_TIMER 3 /* use timer 2 for the HRT */ -#define HRT_TIMER_CHANNEL 1 /* use capture/compare channel */ +#define HRT_TIMER 3 /* TBD: use timer 3 for the HRT */ +#define HRT_TIMER_CHANNEL 1 /* TBD: use capture/compare channel */ /* PPM IN - * */ -#define HRT_PPM_CHANNEL 0 /* use capture/compare channel */ -#define GPIO_PPM_IN PIN_FTM2_CH0_1 /* PTA10 220R to P4-1 */ +#define HRT_PPM_CHANNEL 0 /* TBD use capture/compare channel */ +#define GPIO_PPM_IN PIN_FTM0_CH2_2 /* PTC3 USART1 RX or FTM0_CH2 AKA RC_INPUT */ -/* IR transmitter & receiver - * - * Rx could be on UART0 RX - * TX is On PTA24 - * Usage TBD - both left as inputs for now. - * +/* Spektrum controls ******************************************************/ + +/* Power is a p-Channel FET */ + +#define GPIO_SPEKTRUM_P_EN (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN7) +#define POWER_SPEKTRUM(_on_true) px4_arch_gpiowrite(GPIO_SPEKTRUM_P_EN, (!_on_true)) + +/* For binding the Spektrum 3-pin interfaces is used with it TX (output) + * as an input Therefore we drive are UARTx_RX (normaly an input) as an + * output */ -#define GPIO_IR_TRANSMITTER (GPIO_PULLUP | PIN_PORTA | PIN24) -#define GPIO_IR_RRCEIVER (GPIO_PULLUP | PIN_PORTA | PIN21) -/* SBUS Control - * - * SBUS is brought out on P4-4 and controlled buy the following. - * */ +#define GPIO_UART2_RX_AS_OUTPUT (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN3) +#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(PIN_UART2_RX) +#define SPEKTRUM_RX_AS_GPIO() px4_arch_configgpio(GPIO_UART2_RX_AS_OUTPUT) +#define SPEKTRUM_RX_HIGH(_s) px4_arch_gpiowrite(GPIO_UART2_RX_AS_OUTPUT, (_s)) -#define GPIO_SBUS_EN (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN2) -#define GPIO_SBUS_IN /* Not usable 0 needs UART */ (GPIO_PULLUP | PIN_PORTA | PIN8) -#define GPIO_SBUS_OUT /* Not usable 0 needs UART */ (GPIO_INPUT | PIN_PORTA | PIN9) -#define GPIO_RSSI_IN /* Needs s/b on ADC/Timer */ (GPIO_INPUT | PIN_PORTA | PIN25) +/* RC input */ + +#define RC_UXART_BASE KINETIS_UART1_BASE +#define RC_SERIAL_PORT "/dev/ttyS2" /* UART1 */ +#define INVERT_RC_INPUT(_s) board_rc_input(_s); + +#define GPIO_RSSI_IN PIN_ADC1_SE13 /* Ethernet Control * - * Unintalized to Reset Disabled and Inhibited + * Uninitialized to Reset Disabled and Inhibited */ -#define GPIO_E_RST (GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO | PIN_PORTA | PIN28) -#define GPIO_E_EN (GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO | PIN_PORTA | PIN29) -#define GPIO_E_INH (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN2) +#define GPIO_E_RST (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN28) +#define GPIO_E_EN (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN29) +#define GPIO_E_INH (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN8) +#define GPIO_ENET_CONFIG0 (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN24) /* CAN Control @@ -116,41 +141,27 @@ __BEGIN_DECLS * high-speed mode (Low) or silent mode (high) */ -#define GPIO_CAN0_STB (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN4) +#define GPIO_CAN0_STB (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN19) +#define GPIO_CAN1_STB (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN18) -/* URF Connector - * TBD +/* P13 Ultrasonic Sensors + * This is used as IIC ad booted with theses as inputs */ -#define GPIO_ECH (GPIO_PULLUP | PIN_PORTC | PIN8) -#define GPIO_TRI (GPIO_PULLUP | PIN_PORTC | PIN9) - -/* GPIO on UART P10 - * TBD - */ - -#define GPIO_PTD11 (GPIO_PULLUP | PIN_PORTD | PIN11) -#define GPIO_PTD12 (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTD | PIN11) - -/* GPIO on UART P14 - * TBD - */ - -#define GPIO_PTD15 (GPIO_PULLUP | PIN_PORTD | PIN15) -#define GPIO_PTE4 (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN4) +#define GPIO_ECH (GPIO_PULLUP | PIN_PORTB | PIN2) +#define GPIO_TRI (GPIO_PULLUP | PIN_PORTB | PIN3) /* Safety Switch * TBD */ -#define GPIO_LED_SAFETY (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTD | PIN13) -#define GPIO_BTN_SAFETY (GPIO_PULLUP | PIN_PORTD | PIN14) +#define GPIO_LED_SAFETY (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN27) +#define GPIO_BTN_SAFETY (GPIO_PULLUP | PIN_PORTE | PIN28) /* NXPHlite-v3 GPIOs ****************************************************************/ -/* SDIO +/* SDHC * - * NOT IN Current HW t uses SPI * A micro Secure Digital (SD) card slot is available on the board connected to * the SD Host Controller (SDHC) signals of the MCU. This slot will accept micro * format SD memory cards. The SD card detect pin (PTE6) is an open switch that @@ -159,17 +170,18 @@ __BEGIN_DECLS * ------------ ------------- -------- * SD Card Slot Board Signal K66 Pin * ------------ ------------- -------- - * DAT0 SDHC0_D0 PTE0 - * DAT1 SDHC0_D1 PTE1 + * DAT0 SDHC0_D0 PTE1 + * DAT1 SDHC0_D1 PTE0 * DAT2 SDHC0_D2 PTE5 * CD/DAT3 SDHC0_D3 PTE4 * CMD SDHC0_CMD PTE3 * CLK SDHC0_DCLK PTE2 - * SWITCH D_CARD_DETECT PTE6 + * SWITCH D_CARD_DETECT PTD10 * ------------ ------------- -------- * - * There is no Write Protect pin available to the K66 Or Card detect. + * There is no Write Protect pin available to the K66 */ +#define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTD | PIN10) /* SPI * @@ -180,65 +192,74 @@ __BEGIN_DECLS /* SPI Bus assignments */ -#define PX4_SPI_BUS_SDCARD 0 -#define PX4_SPI_BUS_ACCEL_MAG 1 -#define PX4_SPI_BUS_GYRO 2 +#define PX4_SPI_BUS_MEMORY 0 +#define PX4_SPI_BUS_SENSORS 1 +#define PX4_SPI_BUS_EXTERNAL 2 +#define PX4_SPI_BUS_RAMTRON PX4_SPI_BUS_MEMORY +#define PX4_SPI_BUS_EXT PX4_SPI_BUS_EXTERNAL /* SPI chip selects */ -#define GPIO_SPI_CS_FXAS21002CQ_GYRO (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN20) +#define GPIO_SPI_CS_MEMORY (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN2) +#define GPIO_SPI_CS_FXAS21002CQ_GYRO (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN9) #define GPIO_SPI_CS_FXOS8700CQ_ACCEL_MAG (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN10) -#define GPIO_SPI_CS_SDCARD (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN4) +#define GPIO_SPI2_CS (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN20) +#define GPIO_SPI2_EXT (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTD | PIN15) /* SPI device reset signals * In Inactive state */ -#define GPIO_GM_RST (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTC | PIN0) -#define GPIO_A_RST (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN7) +#define GPIO_GM_nRST (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTD | PIN12) +#define GPIO_A_RST (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN25) /* Sensor interrupts */ -#define GPIO_EXTI_GYRO_INT1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTC | PIN1) -#define GPIO_EXTI_GYRO_INT2 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTC | PIN2) -#define GPIO_EXTI_ACCEL_MAG_INT1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTB | PIN8) -#define GPIO_EXTI_ACCEL_MAG_INT2 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTB | PIN9) -#define GPIO_EXTI_BARO_INT1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN26) -#define GPIO_EXTI_BARO_INT2 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN27) - -#define PX4_MK_SPI_SEL(b,d) ((((b) & 0xf) << 4) + ((d) & 0xf)) -#define PX4_SPI_BUS_ID(bd) (((bd) >> 4) & 0xf) -#define PX4_SPI_DEV_ID(bd) ((bd) & 0xf) +#undef GPIO_EXTI_GYRO_INT1 /* NC */ +#undef GPIO_EXTI_GYRO_INT2 /* NC */ +#undef GPIO_EXTI_ACCEL_MAG_INT1 /* NC */ +#undef GPIO_EXTI_ACCEL_MAG_INT2 /* NC */ +#define GPIO_EXTI_BARO_INT1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTD | PIN11) +#undef GPIO_EXTI_BARO_INT2 /* NC */ /* Use these in place of the spi_dev_e enumeration to select a specific SPI device on SPI1 */ -#define PX4_SPIDEV_SDCARD PX4_MK_SPI_SEL(PX4_SPI_BUS_SDCARD,0) -#define PX4_SDCARD_BUS_CS_GPIO {GPIO_SPI_CS_SDCARD} -#define PX4_SDCARD_BUS_FIRST_CS PX4_SPIDEV_SDCARD -#define PX4_SDCARD_BUS_LAST_CS PX4_SPIDEV_SDCARD +#define PX4_SPIDEV_MEMORY PX4_MK_SPI_SEL(PX4_SPI_BUS_MEMORY,0) +#define PX4_MEMORY_BUS_CS_GPIO {GPIO_SPI_CS_MEMORY} +#define PX4_MEMORY_BUS_FIRST_CS PX4_SPIDEV_MEMORY +#define PX4_MEMORY_BUS_LAST_CS PX4_SPIDEV_MEMORY -#define PX4_SPIDEV_ACCEL_MAG PX4_MK_SPI_SEL(PX4_SPI_BUS_ACCEL_MAG,0) -#define PX4_ACCEL_MAG_BUS_CS_GPIO {GPIO_SPI_CS_FXOS8700CQ_ACCEL_MAG} -#define PX4_ACCEL_MAG_BUS_FIRST_CS PX4_SPIDEV_ACCEL_MAG -#define PX4_ACCEL_MAG_BUS_LAST_CS PX4_SPIDEV_ACCEL_MAG +#define PX4_SPIDEV_ACCEL_MAG PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,0) +#define PX4_SPIDEV_GYRO PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,1) +#define PX4_SENSOR_BUS_CS_GPIO {GPIO_SPI_CS_FXOS8700CQ_ACCEL_MAG, GPIO_SPI_CS_FXAS21002CQ_GYRO} +#define PX4_SENSOR_BUS_FIRST_CS PX4_SPIDEV_ACCEL_MAG +#define PX4_SENSOR_BUS_LAST_CS PX4_SPIDEV_GYRO -#define PX4_SPIDEV_GYRO PX4_MK_SPI_SEL(PX4_SPI_BUS_GYRO,0) -#define PX4_GYRO_BUS_CS_GPIO {GPIO_SPI_CS_FXAS21002CQ_GYRO} -#define PX4_GYRO_BUS_FIRST_CS PX4_SPIDEV_GYRO -#define PX4_GYRO_BUS_LAST_CS PX4_SPIDEV_GYRO +#define PX4_SPIDEV_EXTERNAL1 PX4_MK_SPI_SEL(PX4_SPI_BUS_EXTERNAL,0) +#define PX4_SPIDEV_EXTERNAL2 PX4_MK_SPI_SEL(PX4_SPI_BUS_EXTERNAL,1) +#define PX4_EXTERNAL_BUS_CS_GPIO {GPIO_SPI2_CS, GPIO_SPI2_EXT} +#define PX4_EXTERNAL_BUS_FIRST_CS PX4_SPIDEV_EXTERNAL1 +#define PX4_EXTERNAL_BUS_LAST_CS PX4_SPIDEV_EXTERNAL2 +#define PX4_SPIDEV_ICM_20602 PX4_SPIDEV_EXTERNAL1 +#define PX4_SPIDEV_ICM_20608 PX4_SPIDEV_EXTERNAL1 +#define PX4_SPIDEV_ICM_20689 PX4_SPIDEV_EXTERNAL1 +#define PX4_SPIDEV_EXT_MPU PX4_SPIDEV_EXTERNAL1 +#define PX4_SPIDEV_MPU PX4_SPIDEV_EXTERNAL1 /* I2C busses */ -#define PX4_I2C_BUS_ONBOARD 1 -#define PX4_I2C_BUS_EXPANSION 2 +#define GPIO_P_INT (GPIO_PULLUP | PIN_PORTD | PIN11) -#define PX4_I2C_BUS_LED PX4_I2C_BUS_EXPANSION +#define PX4_I2C_BUS_EXPANSION 0 +#define PX4_I2C_BUS_ONBOARD 1 -#define PX4_I2C_OBDEV_LED 0x55 -#define PX4_I2C_OBDEV_HMC5883 0x1e -#define PX4_I2C_OBDEV_LIS3MDL 0x1e +#define PX4_I2C_BUS_LED PX4_I2C_BUS_EXPANSION + +#define PX4_I2C_OBDEV_LED 0x55 +#define PX4_I2C_OBDEV_HMC5883 0x1e +#define PX4_I2C_OBDEV_LIS3MDL 0x1e /* * ADC channels @@ -247,16 +268,21 @@ __BEGIN_DECLS */ #define ADC_CHANNELS 1 << 0 // TBD -// ADC defines to be used in sensors.cpp to read from a particular channel +/* ADC defines to be used in sensors.cpp to read from a particular channel -// BAT_VSENS ADC1_SE16 or ADC0_SE22 -// BAT_ISENS ADC0_SE16 or ADC0_SE21 -// V5_VSENS ADC1_SE18 - -// AD1 ADC1_SE5a -// AD2 ADC1_SE7a -// AD3 ADC0_SE10 -// AD4 ADC1_SE12 + * PTB4 85 ADC1_SE10 BAT_VSENS + * PTB5 86 ADC1_SE11 BAT_ISENS + * PTB6 87 ADC1_SE12 5V_VSENS + * PTB7 88 ADC1_SE13 RSSI_IN + * 37 ADC1_SE18 AD2 + * 36 ADC0_SE21 USB_VBUS_VALID + * 35 ADC0_SE22 AD1 + * 39 ADC1_SE23 AD3 +*/ +#define GPIO_BAT_VSENS PIN_ADC1_SE10 +#define GPIO_BAT_ISENS PIN_ADC1_SE11 +#define GPIO_5V_VSENS PIN_ADC1_SE12 +#define GPIO_RSSI_IN PIN_ADC1_SE13 #define ADC_BATTERY_VOLTAGE_CHANNEL 22 #define ADC_BATTERY_CURRENT_CHANNEL 21 @@ -265,45 +291,46 @@ __BEGIN_DECLS #define BOARD_BATTERY1_V_DIV (10.177939394f) #define BOARD_BATTERY1_A_PER_V (15.391030303f) + /* User GPIOs * * GPIO- * Define as GPIO input / GPIO outputs and timers IO */ -#define PX4_MK_GPIO(pin_ftmx, io) ((pin_ftmx) & (((uint32_t) ~(_PIN_MODE_MASK | _PIN_OPTIONS_MASK)) | (uint32_t)(io))) +#define PX4_MK_GPIO(pin_ftmx, io) ((((uint32_t)(pin_ftmx)) & ~(_PIN_MODE_MASK | _PIN_OPTIONS_MASK)) |(io)) #define PX4_MK_GPIO_INPUT(pin_ftmx) PX4_MK_GPIO(pin_ftmx, GPIO_PULLUP) #define PX4_MK_GPIO_OUTPUT(pin_ftmx) PX4_MK_GPIO(pin_ftmx, GPIO_HIGHDRIVE) -#define GPIO_GPIO0_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH0OUT) -#define GPIO_GPIO1_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH1OUT) -#define GPIO_GPIO2_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH2OUT) -#define GPIO_GPIO3_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH3OUT) -#define GPIO_GPIO4_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH4OUT) -#define GPIO_GPIO5_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH5OUT) -#define GPIO_GPIO6_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH6OUT) -#define GPIO_GPIO7_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH0OUT) -#define GPIO_GPIO8_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH4OUT) -#define GPIO_GPIO9_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH5OUT) -#define GPIO_GPIO10_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH6OUT) -#define GPIO_GPIO11_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH7OUT) -#define GPIO_GPIO12_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH3OUT) -#define GPIO_GPIO13_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH2OUT) +#define GPIO_GPIO0_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH0OUT) +#define GPIO_GPIO1_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH3OUT) +#define GPIO_GPIO2_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH4OUT) +#define GPIO_GPIO3_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH5OUT) +#define GPIO_GPIO4_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH6OUT) +#define GPIO_GPIO5_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH7OUT) +#define GPIO_GPIO6_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH0OUT) +#define GPIO_GPIO7_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH1OUT) +#define GPIO_GPIO8_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH2OUT) +#define GPIO_GPIO9_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH3OUT) +#define GPIO_GPIO10_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH4OUT) +#define GPIO_GPIO11_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH5OUT) +#define GPIO_GPIO12_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH6OUT) +#define GPIO_GPIO13_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH7OUT) -#define GPIO_GPIO0_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH0OUT) -#define GPIO_GPIO1_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH1OUT) -#define GPIO_GPIO2_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH2OUT) -#define GPIO_GPIO3_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH3OUT) -#define GPIO_GPIO4_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH4OUT) -#define GPIO_GPIO5_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH5OUT) -#define GPIO_GPIO6_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH6OUT) -#define GPIO_GPIO7_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH0OUT) -#define GPIO_GPIO8_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH4OUT) -#define GPIO_GPIO9_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH5OUT) -#define GPIO_GPIO10_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH6OUT) -#define GPIO_GPIO11_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH7OUT) -#define GPIO_GPIO12_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH3OUT) -#define GPIO_GPIO13_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH2OUT) +#define GPIO_GPIO0_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH0OUT) +#define GPIO_GPIO1_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH3OUT) +#define GPIO_GPIO2_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH4OUT) +#define GPIO_GPIO3_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH5OUT) +#define GPIO_GPIO4_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH6OUT) +#define GPIO_GPIO5_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH7OUT) +#define GPIO_GPIO6_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH0OUT) +#define GPIO_GPIO7_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH1OUT) +#define GPIO_GPIO8_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH2OUT) +#define GPIO_GPIO9_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH3OUT) +#define GPIO_GPIO10_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH4OUT) +#define GPIO_GPIO11_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH5OUT) +#define GPIO_GPIO12_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH6OUT) +#define GPIO_GPIO13_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH7OUT) /* Timer I/O PWM and capture * @@ -313,7 +340,7 @@ __BEGIN_DECLS * Pins: * Defined in board.h */ -// todo:Desine this! +// todo:Design this! #define DIRECT_PWM_OUTPUT_CHANNELS 14 #define DIRECT_INPUT_TIMER_CHANNELS 14 @@ -323,19 +350,18 @@ __BEGIN_DECLS #define GPIO_PERIPH_3V3_EN 0 -#define GPIO_SBUS_INV 0 -#define INVERT_RC_INPUT(_s) px4_arch_gpiowrite(GPIO_SBUS_INV, _s) - -/* Tone alarm output is On E28 */ +/* Tone alarm output PTA11 - FTM2_CH1 is On P12-4, P12-5 + * It is driving a PNP + */ #define TONE_ALARM_TIMER 2 /* timer */ -#define TONE_ALARM_CHANNEL 3 /* channel */ -#define GPIO_TONE_ALARM_IDLE (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN28) -#define GPIO_TONE_ALARM (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN28) +#define TONE_ALARM_CHANNEL 1 /* channel */ +#define GPIO_TONE_ALARM_IDLE (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN11) +#define GPIO_TONE_ALARM (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN11) /* USB * - * Note No external VBUD detection + * VBUS detection is on 36 ADC0_SE21 USB_VBUS_VALID */ @@ -348,12 +374,12 @@ __BEGIN_DECLS #define BOARD_NAME "NXPHLITE_V3" -/* Not Supported in V1 HW +/* * By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction) * this board support the ADC system_power interface, and therefore * provides the true logic GPIO BOARD_ADC_xxxx macros. */ -#define BOARD_ADC_USB_CONNECTED (0) +#define BOARD_ADC_USB_CONNECTED board_read_VBUS_state() #define BOARD_ADC_BRICK_VALID (1) #define BOARD_ADC_SERVO_VALID (1) #define BOARD_ADC_PERIPH_5V_OC (0) @@ -401,6 +427,44 @@ __BEGIN_DECLS #define BOARD_DMA_ALLOC_POOL_SIZE 5120 +/* Automounter */ + +#define HAVE_MMCSD 1 +#define HAVE_AUTOMOUNTER 1 +#if !defined(CONFIG_FS_AUTOMOUNTER) || !defined(HAVE_MMCSD) +# undef HAVE_AUTOMOUNTER +# undef CONFIG_NXPHLITE_SDHC_AUTOMOUNT +#endif + +#ifndef CONFIG_NXPHLITE_SDHC_AUTOMOUNT +# undef HAVE_AUTOMOUNTER +#endif + +/* Automounter defaults */ + +#ifdef HAVE_AUTOMOUNTER + +# ifndef CONFIG_NXPHLITE_SDHC_AUTOMOUNT_FSTYPE +# define CONFIG_NXPHLITE_SDHC_AUTOMOUNT_FSTYPE "vfat" +# endif + +# ifndef CONFIG_NXPHLITE_SDHC_AUTOMOUNT_BLKDEV +# define CONFIG_NXPHLITE_SDHC_AUTOMOUNT_BLKDEV "/dev/mmcds0" +# endif + +# ifndef CONFIG_NXPHLITE_SDHC_AUTOMOUNT_MOUNTPOINT +# define CONFIG_NXPHLITE_SDHC_AUTOMOUNT_MOUNTPOINT "/mnt/sdcard" +# endif + +# ifndef CONFIG_NXPHLITE_SDHC_AUTOMOUNT_DDELAY +# define CONFIG_NXPHLITE_SDHC_AUTOMOUNT_DDELAY 1000 +# endif + +# ifndef CONFIG_NXPHLITE_SDHC_AUTOMOUNT_UDELAY +# define CONFIG_NXPHLITE_SDHC_AUTOMOUNT_UDELAY 2000 +# endif +#endif /* HAVE_AUTOMOUNTER */ + /************************************************************************************ * Public data @@ -472,21 +536,7 @@ int nxphlite_bringup(void); * ****************************************************************************/ -#ifdef HAVE_MMCSD int nxphlite_sdhc_initialize(void); -#else -# define nxphlite_sdhc_initialize() (OK) -#endif - -/**************************************************************************** - * Name: nxphlite_sdhc_initialize - * - * Description: - * Inititialize the SDHC SD card slot - * - ****************************************************************************/ - -int nxphlite_sdio_initialize(void); /************************************************************************************ * Name: nxphlite_cardinserted diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_automount.c b/src/drivers/boards/nxphlite-v3/nxphlite_automount.c index f2a0202971..7ddbb37091 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_automount.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_automount.c @@ -1,6 +1,6 @@ /************************************************************************************ * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * David Sidrane * @@ -44,27 +44,19 @@ #endif #include +#include #include #include #include #include "board_config.h" - #ifdef HAVE_AUTOMOUNTER /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ -#ifndef NULL -# define NULL (FAR void *)0 -#endif - -#ifndef OK -# define OK 0 -#endif - /************************************************************************************ * Private Types ************************************************************************************/ diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_bringup.c b/src/drivers/boards/nxphlite-v3/nxphlite_bringup.c deleted file mode 100644 index 1eabecc9e4..0000000000 --- a/src/drivers/boards/nxphlite-v3/nxphlite_bringup.c +++ /dev/null @@ -1,123 +0,0 @@ -/**************************************************************************** - * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * David Sidrane - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include -#include - -#include "board_config.h" - -#if defined(CONFIG_LIB_BOARDCTL) || defined(CONFIG_BOARD_INITIALIZE) - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: nxphlite_bringup - * - * Description: - * Bring up board features - * - ****************************************************************************/ - -int nxphlite_bringup(void) -{ - int ret; - -#ifdef HAVE_PROC - /* Mount the proc filesystem */ - - syslog(LOG_INFO, "Mounting procfs to /proc\n"); - - ret = mount(NULL, PROCFS_MOUNTPOUNT, "procfs", 0, NULL); - - if (ret < 0) { - syslog(LOG_ERR, - "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", - ret, errno); - return ret; - } - -#endif - -#ifdef HAVE_MMCSD - /* Initialize the SDHC driver */ - - ret = nxphlite_sdhc_initialize(); - - if (ret < 0) { - mcerr("ERROR: nxphlite_sdhc_initialize() failed: %d\n", ret); - } - -#ifdef CONFIG_NXPHLITE_SDHC_MOUNT - - else { - /* REVISIT: A delay seems to be required here or the mount will fail. */ - /* Mount the volume on HSMCI0 */ - - ret = mount(CONFIG_NXPHLITE_SDHC_MOUNT_BLKDEV, - CONFIG_NXPHLITE_SDHC_MOUNT_MOUNTPOINT, - CONFIG_NXPHLITE_SDHC_MOUNT_FSTYPE, - 0, NULL); - - if (ret < 0) { - mcerr("ERROR: Failed to mount %s: %d\n", - CONFIG_NXPHLITE_SDHC_MOUNT_MOUNTPOINT, errno); - } - } - -#endif /* CONFIG_NXPHLITE_SDHC_MOUNT */ -#endif /* HAVE_MMCSD */ - -#ifdef HAVE_AUTOMOUNTER - /* Initialize the auto-mounter */ - - nxphlite_automount_initialize(); -#endif - - UNUSED(ret); - return OK; -} - -#endif /* CONFIG_LIB_BOARDCTL CONFIG_BOARD_INITIALIZE */ diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_init.c b/src/drivers/boards/nxphlite-v3/nxphlite_init.c index 4bad4a5fda..01194f76ee 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_init.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_init.c @@ -62,12 +62,14 @@ #include #include +#include #include "board_config.h" +#include "up_arch.h" #include #include -#include +#include #include #include @@ -121,6 +123,60 @@ __END_DECLS /**************************************************************************** * Public Functions ****************************************************************************/ + +/************************************************************************************ + * Name: board_read_VBUS_state + * + * Description: + * All boards must provide a way to read the state of VBUS, this my be simple + * digital input on a GPIO. Or something more complicated like a Analong input + * or reading a bit from a USB controller register. + * + * Returns - 0 if connected. + * + ************************************************************************************/ + +int board_read_VBUS_state(void) +{ + // read * 36 ADC0_SE21 USB_VBUS_VALID + return 0; +} + +/************************************************************************************ + * Name: board_rc_input + * + * Description: + * All boards my optionally provide this API to invert the Serial RC input. + * This is needed on SoCs that support the notion RXINV or TXINV as apposed to + * and external XOR controlled by a GPIO + * + ************************************************************************************/ + +__EXPORT void board_rc_input(bool invert_on) +{ + + irqstate_t irqstate = px4_enter_critical_section(); + + uint32_t s2 = getreg32(KINETIS_UART_S2_OFFSET + RC_UXART_BASE); + uint32_t c3 = getreg32(KINETIS_UART_C3_OFFSET + RC_UXART_BASE); + + /* {R|T}XINV bit fields can written any time */ + + if (invert_on) { + s2 |= (UART_S2_RXINV); + c3 |= (UART_C3_TXINV); + + } else { + s2 &= ~(UART_S2_RXINV); + c3 &= ~(UART_C3_TXINV); + } + + putreg32(s2, KINETIS_UART_S2_OFFSET + RC_UXART_BASE); + putreg32(c3, KINETIS_UART_C3_OFFSET + RC_UXART_BASE); + + leave_critical_section(irqstate); +} + /************************************************************************************ * Name: board_peripheral_reset * @@ -190,7 +246,32 @@ kinetis_boardinitialize(void) kinetis_pinconfig(GPIO_GPIO12_OUTPUT); kinetis_pinconfig(GPIO_GPIO13_OUTPUT); + /* Disable Phy for now */ + + kinetis_pinconfig(GPIO_E_RST); + kinetis_pinconfig(GPIO_E_EN); + kinetis_pinconfig(GPIO_E_INH); + kinetis_pinconfig(GPIO_ENET_CONFIG0); + + kinetis_pinconfig(GPIO_CAN0_STB); + kinetis_pinconfig(GPIO_CAN1_STB); + + kinetis_pinconfig(GPIO_ECH); + kinetis_pinconfig(GPIO_TRI); + + kinetis_pinconfig(GPIO_LED_SAFETY); + kinetis_pinconfig(GPIO_BTN_SAFETY); + + kinetis_pinconfig(GPIO_NFC_IO); + kinetis_pinconfig(GPIO_SENSOR_P_EN); + + kinetis_pinconfig(GPIO_LED_D9); + kinetis_pinconfig(GPIO_LED_D10); + + + /* configure SPI interfaces */ + nxphlite_spidev_initialize(); } @@ -282,6 +363,8 @@ __EXPORT int board_app_initialize(uintptr_t arg) # error platform is dependent on c++ both CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE must be defined. #endif + param_init(); + /* configure the high-resolution time/callout interface */ hrt_init(); @@ -451,29 +534,34 @@ __EXPORT int board_app_initialize(uintptr_t arg) led_off(LED_GREEN); led_off(LED_BLUE); - /* Configure SPI-based devices */ - -#ifdef CONFIG_SPI - int ret = nxphlite_spi_bus_initialize(); + int ret = nxphlite_sdhc_initialize(); if (ret != OK) { board_autoled_on(LED_RED); return ret; } +#ifdef HAVE_AUTOMOUNTER + /* Initialize the auto-mounter */ + + nxphlite_automount_initialize(); #endif -#ifdef KINETIS_SDHC - ret = nxphlite_sdhc_initialize(); - - if (ret != OK) { - board_autoled_on(LED_RED); - return ret; - } - -#endif nxphlite_usbinitialize(); + /* Configure SPI-based devices */ + +#ifdef CONFIG_SPI + ret = nxphlite_spi_bus_initialize(); + + if (ret != OK) { + board_autoled_on(LED_RED); + return ret; + } + +#endif + + return OK; } diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c b/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c index b78f6bfb9b..4a72df6c0a 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c @@ -40,8 +40,8 @@ * ------------ ------------- -------- * SD Card Slot Board Signal K66 Pin * ------------ ------------- -------- - * DAT0 SDHC0_D0 PTE0 - * DAT1 SDHC0_D1 PTE1 + * DAT0 SDHC0_D0 PTE1 + * DAT1 SDHC0_D1 PTE0 * DAT2 SDHC0_D2 PTE5 * CD/DAT3 SDHC0_D3 PTE4 * CMD SDHC0_CMD PTE3 @@ -71,7 +71,7 @@ #include "board_config.h" -#ifdef KINETIS_SDHC +#ifdef CONFIG_KINETIS_SDHC /**************************************************************************** * Pre-processor Definitions @@ -103,7 +103,7 @@ static struct nxphlite_sdhc_state_s g_sdhc; * Name: nxphlite_mediachange ****************************************************************************/ -static void nxphlite_mediachange(void) +static void nxphlite_mediachange(struct nxphlite_sdhc_state_s *sdhc) { bool inserted; @@ -116,13 +116,13 @@ static void nxphlite_mediachange(void) /* Has the pin changed state? */ - if (inserted != g_sdhc.inserted) { - mcinfo("Media change: %d->%d\n", g_sdhc.inserted, inserted); + if (inserted != sdhc->inserted) { + mcinfo("Media change: %d->%d\n", sdhc->inserted, inserted); /* Yes.. perform the appropriate action (this might need some debounce). */ - g_sdhc.inserted = inserted; - sdhc_mediachange(g_sdhc.sdhc, inserted); + sdhc->inserted = inserted; + sdhc_mediachange(sdhc->sdhc, inserted); #ifdef CONFIG_NXPHLITE_SDHC_AUTOMOUNT /* Let the automounter know about the insertion event */ @@ -136,11 +136,11 @@ static void nxphlite_mediachange(void) * Name: nxphlite_cdinterrupt ****************************************************************************/ -static int nxphlite_cdinterrupt(int irq, FAR void *context) +static int nxphlite_cdinterrupt(int irq, FAR void *context, FAR void *args) { /* All of the work is done by nxphlite_mediachange() */ - nxphlite_mediachange(); + nxphlite_mediachange((struct nxphlite_sdhc_state_s *) args); return OK; } @@ -159,34 +159,34 @@ static int nxphlite_cdinterrupt(int irq, FAR void *context) int nxphlite_sdhc_initialize(void) { int ret; - + struct nxphlite_sdhc_state_s *sdhc = &g_sdhc; /* Configure GPIO pins */ kinetis_pinconfig(GPIO_SD_CARDDETECT); /* Attached the card detect interrupt (but don't enable it yet) */ - kinetis_pinirqattach(GPIO_SD_CARDDETECT, nxphlite_cdinterrupt); + kinetis_pinirqattach(GPIO_SD_CARDDETECT, nxphlite_cdinterrupt, sdhc); /* Configure the write protect GPIO -- None */ /* Mount the SDHC-based MMC/SD block driver */ /* First, get an instance of the SDHC interface */ - mcinfo("Initializing SDHC slot %d\n", MMCSD_SLOTNO); + mcinfo("Initializing SDHC slot %d\n", CONFIG_NSH_MMCSDSLOTNO); - g_sdhc.sdhc = sdhc_initialize(MMCSD_SLOTNO); + sdhc->sdhc = sdhc_initialize(CONFIG_NSH_MMCSDSLOTNO); - if (!g_sdhc.sdhc) { - mcerr("ERROR: Failed to initialize SDHC slot %d\n", MMCSD_SLOTNO); + if (!sdhc->sdhc) { + mcerr("ERROR: Failed to initialize SDHC slot %d\n", CONFIG_NSH_MMCSDSLOTNO); return -ENODEV; } /* Now bind the SDHC interface to the MMC/SD driver */ - mcinfo("Bind SDHC to the MMC/SD driver, minor=%d\n", MMSCD_MINOR); + mcinfo("Bind SDHC to the MMC/SD driver, minor=%d\n", CONFIG_NSH_MMCSDMINOR); - ret = mmcsd_slotinitialize(MMSCD_MINOR, g_sdhc.sdhc); + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdhc->sdhc); if (ret != OK) { syslog(LOG_ERR, "ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret); @@ -197,7 +197,7 @@ int nxphlite_sdhc_initialize(void) /* Handle the initial card state */ - nxphlite_mediachange(); + nxphlite_mediachange(sdhc); /* Enable CD interrupts to handle subsequent media changes */ diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_spi.c b/src/drivers/boards/nxphlite-v3/nxphlite_spi.c index d02d54799e..4b76656d8b 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_spi.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_spi.c @@ -71,6 +71,11 @@ # endif #endif +/* Define CS GPIO array */ +static const uint32_t spi0selects_gpio[] = PX4_MEMORY_BUS_CS_GPIO; +static const uint32_t spi1selects_gpio[] = PX4_SENSOR_BUS_CS_GPIO; +static const uint32_t spi2selects_gpio[] = PX4_EXTERNAL_BUS_CS_GPIO; + /************************************************************************************ * Public Functions ************************************************************************************/ @@ -90,19 +95,29 @@ __EXPORT void board_spi_reset(int ms) void nxphlite_spidev_initialize(void) { - kinetis_pinconfig(GPIO_SPI_CS_SDCARD); - kinetis_pinconfig(GPIO_SPI_CS_FXOS8700CQ_ACCEL_MAG); - kinetis_pinconfig(GPIO_SPI_CS_FXAS21002CQ_GYRO); - kinetis_pinconfig(GPIO_GM_RST); + kinetis_pinconfig(GPIO_GM_nRST); kinetis_pinconfig(GPIO_A_RST); - - kinetis_pinconfig(GPIO_EXTI_GYRO_INT1); - kinetis_pinconfig(GPIO_EXTI_GYRO_INT2); - kinetis_pinconfig(GPIO_EXTI_ACCEL_MAG_INT1); - kinetis_pinconfig(GPIO_EXTI_ACCEL_MAG_INT2); kinetis_pinconfig(GPIO_EXTI_BARO_INT1); - kinetis_pinconfig(GPIO_EXTI_BARO_INT2); + kinetis_pinconfig(GPIO_P_INT); + + for (int cs = 0; cs < arraySize(spi0selects_gpio); cs++) { + if (spi0selects_gpio[cs] != 0) { + kinetis_pinconfig(spi0selects_gpio[cs]); + } + } + + for (int cs = 0; cs < arraySize(spi1selects_gpio); cs++) { + if (spi1selects_gpio[cs] != 0) { + kinetis_pinconfig(spi1selects_gpio[cs]); + } + } + + for (int cs = 0; cs < arraySize(spi2selects_gpio); cs++) { + if (spi2selects_gpio[cs] != 0) { + kinetis_pinconfig(spi2selects_gpio[cs]); + } + } } /************************************************************************************ @@ -112,51 +127,73 @@ void nxphlite_spidev_initialize(void) * Called to configure SPI chip select GPIO pins for the NXPHLITEV1 board. * ************************************************************************************/ -static struct spi_dev_s *spi_accel_mag; -static struct spi_dev_s *spi_baro; +static struct spi_dev_s *spi_sensors; +static struct spi_dev_s *spi_memory; +static struct spi_dev_s *spi_ext; __EXPORT int nxphlite_spi_bus_initialize(void) { /* Configure SPI-based devices */ - spi_accel_mag = kinetis_spibus_initialize(PX4_SPI_BUS_ACCEL_MAG); + spi_sensors = kinetis_spibus_initialize(PX4_SPI_BUS_SENSORS); - if (!spi_accel_mag) { - message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_ACCEL_MAG); + if (!spi_sensors) { + message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSORS); return -ENODEV; } - /* Default PX4_SPI_BUS_ACCEL_MAG to 1MHz and de-assert the known chip selects. + /* Default PX4_SPI_BUS_SENSORS to 1MHz and de-assert the known chip selects. */ - SPI_SETFREQUENCY(spi_accel_mag, 1 * 1000 * 1000); - SPI_SETBITS(spi_accel_mag, 8); - SPI_SETMODE(spi_accel_mag, SPIDEV_MODE3); + SPI_SETFREQUENCY(spi_sensors, 1 * 1000 * 1000); + SPI_SETBITS(spi_sensors, 8); + SPI_SETMODE(spi_sensors, SPIDEV_MODE0); - for (int cs = PX4_ACCEL_MAG_BUS_FIRST_CS; cs <= PX4_ACCEL_MAG_BUS_LAST_CS; cs++) { - SPI_SELECT(spi_accel_mag, cs, false); + for (int cs = PX4_SENSOR_BUS_FIRST_CS; cs <= PX4_SENSOR_BUS_LAST_CS; cs++) { + SPI_SELECT(spi_sensors, cs, false); } - /* Get the SPI port for the GYRO */ + /* Get the SPI port for the Memory */ - spi_baro = kinetis_spibus_initialize(PX4_SPI_BUS_GYRO); + spi_memory = kinetis_spibus_initialize(PX4_SPI_BUS_MEMORY); - if (!spi_baro) { - message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_GYRO); + if (!spi_memory) { + message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_MEMORY); return -ENODEV; } - /* FXAS21002CQ has max SPI clock speed of 2MHz and uses MODE 0 (CPOL = 0, and CPHA = 0) + /* Default PX4_SPI_BUS_MEMORY to 12MHz and de-assert the known chip selects. */ - SPI_SETFREQUENCY(spi_baro, 2 * 1000 * 1000); - SPI_SETBITS(spi_baro, 8); - SPI_SETMODE(spi_baro, SPIDEV_MODE0); + SPI_SETFREQUENCY(spi_memory, 12 * 1000 * 1000); + SPI_SETBITS(spi_memory, 8); + SPI_SETMODE(spi_memory, SPIDEV_MODE3); - for (int cs = PX4_GYRO_BUS_FIRST_CS; cs <= PX4_GYRO_BUS_LAST_CS; cs++) { - SPI_SELECT(spi_baro, cs, false); + for (int cs = PX4_MEMORY_BUS_FIRST_CS; cs <= PX4_MEMORY_BUS_LAST_CS; cs++) { + SPI_SELECT(spi_memory, cs, false); } + /* Configure EXTERNAL SPI-based devices */ + + spi_ext = kinetis_spibus_initialize(PX4_SPI_BUS_EXTERNAL); + + if (!spi_ext) { + message("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_EXTERNAL); + return -ENODEV; + } + + /* Default PX4_SPI_BUS_SENSORS to 1MHz and de-assert the known chip selects. + */ + + SPI_SETFREQUENCY(spi_ext, 8 * 1000 * 1000); + SPI_SETBITS(spi_ext, 8); + SPI_SETMODE(spi_ext, SPIDEV_MODE3); + + for (int cs = PX4_EXTERNAL_BUS_FIRST_CS; cs <= PX4_EXTERNAL_BUS_LAST_CS; cs++) { + SPI_SELECT(spi_ext, cs, false); + } + + return OK; } @@ -189,8 +226,6 @@ __EXPORT int nxphlite_spi_bus_initialize(void) * ************************************************************************************/ -static const uint32_t spi0selects_gpio[] = PX4_SDCARD_BUS_CS_GPIO; - void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); @@ -198,7 +233,12 @@ void kinetis_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool se /* SPI select is active low, so write !selected to select the device */ int sel = (int) devid; - ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SDCARD); + + if (devid == SPIDEV_FLASH) { + sel = PX4_SPIDEV_MEMORY; + } + + ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_MEMORY); /* Making sure the other peripherals are not selected */ @@ -220,8 +260,6 @@ uint8_t kinetis_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) return SPI_STATUS_PRESENT; } -static const uint32_t spi1selects_gpio[] = PX4_ACCEL_MAG_BUS_CS_GPIO; - void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); @@ -229,7 +267,7 @@ void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool se /* SPI select is active low, so write !selected to select the device */ int sel = (int) devid; - ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_ACCEL_MAG); + ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SENSORS); /* Making sure the other peripherals are not selected */ @@ -251,8 +289,6 @@ uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) return SPI_STATUS_PRESENT; } -static const uint32_t spi2selects_gpio[] = PX4_GYRO_BUS_CS_GPIO; - void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); @@ -260,7 +296,7 @@ void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool se /* SPI select is active low, so write !selected to select the device */ int sel = (int) devid; - ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_GYRO); + ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_EXTERNAL); /* Making sure the other peripherals are not selected */ diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_usb.c b/src/drivers/boards/nxphlite-v3/nxphlite_usb.c index c6f34bd46c..e28647befa 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_usb.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_usb.c @@ -97,6 +97,14 @@ __EXPORT int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable) { usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + + if (enable) { + putreg8(USB_CONTROL_DPPULLUPNONOTG, KINETIS_USB0_CONTROL); + + } else { + putreg8(0, KINETIS_USB0_CONTROL); + } + return OK; }