From 8cc358dff88df769777f9c9afcb12afd6f202164 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 13 Jul 2018 11:37:23 -0700 Subject: [PATCH] px4fmu-v5:extend board_rc_input to pass UxART --- src/drivers/boards/px4fmu-v5/init.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/drivers/boards/px4fmu-v5/init.c b/src/drivers/boards/px4fmu-v5/init.c index 3d8c785862..47e1284efa 100644 --- a/src/drivers/boards/px4fmu-v5/init.c +++ b/src/drivers/boards/px4fmu-v5/init.c @@ -114,20 +114,20 @@ __END_DECLS * ************************************************************************************/ -__EXPORT void board_rc_input(bool invert_on) +__EXPORT void board_rc_input(bool invert_on, uint32_t uxart_base) { irqstate_t irqstate = px4_enter_critical_section(); - uint32_t cr1 = getreg32(STM32_USART_CR1_OFFSET + RC_UXART_BASE); - uint32_t cr2 = getreg32(STM32_USART_CR2_OFFSET + RC_UXART_BASE); + uint32_t cr1 = getreg32(STM32_USART_CR1_OFFSET + uxart_base); + uint32_t cr2 = getreg32(STM32_USART_CR2_OFFSET + uxart_base); uint32_t regval = cr1; /* {R|T}XINV bit fields can only be written when the USART is disabled (UE=0). */ regval &= ~USART_CR1_UE; - putreg32(regval, STM32_USART_CR1_OFFSET + RC_UXART_BASE); + putreg32(regval, STM32_USART_CR1_OFFSET + uxart_base); if (invert_on) { cr2 |= (USART_CR2_RXINV | USART_CR2_TXINV); @@ -136,8 +136,8 @@ __EXPORT void board_rc_input(bool invert_on) cr2 &= ~(USART_CR2_RXINV | USART_CR2_TXINV); } - putreg32(cr2, STM32_USART_CR2_OFFSET + RC_UXART_BASE); - putreg32(cr1, STM32_USART_CR1_OFFSET + RC_UXART_BASE); + putreg32(cr2, STM32_USART_CR2_OFFSET + uxart_base); + putreg32(cr1, STM32_USART_CR1_OFFSET + uxart_base); leave_critical_section(irqstate); }