Merge branch 'master' into new_state_machine

compiling again
Conflicts:
	src/modules/fixedwing_att_control/fixedwing_att_control_att.c
	src/modules/fixedwing_att_control/fixedwing_att_control_rate.c
	src/modules/fixedwing_pos_control/fixedwing_pos_control_main.c
	src/modules/mavlink/orb_listener.c
	src/modules/multirotor_att_control/multirotor_attitude_control.c
	src/modules/multirotor_att_control/multirotor_rate_control.c
	src/modules/systemlib/pid/pid.c
	src/modules/systemlib/pid/pid.h
	src/modules/uORB/objects_common.cpp

src/drivers/stm32/adc/adc.cpp

@@ -58,7 +58,7 @@
 #include <drivers/drv_adc.h>
 
 #include <arch/stm32/chip.h>
-#include <stm32_internal.h>
+#include <stm32.h>
 #include <stm32_gpio.h>
 
 #include <systemlib/err.h>

src/drivers/stm32/drv_hrt.c

@@ -66,7 +66,7 @@
 #include "up_internal.h"
 #include "up_arch.h"
 
-#include "stm32_internal.h"
+#include "stm32.h"
 #include "stm32_gpio.h"
 #include "stm32_tim.h"
 
@@ -278,8 +278,10 @@ static void		hrt_call_invoke(void);
 #ifdef CONFIG_HRT_PPM
 /* 
  * If the timer hardware doesn't support GTIM_CCER_CCxNP, then we will work around it.
+ *
+ * Note that we assume that M3 means STM32F1 (since we don't really care about the F2).
  */
-# ifndef GTIM_CCER_CC1NP
+# ifdef CONFIG_ARCH_CORTEXM3
 #  define GTIM_CCER_CC1NP 0
 #  define GTIM_CCER_CC2NP 0
 #  define GTIM_CCER_CC3NP 0

src/drivers/stm32/drv_pwm_servo.c

@@ -64,7 +64,7 @@
 #include <up_internal.h>
 #include <up_arch.h>
 
-#include <stm32_internal.h>
+#include <stm32.h>
 #include <stm32_gpio.h>
 #include <stm32_tim.h>
 

src/drivers/stm32/tone_alarm/tone_alarm.cpp

@@ -111,7 +111,7 @@
 #include <up_internal.h>
 #include <up_arch.h>
 
-#include <stm32_internal.h>
+#include <stm32.h>
 #include <stm32_gpio.h>
 #include <stm32_tim.h>