diff --git a/nuttx-configs/nxphlite-v3/include/board.h b/nuttx-configs/nxphlite-v3/include/board.h index 5bc61aad25..fc0e434748 100644 --- a/nuttx-configs/nxphlite-v3/include/board.h +++ b/nuttx-configs/nxphlite-v3/include/board.h @@ -41,9 +41,6 @@ /************************************************************************************ * Included Files ************************************************************************************/ -#undef HW_V3 /*- As shipped from NXP */ -#define HW_V3_MOD_RC0 /* Modified board */ -#undef HW_V4 /* Next Rev with modes */ #include @@ -61,13 +58,13 @@ * 256 KiB of SRAM. */ /* Clocking *************************************************************************/ -/* The NXPHlite-v3 uses a 16MHz external Oscillator. The Kinetis MCU startup from an - * internal digitally-controlled oscillator (DCO). Nuttx will enable the main external - * oscillator (EXTAL0/XTAL0). The external oscillator/resonator can range from +/* The NXPHlite-v3 uses a 16MHz external powered Oscillator. The Kinetis MCU startup + * from an internal digitally-controlled oscillator (DCO). Nuttx will enable the main + * external oscillator EXTAL0. The external oscillator can range from * 32.768 KHz up to 50 MHz. The default external source for the MCG oscillator inputs * EXTAL. * - * Y1 a High-frequency, low-power Xtal + * Y1 a High-frequency, Oscillator */ #define BOARD_EXTAL_LP 1 #define BOARD_EXTAL_FREQ 16000000 /* 16MHz Oscillator Y1 */ @@ -78,7 +75,7 @@ /* FLL Configuration. * BOARD_EXTAL_FREQ / BOARD_FRDIV has to be in the range 31.25 kHz to 39.0625 - * 16 Mhz/ MCG_C1_FRDIV_DIV512 = 31.25 kHz * 640 the default for MCG_C4 + * 16 Mhz / MCG_C1_FRDIV_DIV512 = 31.25 kHz * 640 the default for MCG_C4 * FLL is 20Mhz */ #define BOARD_FRDIV MCG_C1_FRDIV_DIV512 @@ -175,11 +172,11 @@ /* SDHC pull-up resistors **********************************************************/ -/* There are no external pull-ups on the NXPhlite - * So enable them. +/* There are external pull-ups on the NXPhlite + * So enable we do not them. */ -#define BOARD_SDHC_ENABLE_PULLUPS 1 +#undef BOARD_SDHC_ENABLE_PULLUPS /* Identification mode: Optimal 400KHz, Actual 168Mhz / (32 * 14) = 375 KHz */ @@ -318,38 +315,27 @@ /* PWM Channels */ -#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_2 /* PTC1 FMU_CH1 P4-34 */ -#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1 /* PTA6 FMU_CH2 P4-41 */ -#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_3 /* PTD4 FMU_CH3 P4-35 */ -#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_3 /* PTD5 FMU_CH4 P4-32 */ -#define GPIO_FTM0_CH6OUT PIN_FTM0_CH6_2 /* PTD6 FMU_CH5 P4-29 */ -#define GPIO_FTM0_CH7OUT PIN_FTM0_CH7_2 /* PTD7 FMU_CH6 P4-26 */ +#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_2 /* PTC1 FMU_CH1 P4-19 */ +#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1 /* PTA6 FMU_CH2 P4-16 */ +#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_3 /* PTD4 FMU_CH3 P4-13 */ +#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_3 /* PTD5 FMU_CH4 P4-10 */ -#define GPIO_FTM3_CH0OUT PIN_FTM3_CH0_1 /* PTD0 IO_CH1 P4-23 */ -#define GPIO_FTM3_CH1OUT PIN_FTM3_CH1_2 /* PTE6 IO_CH2 P4-20 */ -#define GPIO_FTM3_CH2OUT PIN_FTM3_CH2_2 /* PTE7 IO_CH3 P4-17 */ -#define GPIO_FTM3_CH3OUT PIN_FTM3_CH3_2 /* PTE8 IO_CH4 P4-14 */ -#define GPIO_FTM3_CH4OUT PIN_FTM3_CH4_2 /* PTE9 IO_CH5 P4-11 */ -#define GPIO_FTM3_CH5OUT PIN_FTM3_CH5_2 /* PTE10 IO_CH6 P4-8 */ -#define GPIO_FTM3_CH6OUT PIN_FTM3_CH6_2 /* PTE11 IO_CH7 P4-5 */ -#define GPIO_FTM3_CH7OUT PIN_FTM3_CH7_2 /* PTE12 IO_CH8 P4-2 */ +#define GPIO_FTM3_CH6OUT PIN_FTM3_CH6_2 /* PTE11 FMU_CH5 P4-7 */ +#define GPIO_FTM3_CH7OUT PIN_FTM3_CH7_2 /* PTE12 FMU_CH5 P4-4 */ -#define GPIO_FTM0_CH0IN PIN_FTM0_CH0_2 /* PTC1 FMU_CH1 P4-34 */ -#define GPIO_FTM0_CH3IN PIN_FTM0_CH3_1 /* PTA6 FMU_CH2 P4-41 */ -#define GPIO_FTM0_CH4IN PIN_FTM0_CH4_3 /* PTD4 FMU_CH3 P4-35 */ -#define GPIO_FTM0_CH5IN PIN_FTM0_CH5_3 /* PTD5 FMU_CH4 P4-32 */ -#define GPIO_FTM0_CH6IN PIN_FTM0_CH6_2 /* PTD6 FMU_CH5 P4-29 */ -#define GPIO_FTM0_CH7IN PIN_FTM0_CH7_2 /* PTD7 FMU_CH6 P4-26 */ +#define GPIO_FTM3_CH0OUT PIN_FTM3_CH0_1 /* PTD0 U_TRI P10-2 */ +#define GPIO_FTM2_CH0OUT PIN_FTM2_CH0_1 /* PTA10 U_ECH P20-3 */ -#define GPIO_FTM3_CH0IN PIN_FTM3_CH0_1 /* PTD0 IO_CH1 P4-23 */ -#define GPIO_FTM3_CH1IN PIN_FTM3_CH1_2 /* PTE6 IO_CH2 P4-20 */ -#define GPIO_FTM3_CH2IN PIN_FTM3_CH2_2 /* PTE7 IO_CH3 P4-17 */ -#define GPIO_FTM3_CH3IN PIN_FTM3_CH3_2 /* PTE8 IO_CH4 P4-14 */ -#define GPIO_FTM3_CH4IN PIN_FTM3_CH4_2 /* PTE9 IO_CH5 P4-11 */ -#define GPIO_FTM3_CH5IN PIN_FTM3_CH5_2 /* PTE10 IO_CH6 P4-8 */ -#define GPIO_FTM3_CH6IN PIN_FTM3_CH6_2 /* PTE11 IO_CH7 P4-5 */ -#define GPIO_FTM3_CH7IN PIN_FTM3_CH7_2 /* PTE12 IO_CH8 P4-2 */ +#define GPIO_FTM0_CH0IN PIN_FTM0_CH0_2 /* PTC1 FMU_CH1 P4-19 */ +#define GPIO_FTM0_CH3IN PIN_FTM0_CH3_1 /* PTA6 FMU_CH2 P4-16 */ +#define GPIO_FTM0_CH4IN PIN_FTM0_CH4_3 /* PTD4 FMU_CH3 P4-13 */ +#define GPIO_FTM0_CH5IN PIN_FTM0_CH5_3 /* PTD5 FMU_CH4 P4-10 */ +#define GPIO_FTM3_CH6IN PIN_FTM3_CH6_2 /* PTE11 FMU_CH5 P4-7 */ +#define GPIO_FTM3_CH7IN PIN_FTM3_CH7_2 /* PTE12 FMU_CH5 P4-4 */ + +#define GPIO_FTM3_CH0IN PIN_FTM3_CH0_1 /* PTD0 U_TRI P10-2 */ +#define GPIO_FTM2_CH0IN PIN_FTM2_CH0_1 /* PTA10 U_ECH P20-3 */ /* SPI * @@ -444,19 +430,13 @@ * 2 UART4_TX PTC15 UART4_TX * 3 UART4_RX PTC14 UART4_RX * 4 UART4_CTS PTC13 UART4_CTS - * 5 UART4_RTS PTC12 UART4_RTS - V3 HW - * 5 UART4_RTS PTE27 UART4_RTS - V3.RC01 and V4 + * 5 UART4_RTS PTE27 UART4_RTS * -------- ------------ ------- --------- */ #define PIN_UART4_RX PIN_UART4_RX_1 #define PIN_UART4_TX PIN_UART4_TX_1 -#if defined (HW_V3) -# define PIN_UART4_RTS PIN_UART4_RTS_1 -#endif -#if defined(HW_V3_MOD_RC0) || defined(HW_V4) -# define PIN_UART4_RTS PIN_UART4_RTS_2 -#endif +#define PIN_UART4_RTS PIN_UART4_RTS_2 #define PIN_UART4_CTS PIN_UART4_CTS_1 /* diff --git a/src/drivers/boards/nxphlite-v3/board_config.h b/src/drivers/boards/nxphlite-v3/board_config.h index e3c0e88e9f..0ee03e6dd0 100644 --- a/src/drivers/boards/nxphlite-v3/board_config.h +++ b/src/drivers/boards/nxphlite-v3/board_config.h @@ -42,10 +42,6 @@ /**************************************************************************************************** * Included Files ****************************************************************************************************/ -#undef HW_V3 /*- As shipped from NXP */ -#define HW_V3_MOD_RC0 /* Modified board */ -#undef HW_V4 /* Next Rev with modes */ - #include #include #include @@ -77,7 +73,7 @@ __BEGIN_DECLS #define GPIO_LED_D10 (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTD | PIN13) #define GPIO_NFC_IO (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN26) -#define GPIO_SENSOR_P_EN (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTB | PIN8) +#define GPIO_SENSOR_P_EN (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN8) /* UART tty Mapping @@ -100,7 +96,7 @@ __BEGIN_DECLS */ #define HRT_PPM_CHANNEL 1 /* Use TPM1 capture/compare channel 1 */ -#define GPIO_PPM_IN PIN_TPM1_CH1_1 /* PTC3 USART1 RX and PTA9 and PIN_TPM1_CH1 AKA RC_INPUT */ +#define GPIO_PPM_IN PIN_TPM1_CH1_1 /* PTC3 USART1 RX and PTA9 and PIN_TPM1_CH1 AKA FrSky_IN_RC_IN */ /* @@ -118,7 +114,6 @@ __BEGIN_DECLS /* Power is a p-Channel FET */ #define GPIO_SPEKTRUM_P_EN (GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN7) -#define SPEKTRUM_POWER(_on_true) px4_arch_gpiowrite(GPIO_SPEKTRUM_P_EN, (!_on_true)) /* For binding the Spektrum 3-pin interfaces is used with it TX (output) * as an input Therefore we drive are UARTx_RX (normaly an input) as an @@ -142,13 +137,15 @@ __BEGIN_DECLS /* Ethernet Control * * Uninitialized to Reset Disabled and Inhibited + * All pins driven low to not back feed when power is off */ -#define GPIO_E_RST (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN28) -#define GPIO_E_EN (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN29) -#define GPIO_E_INH (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN8) -#define GPIO_ENET_CONFIG0 (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN24) - +#define nGPIO_ETHERNET_P_EN (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN3) +#define GPIO_ENET_RST (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN28) +#define GPIO_ENET_EN (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN29) +#define GPIO_ENET_INH (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN8) +#define GPIO_ENET_CONFIG0 (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTA | PIN24) +#define GPIO_ENET_CONFIG1 (GPIO_LOWDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTB | PIN2) /* CAN Control * Control pin S allows two operating modes to be selected: @@ -159,23 +156,10 @@ __BEGIN_DECLS #define GPIO_CAN1_STB (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTC | PIN18) -/* P13 Ultrasonic Sensors - * GPIO to driver the the Trigger and sample the response on Echo - * It would be gbetter to have Echo on a timer capture pin. - */ - -#define GPIO_ECH (GPIO_PULLUP | PIN_PORTB | PIN2) -#define GPIO_TRI (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTB | PIN3) - /* Safety Switch * TBD */ -#if defined(HW_V3) -# define GPIO_LED_SAFETY (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTE | PIN27) -#endif -#if defined(HW_V3_MOD_RC0) || defined(HW_V4) -# define GPIO_LED_SAFETY (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTC | PIN0) -#endif +#define GPIO_LED_SAFETY (GPIO_HIGHDRIVE | GPIO_OUTPUT_ZER0 | PIN_PORTC | PIN0) #define GPIO_BTN_SAFETY (GPIO_PULLUP | PIN_PORTE | PIN28) /* NXPHlite-v3 GPIOs ****************************************************************/ @@ -197,10 +181,13 @@ __BEGIN_DECLS * CMD SDHC0_CMD PTE3 * CLK SDHC0_DCLK PTE2 * SWITCH D_CARD_DETECT PTD10 + * CAED_P_EN PTD6 * ------------ ------------- -------- * * There is no Write Protect pin available to the K66 */ +#define SD_CAED_P_EN (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTD | PIN6) + #define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTD | PIN10) /* SPI @@ -237,12 +224,12 @@ __BEGIN_DECLS /* Sensor interrupts */ -#undef GPIO_EXTI_GYRO_INT1 /* NC */ -#undef GPIO_EXTI_GYRO_INT2 /* NC */ -#undef GPIO_EXTI_ACCEL_MAG_INT1 /* NC */ -#undef GPIO_EXTI_ACCEL_MAG_INT2 /* NC */ +#define GPIO_EXTI_GYRO_INT1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN7) +#define GPIO_EXTI_GYRO_INT2 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN6) +#define GPIO_EXTI_ACCEL_MAG_INT1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN9) +#define GPIO_EXTI_ACCEL_MAG_INT2 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN10) #define GPIO_EXTI_BARO_INT1 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTD | PIN11) -#undef GPIO_EXTI_BARO_INT2 /* NC */ +#define GPIO_EXTI_BARO_INT2 (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTD | PIN7) /* Use these in place of the uint32_t enumeration to select a specific SPI device on SPI1 */ @@ -271,8 +258,6 @@ __BEGIN_DECLS /* I2C busses */ -#define GPIO_P_INT (GPIO_PULLUP | PIN_PORTD | PIN11) - #define PX4_I2C_BUS_EXPANSION PX4_BUS_NUMBER_TO_PX4(0) #define PX4_I2C_BUS_ONBOARD PX4_BUS_NUMBER_TO_PX4(1) @@ -293,18 +278,19 @@ __BEGIN_DECLS * Bits 31:0 are ADC1 channels 31:0 */ -#define ADC1(c) (((c) & 0x1f)) /* Define ADC number /Channel number */ +#define ADC1_CH(c) (((c) & 0x1f)) /* Define ADC number Channel number */ +#define ADC1_GPIO(n) PIN_ADC1_SE##n /* ADC defines to be used in sensors.cpp to read from a particular channel */ -#define ADC_USB_VBUS_VALID ADC1(0) /* USB_VBUS_VALID 29 - ADC1_DP0 (bridged on V3 RC00 HW from pin 36 ADC0_SE16 or ADC0_SE21) */ -#define ADC_BATTERY_VOLTAGE_CHANNEL ADC1(10) /* BAT_VSENS 85 PTB4 ADC1_SE10 */ -#define ADC_BATTERY_CURRENT_CHANNEL ADC1(11) /* BAT_ISENS 86 PTB5 ADC1_SE11 */ -#define ADC_5V_RAIL_SENSE ADC1(12) /* 5V_VSENS 87 PTB6 ADC1_SE12 */ -#define ADC_RSSI_IN ADC1(13) /* RSSI_IN 88 PTB7 ADC1_SE13 */ -#define ADC_AD1 ADC1(16) /* AD1 35 - ADC1_SE16 */ -#define ADC_AD2 ADC1(18) /* AD2 37 - ADC1_SE18 */ -#define ADC_AD3 ADC1(23) /* AD3 39 - ADC1_SE23 */ +#define ADC_USB_VBUS_VALID ADC1_CH(0) /* USB_VBUS_VALID 29 - ADC1_DP0 */ +#define ADC_BATTERY_VOLTAGE_CHANNEL ADC1_CH(10) /* BAT_VSENS 85 PTB4 ADC1_SE10 */ +#define ADC_BATTERY_CURRENT_CHANNEL ADC1_CH(11) /* BAT_ISENS 86 PTB5 ADC1_SE11 */ +#define ADC_5V_RAIL_SENSE ADC1_CH(12) /* 5V_VSENS 87 PTB6 ADC1_SE12 */ +#define ADC_RSSI_IN ADC1_CH(13) /* RSSI_IN 88 PTB7 ADC1_SE13 */ +#define ADC_AD1 ADC1_CH(16) /* AD1 35 - ADC1_SE16 */ +#define ADC_AD2 ADC1_CH(18) /* AD2 37 - ADC1_SE18 */ +#define ADC_AD3 ADC1_CH(23) /* AD3 39 - ADC1_SE23 */ /* Mask use to initialize the ADC driver */ @@ -317,12 +303,15 @@ __BEGIN_DECLS (1 << ADC_AD2) | \ (1 << ADC_AD3)) + /* GPIO that require Configuration */ -#define GPIO_BAT_VSENS PIN_ADC1_SE10 -#define GPIO_BAT_ISENS PIN_ADC1_SE11 -#define GPIO_5V_VSENS PIN_ADC1_SE12 -#define GPIO_RSSI_IN PIN_ADC1_SE13 +#define PX4_ADC_GPIO \ + /* PTB4 ADC1_SE10 */ ADC1_GPIO(10), \ + /* PTB5 ADC1_SE11 */ ADC1_GPIO(11), \ + /* PTB6 ADC1_SE12 */ ADC1_GPIO(12), \ + /* PTB7 ADC1_SE13 */ ADC1_GPIO(13) + #define BOARD_BATTERY1_V_DIV (10.177939394f) @@ -339,35 +328,32 @@ __BEGIN_DECLS #define PX4_MK_GPIO_INPUT(pin_ftmx) PX4_MK_GPIO(pin_ftmx, GPIO_PULLUP) #define PX4_MK_GPIO_OUTPUT(pin_ftmx) PX4_MK_GPIO(pin_ftmx, GPIO_HIGHDRIVE) -#define GPIO_GPIO0_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH0OUT) -#define GPIO_GPIO1_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH3OUT) -#define GPIO_GPIO2_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH4OUT) -#define GPIO_GPIO3_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH5OUT) -#define GPIO_GPIO4_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH6OUT) -#define GPIO_GPIO5_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH7OUT) -#define GPIO_GPIO6_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH0OUT) -#define GPIO_GPIO7_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH1OUT) -#define GPIO_GPIO8_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH2OUT) -#define GPIO_GPIO9_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH3OUT) -#define GPIO_GPIO10_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH4OUT) -#define GPIO_GPIO11_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH5OUT) -#define GPIO_GPIO12_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH6OUT) -#define GPIO_GPIO13_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH7OUT) +#define GPIO_GPIO0_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH0OUT) /* FMU_CH1 */ +#define GPIO_GPIO1_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH3OUT) /* FMU_CH2 */ +#define GPIO_GPIO2_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH4OUT) /* FMU_CH3 */ +#define GPIO_GPIO3_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM0_CH5OUT) /* FMU_CH4 */ +#define GPIO_GPIO4_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH6OUT) /* FMU_CH5 */ +#define GPIO_GPIO5_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH7OUT) /* FMU_CH6 */ -#define GPIO_GPIO0_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH0OUT) -#define GPIO_GPIO1_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH3OUT) -#define GPIO_GPIO2_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH4OUT) -#define GPIO_GPIO3_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH5OUT) -#define GPIO_GPIO4_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH6OUT) -#define GPIO_GPIO5_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH7OUT) -#define GPIO_GPIO6_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH0OUT) -#define GPIO_GPIO7_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH1OUT) -#define GPIO_GPIO8_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH2OUT) -#define GPIO_GPIO9_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH3OUT) -#define GPIO_GPIO10_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH4OUT) -#define GPIO_GPIO11_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH5OUT) -#define GPIO_GPIO12_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH6OUT) -#define GPIO_GPIO13_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH7OUT) +#define GPIO_GPIO6_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM3_CH0OUT) /* U_TRI */ +#define GPIO_GPIO7_INPUT PX4_MK_GPIO_INPUT(GPIO_FTM2_CH0OUT) /* U_ECHO */ + +#define GPIO_GPIO0_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH0OUT) /* FMU_CH1 */ +#define GPIO_GPIO1_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH3OUT) /* FMU_CH2 */ +#define GPIO_GPIO2_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH4OUT) /* FMU_CH3 */ +#define GPIO_GPIO3_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM0_CH5OUT) /* FMU_CH4 */ +#define GPIO_GPIO4_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH6OUT) /* FMU_CH5 */ +#define GPIO_GPIO5_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH7OUT) /* FMU_CH6 */ + +#define GPIO_GPIO6_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM3_CH0OUT) /* U_TRI */ +#define GPIO_GPIO7_OUTPUT PX4_MK_GPIO_OUTPUT(GPIO_FTM2_CH0OUT) /* U_ECHO */ + +/* P13 Ultrasonic Sensors + * Timer Capture driver the the Trigger and sample the response on Echo + */ + +#define GPIO_TRI GPIO_GPIO6_OUTPUT +#define GPIO_ECH GPIO_GPIO7_INPUT /* Timer I/O PWM and capture * @@ -379,8 +365,8 @@ __BEGIN_DECLS */ // todo:Design this! -#define DIRECT_PWM_OUTPUT_CHANNELS 14 -#define DIRECT_INPUT_TIMER_CHANNELS 14 +#define DIRECT_PWM_OUTPUT_CHANNELS 8 +#define DIRECT_INPUT_TIMER_CHANNELS 8 /* Power supply control and monitoring GPIOs */ // None @@ -398,9 +384,9 @@ __BEGIN_DECLS /* USB * - * VBUS detection is on 36 ADC0_SE21 USB_VBUS_VALID + * VBUS detection is on 29 ADC_DPM0 and PTE8 */ - +#define GPIO_USB_VBUS_VALID /* PTE8 */ (GPIO_PULLUP | PIN_PORTE | PIN8) /* PWM input driver. Use FMU PWM14 pin * todo:desing this @@ -411,12 +397,27 @@ __BEGIN_DECLS #define BOARD_NAME "NXPHLITE_V3" + +/* Define True logic Power Control in arch agnostic form */ + +#define VDD_ETH_EN(on_true) px4_arch_gpiowrite(nGPIO_ETHERNET_P_EN, !(on_true)) +// Do not have #define VDD_5V_PERIPH_EN(on_true) px4_arch_gpiowrite(GPIO_nVDD_5V_PERIPH_EN, !(on_true)) +// Do not have #define VDD_5V_HIPOWER_EN(on_true) px4_arch_gpiowrite(GPIO_nVDD_5V_HIPOWER_EN, !(on_true)) +#define VDD_3V3_SENSORS_EN(on_true) px4_arch_gpiowrite(GPIO_SENSOR_P_EN, !(on_true)) +#define VDD_3V3_SPEKTRUM_POWER_EN(on_true) px4_arch_gpiowrite(GPIO_SPEKTRUM_P_EN, !(on_true)) +#define READ_VDD_3V3_SPEKTRUM_POWER_EN() px4_arch_gpioread(GPIO_SPEKTRUM_P_EN) +// Do not have #define VDD_5V_RC_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_5V_RC_EN, (on_true)) +// Do not have #define VDD_5V_WIFI_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_5V_WIFI_EN, (on_true)) +#define VDD_3V3_SD_CARD_EN(on_true) px4_arch_gpiowrite(SD_CAED_P_EN, !(on_true)) + + /* * By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction) * this board support the ADC system_power interface, and therefore * provides the true logic GPIO BOARD_ADC_xxxx macros. */ -#define BOARD_ADC_USB_CONNECTED ADC_USB_VBUS_VALID /* VBUS valid is read on an ADC pin */ + +#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_USB_VBUS_VALID)) #define BOARD_ADC_BRICK_VALID (1) #define BOARD_ADC_SERVO_VALID (1) #define BOARD_ADC_PERIPH_5V_OC (0) @@ -431,14 +432,8 @@ __BEGIN_DECLS {GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \ {GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \ {GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \ - {GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, 0}, \ - {GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, 0}, \ - {GPIO_GPIO8_INPUT, GPIO_GPIO8_OUTPUT, 0}, \ - {GPIO_GPIO9_INPUT, GPIO_GPIO9_OUTPUT, 0}, \ - {GPIO_GPIO10_INPUT, GPIO_GPIO10_OUTPUT, 0}, \ - {GPIO_GPIO11_INPUT, GPIO_GPIO11_OUTPUT, 0}, \ - {GPIO_GPIO12_INPUT, GPIO_GPIO12_OUTPUT, 0}, \ - {GPIO_GPIO13_INPUT, GPIO_GPIO13_OUTPUT, 0}, \ + {0, GPIO_TRI, 0}, \ + {GPIO_ECH, 0, 0}, \ } /* * GPIO numbers. @@ -451,19 +446,51 @@ __BEGIN_DECLS #define GPIO_SERVO_4 (1<<3) /**< servo 4 output */ #define GPIO_SERVO_5 (1<<4) /**< servo 5 output */ #define GPIO_SERVO_6 (1<<5) /**< servo 6 output */ -#define GPIO_SERVO_7 (1<<6) /**< servo 7 output */ -#define GPIO_SERVO_8 (1<<7) /**< servo 8 output */ -#define GPIO_SERVO_9 (1<<8) /**< servo 9 output */ -#define GPIO_SERVO_10 (1<<9) /**< servo 9 output */ -#define GPIO_SERVO_11 (1<<10) /**< servo 10 output */ -#define GPIO_SERVO_12 (1<<11) /**< servo 11 output */ -#define GPIO_SERVO_13 (1<<12) /**< servo 12 output */ -#define GPIO_SERVO_14 (1<<13) /**< servo 13 output */ +#define GPIO_SERVO_7 (1<<6) /**< servo 7 output U_TRI */ +#define GPIO_SERVO_8 (1<<6) /**< servo 8 output U_ECH */ /* This board provides a DMA pool and APIs */ #define BOARD_DMA_ALLOC_POOL_SIZE 5120 +/* This board provides the board_on_reset interface */ + +#define BOARD_HAS_ON_RESET 1 + +#define PX4_GPIO_PWM_INIT_LIST { \ + GPIO_GPIO5_INPUT, \ + GPIO_GPIO4_INPUT, \ + GPIO_GPIO3_INPUT, \ + GPIO_GPIO2_INPUT, \ + GPIO_GPIO1_INPUT, \ + GPIO_GPIO0_INPUT, \ + GPIO_TRI, \ + } + +#define PX4_GPIO_INIT_LIST { \ + GPIO_SENSOR_P_EN, \ + SD_CAED_P_EN, \ + nGPIO_ETHERNET_P_EN, \ + GPIO_SPEKTRUM_P_EN, \ + PX4_ADC_GPIO, \ + GPIO_GM_nRST, \ + GPIO_A_RST, \ + GPIO_USB_VBUS_VALID, \ + GPIO_ECH, \ + GPIO_ENET_RST, \ + GPIO_ENET_EN, \ + GPIO_ENET_INH, \ + GPIO_ENET_CONFIG0, \ + GPIO_ENET_CONFIG1, \ + GPIO_CAN0_STB, \ + GPIO_CAN1_STB, \ + GPIO_BTN_SAFETY, \ + GPIO_TONE_ALARM_IDLE, \ + GPIO_NFC_IO, \ + GPIO_LED_D9, \ + GPIO_LED_D10 \ + } + /* Automounter */ #define HAVE_MMCSD 1 diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_init.c b/src/drivers/boards/nxphlite-v3/nxphlite_init.c index ecd2ef102c..de363053cf 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_init.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_init.c @@ -124,6 +124,29 @@ __END_DECLS /**************************************************************************** * Public Functions ****************************************************************************/ +/************************************************************************************ + * Name: board_on_reset + * + * Description: + * Optionally provided function called on entry to board_system_reset + * It should perform any house keeping prior to the rest. + * + * status - 1 if resetting to boot loader + * 0 if just resetting + * + ************************************************************************************/ + +void board_on_reset(int status) +{ + /* configure the GPIO pins to outputs and keep them low */ + + const uint32_t gpio[] = PX4_GPIO_PWM_INIT_LIST; + board_gpio_init(gpio, arraySize(gpio)); + + if (status >= 0) { + up_mdelay(6); + } +} /************************************************************************************ * Name: board_read_VBUS_state @@ -139,8 +162,7 @@ __END_DECLS int board_read_VBUS_state(void) { - // read * 36 ADC0_SE21 USB_VBUS_VALID - return g_board_usb_connected ? 0 : 1; + return BOARD_ADC_USB_CONNECTED ? 0 : 1; } /************************************************************************************ @@ -210,76 +232,16 @@ __EXPORT void board_peripheral_reset(int ms) __EXPORT void kinetis_boardinitialize(void) { + board_on_reset(-1); /* Reset PWM first thing */ + /* configure LEDs */ board_autoled_initialize(); - /* Reset Sensors */ - kinetis_pinconfig(GPIO_GM_nRST); - kinetis_pinconfig(GPIO_A_RST); - - /* configure ADC pins */ - - kinetis_pinconfig(GPIO_BAT_VSENS); - kinetis_pinconfig(GPIO_BAT_ISENS); - kinetis_pinconfig(GPIO_5V_VSENS); - kinetis_pinconfig(GPIO_RSSI_IN); - - /* configure power supply control/sense pins */ - - kinetis_pinconfig(GPIO_SPEKTRUM_P_EN); - -#if 0 - kinetis_pinconfig(GPIO_VDD_BRICK_VALID); - kinetis_pinconfig(GPIO_VDD_SERVO_VALID); - kinetis_pinconfig(GPIO_VDD_5V_HIPOWER_OC); - kinetis_pinconfig(GPIO_VDD_5V_PERIPH_OC); -#endif - - /* configure the GPIO pins to outputs and keep them low */ - kinetis_pinconfig(GPIO_GPIO0_OUTPUT); - kinetis_pinconfig(GPIO_GPIO1_OUTPUT); - kinetis_pinconfig(GPIO_GPIO2_OUTPUT); - kinetis_pinconfig(GPIO_GPIO3_OUTPUT); - kinetis_pinconfig(GPIO_GPIO4_OUTPUT); - kinetis_pinconfig(GPIO_GPIO5_OUTPUT); - kinetis_pinconfig(GPIO_GPIO6_OUTPUT); - kinetis_pinconfig(GPIO_GPIO7_OUTPUT); - kinetis_pinconfig(GPIO_GPIO8_OUTPUT); - kinetis_pinconfig(GPIO_GPIO9_OUTPUT); - kinetis_pinconfig(GPIO_GPIO10_OUTPUT); - kinetis_pinconfig(GPIO_GPIO11_OUTPUT); - kinetis_pinconfig(GPIO_GPIO12_OUTPUT); - kinetis_pinconfig(GPIO_GPIO13_OUTPUT); - - /* Disable Phy for now */ - - kinetis_pinconfig(GPIO_E_RST); - kinetis_pinconfig(GPIO_E_EN); - kinetis_pinconfig(GPIO_E_INH); - kinetis_pinconfig(GPIO_ENET_CONFIG0); - - kinetis_pinconfig(GPIO_CAN0_STB); - kinetis_pinconfig(GPIO_CAN1_STB); - - kinetis_pinconfig(GPIO_ECH); - kinetis_pinconfig(GPIO_TRI); - - kinetis_pinconfig(GPIO_LED_SAFETY); - kinetis_pinconfig(GPIO_BTN_SAFETY); - - kinetis_pinconfig(GPIO_TONE_ALARM_IDLE); - - kinetis_pinconfig(GPIO_NFC_IO); - kinetis_pinconfig(GPIO_SENSOR_P_EN); - - kinetis_pinconfig(GPIO_LED_D9); - kinetis_pinconfig(GPIO_LED_D10); + const uint32_t gpio[] = PX4_GPIO_INIT_LIST; + board_gpio_init(gpio, arraySize(gpio)); nxphlite_timer_initialize(); - /* configure SPI interfaces */ - - nxphlite_spidev_initialize(); } //FIXME: Stubs -----v @@ -332,6 +294,16 @@ static void kinetis_serial_dma_poll(void) __EXPORT int board_app_initialize(uintptr_t arg) { + + VDD_3V3_SD_CARD_EN(true); + VDD_3V3_SENSORS_EN(true); + + /* configure SPI interfaces */ + + nxphlite_spidev_initialize(); + + VDD_ETH_EN(true); + #if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE) /* run C++ ctors before we go any further */ @@ -346,11 +318,6 @@ __EXPORT int board_app_initialize(uintptr_t arg) # error platform is dependent on c++ both CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE must be defined. #endif - /* Release Reset pins on Sensors */ - - kinetis_gpiowrite(GPIO_GM_nRST, 1); - kinetis_gpiowrite(GPIO_A_RST, 0); - param_init(); /* configure the high-resolution time/callout interface */ diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c b/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c index 4a72df6c0a..b402e35d8b 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_sdhc.c @@ -162,6 +162,8 @@ int nxphlite_sdhc_initialize(void) struct nxphlite_sdhc_state_s *sdhc = &g_sdhc; /* Configure GPIO pins */ + VDD_3V3_SD_CARD_EN(true); + kinetis_pinconfig(GPIO_SD_CARDDETECT); /* Attached the card detect interrupt (but don't enable it yet) */ diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_spi.c b/src/drivers/boards/nxphlite-v3/nxphlite_spi.c index a5ed1c6ec8..477fbde066 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_spi.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_spi.c @@ -82,26 +82,81 @@ static const uint32_t spi2selects_gpio[] = PX4_EXTERNAL_BUS_CS_GPIO; __EXPORT void board_spi_reset(int ms) { - /* First float the A_MISO line tied to SA0 */ + /* Goal not to back feed the chips on the bus via IO lines */ - kinetis_pinconfig(PX4_MK_GPIO(PIN_SPI1_SIN, PIN_MODE_ANALOG)); + /* First float the A_MISO line tied to SA0 to ensure SPI Auto selection*/ - /* Power Down and up */ - kinetis_gpiowrite(GPIO_SENSOR_P_EN, true); - up_mdelay(1); - kinetis_gpiowrite(GPIO_SENSOR_P_EN, false); - up_mdelay(1); + kinetis_pinconfig(PX4_MK_GPIO(PIN_SPI1_SIN, GPIO_OPENDRAIN)); + kinetis_gpiowrite(PIN_SPI1_SIN, 1); + + /* Next Change CS to inputs with pull downs */ + + for (unsigned int cs = 0; cs < arraySize(spi1selects_gpio); cs++) { + if (spi1selects_gpio[cs] != 0) { + kinetis_pinconfig(PX4_MK_GPIO(spi1selects_gpio[cs], GPIO_PULLDOWN)); + } + } + + /* Turn all the int inputs to inputs with pull down */ + + kinetis_pinconfig(PX4_MK_GPIO(GPIO_EXTI_GYRO_INT1, GPIO_PULLDOWN)); + kinetis_pinconfig(PX4_MK_GPIO(GPIO_EXTI_GYRO_INT2, GPIO_PULLDOWN)); + kinetis_pinconfig(PX4_MK_GPIO(GPIO_EXTI_ACCEL_MAG_INT1, GPIO_PULLDOWN)); + kinetis_pinconfig(PX4_MK_GPIO(GPIO_EXTI_ACCEL_MAG_INT2, GPIO_PULLDOWN)); + kinetis_pinconfig(PX4_MK_GPIO(GPIO_EXTI_BARO_INT1, GPIO_PULLDOWN)); + kinetis_pinconfig(PX4_MK_GPIO(GPIO_EXTI_BARO_INT2, GPIO_PULLDOWN)); + + /* Drive the Reset Pins LOW + * For the Gyro FXAS21002C this is RESET + * for the Accel FXOS8700CQ this is not RESET */ + + kinetis_gpiowrite(GPIO_GM_nRST, false); + kinetis_gpiowrite(GPIO_A_RST, false); + + /* Power Down The Sensors */ + + VDD_3V3_SENSORS_EN(false); + up_mdelay(ms); + + /* Power Up The Sensors */ + VDD_3V3_SENSORS_EN(true); + up_mdelay(2); + + /* Restore all the CS to ouputs inactive */ + + for (unsigned int cs = 0; cs < arraySize(spi1selects_gpio); cs++) { + if (spi1selects_gpio[cs] != 0) { + kinetis_pinconfig(spi1selects_gpio[cs]); + } + } + + /* Restore all the int inputs to inputs */ + + kinetis_pinconfig(GPIO_EXTI_GYRO_INT1); + kinetis_pinconfig(GPIO_EXTI_GYRO_INT2); + kinetis_pinconfig(GPIO_EXTI_ACCEL_MAG_INT1); + kinetis_pinconfig(GPIO_EXTI_ACCEL_MAG_INT2); + kinetis_pinconfig(GPIO_EXTI_BARO_INT1); + kinetis_pinconfig(GPIO_EXTI_BARO_INT2); /* Set Rests Active */ - kinetis_gpiowrite(GPIO_GM_nRST, false); + /* Accel Assert Reset to reset the FXOS8700CQ */ + /* The Gyro was reset above */ + kinetis_gpiowrite(GPIO_A_RST, true); up_mdelay(ms); + + /* Accel & Gyro release Reset */ + kinetis_gpiowrite(GPIO_A_RST, false); kinetis_gpiowrite(GPIO_GM_nRST, true); - kinetis_pinconfig(PIN_SPI1_SIN); + /* Allow the Accel time to see PIN_SPI1_SIN as a float */ + up_mdelay(2); + + kinetis_pinconfig(PIN_SPI1_SIN); } /************************************************************************************ @@ -116,9 +171,6 @@ void nxphlite_spidev_initialize(void) { board_spi_reset(10); - kinetis_pinconfig(GPIO_EXTI_BARO_INT1); - kinetis_pinconfig(GPIO_P_INT); - for (unsigned int cs = 0; cs < arraySize(spi0selects_gpio); cs++) { if (spi0selects_gpio[cs] != 0) { kinetis_pinconfig(spi0selects_gpio[cs]); diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_timer_config.c b/src/drivers/boards/nxphlite-v3/nxphlite_timer_config.c index 58562dbe75..b76d6f428e 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_timer_config.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_timer_config.c @@ -57,7 +57,7 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { .clock_register = KINETIS_SIM_SCGC6, .clock_bit = SIM_SCGC6_FTM0, .first_channel_index = 0, - .last_channel_index = 5, + .last_channel_index = 3, .handler = io_timer_handler0, .vectorno = KINETIS_IRQ_FTM0, @@ -66,99 +66,71 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { .base = KINETIS_FTM3_BASE, .clock_register = KINETIS_SIM_SCGC3, .clock_bit = SIM_SCGC3_FTM3, - .first_channel_index = 6, - .last_channel_index = 13, + .first_channel_index = 4, + .last_channel_index = 5, .handler = io_timer_handler1, .vectorno = KINETIS_IRQ_FTM3, + }, + { + .base = KINETIS_FTM2_BASE, + .clock_register = KINETIS_SIM_SCGC3, + .clock_bit = SIM_SCGC3_FTM2, + .first_channel_index = 6, + .last_channel_index = 7, + .handler = io_timer_handler2, + .vectorno = KINETIS_IRQ_FTM2, } }; __EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { { - .gpio_out = GPIO_FTM0_CH0OUT, + .gpio_out = GPIO_FTM0_CH0OUT, // FMU_CH1 .gpio_in = GPIO_FTM0_CH0IN, .timer_index = 0, - .timer_channel = 1, + .timer_channel = 1, // physical channel number +1 }, { - .gpio_out = GPIO_FTM0_CH3OUT, + .gpio_out = GPIO_FTM0_CH3OUT, // FMU_CH2 .gpio_in = GPIO_FTM0_CH3IN, .timer_index = 0, .timer_channel = 4, }, { - .gpio_out = GPIO_FTM0_CH4OUT, + .gpio_out = GPIO_FTM0_CH4OUT, // FMU_CH3 .gpio_in = GPIO_FTM0_CH4IN, .timer_index = 0, .timer_channel = 5, }, { - .gpio_out = GPIO_FTM0_CH5OUT, + .gpio_out = GPIO_FTM0_CH5OUT, // FMU_CH4 .gpio_in = GPIO_FTM0_CH5IN, .timer_index = 0, .timer_channel = 6, }, { - .gpio_out = GPIO_FTM0_CH6OUT, - .gpio_in = GPIO_FTM0_CH6IN, - .timer_index = 0, - .timer_channel = 7, - }, - { - .gpio_out = GPIO_FTM0_CH7OUT, - .gpio_in = GPIO_FTM0_CH7IN, - .timer_index = 0, - .timer_channel = 8, - }, - - { - .gpio_out = GPIO_FTM3_CH0OUT, - .gpio_in = GPIO_FTM3_CH0IN, - .timer_index = 1, - .timer_channel = 1, - }, - { - .gpio_out = GPIO_FTM3_CH1OUT, - .gpio_in = GPIO_FTM3_CH1IN, - .timer_index = 1, - .timer_channel = 2, - }, - { - .gpio_out = GPIO_FTM3_CH2OUT, - .gpio_in = GPIO_FTM3_CH2IN, - .timer_index = 1, - .timer_channel = 3, - }, - { - .gpio_out = GPIO_FTM3_CH3OUT, - .gpio_in = GPIO_FTM3_CH3IN, - .timer_index = 1, - .timer_channel = 4, - }, - { - .gpio_out = GPIO_FTM3_CH4OUT, - .gpio_in = GPIO_FTM3_CH4IN, - .timer_index = 1, - .timer_channel = 5, - }, - { - .gpio_out = GPIO_FTM3_CH5OUT, - .gpio_in = GPIO_FTM3_CH5IN, - .timer_index = 1, - .timer_channel = 6, - }, - { - .gpio_out = GPIO_FTM3_CH6OUT, + .gpio_out = GPIO_FTM3_CH6OUT, // FMU_CH5 .gpio_in = GPIO_FTM3_CH6IN, .timer_index = 1, .timer_channel = 7, }, { - .gpio_out = GPIO_FTM3_CH7OUT, + .gpio_out = GPIO_FTM3_CH7OUT, // FMU_CH6 .gpio_in = GPIO_FTM3_CH7IN, .timer_index = 1, .timer_channel = 8, }, + { + .gpio_out = GPIO_FTM3_CH0OUT, // U_TRI + .gpio_in = GPIO_FTM3_CH0IN, + .timer_index = 1, + .timer_channel = 1, + }, + { + .gpio_out = GPIO_FTM2_CH0OUT, + .gpio_in = GPIO_FTM2_CH0IN, // U_ECH + .timer_index = 2, + .timer_channel = 1, + }, }; #define _REG(_addr) (*(volatile uint32_t *)(_addr)) @@ -209,20 +181,25 @@ __EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { #define rPWMLOAD(t) REG(t,KINETIS_FTM_PWMLOAD_OFFSET) #if !defined(BOARD_PWM_SRC_CLOCK_FREQ) -#define BOARD_PWM_SRC_CLOCK_FREQ 4000000 +#define BOARD_PWM_SRC_CLOCK_FREQ 16000000 #endif + __EXPORT void nxphlite_timer_initialize(void) { - /* We will uses FTM2 (CH0) on PTA10 drive FTM_CLKIN0 (PCT12)*/ + + /* Y1 is 16 Mhz used to driver the FTM_CLKIN0 (PCT12) */ - kinetis_pinconfig(PIN_FTM2_CH0_1); + /* Enable PCT12 as FTM_CLKIN0 */ + kinetis_pinconfig(PIN_FTM_CLKIN0_3); + /* Select FTM_CLKIN0 as source for FTM0, FTM2, and FTM3 */ + uint32_t regval = _REG(KINETIS_SIM_SOPT4); - regval &= ~(SIM_SOPT4_FTM0CLKSEL | SIM_SOPT4_FTM3CLKSEL); + regval &= ~(SIM_SOPT4_FTM0CLKSEL | SIM_SOPT4_FTM2CLKSEL | SIM_SOPT4_FTM3CLKSEL); _REG(KINETIS_SIM_SOPT4) = regval; @@ -238,35 +215,4 @@ __EXPORT void nxphlite_timer_initialize(void) regval |= SIM_SCGC3_FTM2 | SIM_SCGC3_FTM3; _REG(KINETIS_SIM_SCGC3) = regval; - - /* disable and configure the FTM2 as - * Bus Clock 56 Mhz - * PS 1 - * MOD 7 for 4 Mhz - */ - - rSC(2) = FTM_SC_CLKS_NONE | FTM_SC_PS_1; - rCNT(2) = 0; - - /* Generate 2 times the Freq */ - - rMOD(2) = (BOARD_BUS_FREQ / (BOARD_PWM_SRC_CLOCK_FREQ * 2)) - 1; - - /* toggle on every compare adds a divide by 2 */ - - rC0SC(2) = (FTM_CSC_CHF | FTM_CSC_MSA | FTM_CSC_ELSA); - - /* Match on the wrap */ - - rC0V(2) = 0; - - /* Set to run in debug mode */ - - rCONF(2) |= FTM_CONF_BDMMODE_MASK; - - /* enable the timer */ - - rSC(2) |= FTM_SC_CLKS_SYSCLK; - - } diff --git a/src/drivers/kinetis/drv_io_timer.c b/src/drivers/kinetis/drv_io_timer.c index 60175c714a..7a0b2dad4e 100644 --- a/src/drivers/kinetis/drv_io_timer.c +++ b/src/drivers/kinetis/drv_io_timer.c @@ -62,24 +62,22 @@ #include "chip/kinetis_sim.h" #include "chip/kinetis_ftm.h" -/* The FTM prescalers are limited to Divide by 2^n where n={1-7} - * Therefore we use the FTM2 CH0 on PTA10 drive FTM_CLKIN0 (PCT12) - * and use this at a 4Mhz clock for FTM0 and FTM3. +/* The FTM pre-scalers are limited to Divide by 2^n where n={1-7} + * Therefore we use Y1 at 16 Mhz to drive FTM_CLKIN0 (PCT12) + * and use this at a 16Mhz clock for FTM0, FTM2 and FTM3. * - * The input frequencies avaialble from FTM2 are 56,28,14,7,3.5 - * So a onshot mode at 8Mhz is not possible. We will use 4Mhz - * - * FTM0 will drive FMU_CH1-6, FTM3 will drive IO_CH1-8 + * FTM0 will drive FMU_CH1-4, FTM3 will drive FMU_CH5,6, and + * U_TRI. FTM2 will be used as input capture on U_ECH */ #if !defined(BOARD_PWM_FREQ) #define BOARD_PWM_FREQ 1000000 #endif #if !defined(BOARD_ONESHOT_FREQ) -#define BOARD_ONESHOT_FREQ 4000000 +#define BOARD_ONESHOT_FREQ 8000000 #endif -#define FTM_SRC_CLOCK_FREQ 4000000 +#define FTM_SRC_CLOCK_FREQ 16000000 #define MAX_CHANNELS_PER_TIMER 8