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https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-04-14 10:07:39 +08:00
feat(boards): add W25N NAND flash support with littlefs
The kakuteh7mini ships with a W25N01GV (1Gbit/128MB) SPI NAND flash on SPI1, but the board init was treating SPI1 as an MMC/SD slot and the W25N driver was not enabled. Enable the chip and use it for logging: - spi.cpp: register the device as SPIDEV_FLASH(0) instead of SPIDEV_MMCSD(0) - init.c: initialize the W25N MTD driver, register /dev/mtd0, mount littlefs at /fs/flash with autoformat, and print the flash geometry on boot for verification. - nuttx defconfig: enable CONFIG_MTD_W25N, CONFIG_FS_LITTLEFS, SPI1 DMA + DMAMUX1, drop the unused RAMTRON config. - board_dma_map.h: define DMAMAP_SPI1_RX/TX for the SPI1 DMA channels. - default.px4board: set CONFIG_BOARD_ROOT_PATH to /fs/flash. - rc.board_defaults: drop the SDLOG_BACKEND=0 override that was disabling logging entirely and the COM_ARM_SDCARD override (the flash logging replaces the need for an SD card). Set SDLOG_MAX_SIZE=30 so a few recent logs fit within the 128 MB flash.
This commit is contained in:
Julian Oes
parent
18493222ed
commit
7f76b71526
@ -1,5 +1,6 @@
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CONFIG_BOARD_TOOLCHAIN="arm-none-eabi"
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CONFIG_BOARD_ARCHITECTURE="cortex-m7"
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CONFIG_BOARD_ROOT_PATH="/fs/flash"
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CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS3"
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CONFIG_BOARD_SERIAL_TEL1="/dev/ttyS0"
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CONFIG_BOARD_SERIAL_TEL2="/dev/ttyS1"
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@ -32,11 +32,10 @@ param set-default CBRK_BUZZER 782090
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param set-default IMU_GYRO_RATEMAX 2000
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# W25N NAND flash with littlefs (128 MB): small log file size so we can keep
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# a few recent logs. Default SDLOG_ROTATE=90 keeps at least 10% free during
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# writing (no bad block management yet, so avoid hammering the flash near full).
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param set-default SDLOG_MAX_SIZE 30
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# Store missions in RAM
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param set-default SYS_DM_BACKEND 1
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# Ignore that there is no SD card
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param set-default COM_ARM_SDCARD 0
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# Disable logging
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param set-default SDLOG_BACKEND 0
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@ -33,6 +33,9 @@
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#pragma once
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#define DMAMAP_SPI1_RX DMAMAP_DMA12_SPI1RX_0 /* DMA1 */
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#define DMAMAP_SPI1_TX DMAMAP_DMA12_SPI1TX_0 /* DMA1 */
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#define DMAMAP_SPI4_RX DMAMAP_DMA12_SPI4RX_1 /* DMA2 */
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#define DMAMAP_SPI4_TX DMAMAP_DMA12_SPI4TX_1 /* DMA2 */
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@ -98,6 +98,10 @@ CONFIG_FDCLONE_STDIO=y
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CONFIG_FS_BINFS=y
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CONFIG_FS_CROMFS=y
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CONFIG_FS_FAT=y
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CONFIG_FS_LITTLEFS=y
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CONFIG_FS_LITTLEFS_CACHE_SIZE_FACTOR=1
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CONFIG_FS_LITTLEFS_PROGRAM_SIZE_FACTOR=1
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CONFIG_FS_LITTLEFS_READ_SIZE_FACTOR=1
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CONFIG_FS_FATTIME=y
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CONFIG_FS_PROCFS=y
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CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y
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@ -126,7 +130,8 @@ CONFIG_MTD=y
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CONFIG_MTD_BYTE_WRITE=y
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CONFIG_MTD_PARTITION=y
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CONFIG_MTD_PROGMEM=y
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CONFIG_MTD_RAMTRON=y
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# CONFIG_MTD_RAMTRON is not set
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CONFIG_MTD_W25N=y
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CONFIG_NAME_MAX=40
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_ARGCAT=y
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@ -135,7 +140,7 @@ CONFIG_NSH_CMDPARMS=y
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CONFIG_NSH_CROMFSETC=y
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CONFIG_NSH_LINELEN=128
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CONFIG_NSH_MAXARGUMENTS=15
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CONFIG_NSH_MMCSDSPIPORTNO=1
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# CONFIG_NSH_MMCSDSPIPORTNO is not set
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CONFIG_NSH_NESTDEPTH=8
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CONFIG_NSH_QUOTE=y
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CONFIG_NSH_ROMFSETC=y
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@ -148,9 +153,6 @@ CONFIG_PREALLOC_TIMERS=50
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CONFIG_PRIORITY_INHERITANCE=y
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CONFIG_PTHREAD_MUTEX_ROBUST=y
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CONFIG_PTHREAD_STACK_MIN=512
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CONFIG_RAMTRON_EMULATE_PAGE_SHIFT=5
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CONFIG_RAMTRON_EMULATE_SECTOR_SHIFT=5
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CONFIG_RAMTRON_SETSPEED=y
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CONFIG_RAM_SIZE=245760
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CONFIG_RAM_START=0x20010000
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CONFIG_RAW_BINARY=y
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@ -188,6 +190,7 @@ CONFIG_STM32H7_BKPSRAM=y
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CONFIG_STM32H7_DMA1=y
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CONFIG_STM32H7_DMA2=y
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CONFIG_STM32H7_DMACAPABLE=y
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CONFIG_STM32H7_DMAMUX1=y
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CONFIG_STM32H7_FLOWCONTROL_BROKEN=y
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CONFIG_STM32H7_I2C1=y
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CONFIG_STM32H7_I2C_DYNTIMEO=y
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@ -201,6 +204,8 @@ CONFIG_STM32H7_SDMMC1=y
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CONFIG_STM32H7_SERIALBRK_BSDCOMPAT=y
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CONFIG_STM32H7_SERIAL_DISABLE_REORDERING=y
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CONFIG_STM32H7_SPI1=y
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CONFIG_STM32H7_SPI1_DMA=y
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CONFIG_STM32H7_SPI1_DMA_BUFFER=4096
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CONFIG_STM32H7_SPI2=y
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CONFIG_STM32H7_SPI4=y
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CONFIG_STM32H7_SPI4_DMA=y
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@ -244,4 +249,5 @@ CONFIG_USBDEV=y
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CONFIG_USBDEV_BUSPOWERED=y
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CONFIG_USBDEV_MAXPOWER=500
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CONFIG_USEC_PER_TICK=1000
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CONFIG_W25N_SPIFREQUENCY=104000000
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CONFIG_WATCHDOG=y
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@ -59,6 +59,8 @@
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#include <nuttx/spi/spi.h>
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#include <nuttx/analog/adc.h>
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#include <nuttx/mm/gran.h>
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#include <nuttx/mtd/mtd.h>
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#include <nuttx/fs/fs.h>
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#include <chip.h>
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#include <stm32_uart.h>
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#include <arch/board/board.h>
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@ -231,15 +233,58 @@ __EXPORT int board_app_initialize(uintptr_t arg)
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led_on(LED_RED);
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}
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// MARK: this will *not* work as the minis have a W25N NAND flash chip
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/* Get the SPI port for the microSD slot */
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struct spi_dev_s *spi_dev = stm32_spibus_initialize(CONFIG_NSH_MMCSDSPIPORTNO);
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#ifdef CONFIG_MTD_W25N
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/* Initialize W25N01GV NAND Flash on SPI1 */
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struct spi_dev_s *spi1 = stm32_spibus_initialize(1);
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if (!spi_dev) {
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syslog(LOG_ERR, "[boot] FAILED to initialize SPI port %d\n", CONFIG_NSH_MMCSDSPIPORTNO);
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led_on(LED_BLUE);
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if (!spi1) {
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syslog(LOG_ERR, "[boot] FAILED to initialize SPI1 for W25N\n");
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led_on(LED_RED);
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} else {
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struct mtd_dev_s *mtd = w25n_initialize(spi1, 0);
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if (!mtd) {
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syslog(LOG_ERR, "[boot] FAILED to initialize W25N MTD driver\n");
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led_on(LED_RED);
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} else {
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int ret = register_mtddriver("/dev/mtd0", mtd, 0755, NULL);
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if (ret < 0) {
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syslog(LOG_ERR, "[boot] FAILED to register MTD driver: %d\n", ret);
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led_on(LED_RED);
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} else {
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syslog(LOG_INFO, "[boot] W25N MTD registered at /dev/mtd0\n");
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struct mtd_geometry_s geo;
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if (mtd->ioctl(mtd, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo)) == 0) {
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syslog(LOG_INFO, "[boot] W25N: %lu erase blocks, %lu bytes/block, %lu total bytes\n",
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(unsigned long)geo.neraseblocks,
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(unsigned long)geo.erasesize,
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(unsigned long)geo.neraseblocks * (unsigned long)geo.erasesize);
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}
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#ifdef CONFIG_FS_LITTLEFS
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ret = nx_mount("/dev/mtd0", CONFIG_BOARD_ROOT_PATH, "littlefs", 0, "autoformat");
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if (ret < 0) {
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syslog(LOG_ERR, "[boot] FAILED to mount littlefs: %d\n", ret);
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led_on(LED_RED);
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} else {
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syslog(LOG_INFO, "[boot] LittleFS mounted at %s\n", CONFIG_BOARD_ROOT_PATH);
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}
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#endif
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}
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}
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}
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#endif
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up_udelay(20);
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#if defined(FLASH_BASED_PARAMS)
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@ -37,7 +37,7 @@
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constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = {
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initSPIBus(SPI::Bus::SPI1, {
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initSPIDevice(SPIDEV_MMCSD(0), SPI::CS{GPIO::PortA, GPIO::Pin4})
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initSPIDevice(SPIDEV_FLASH(0), SPI::CS{GPIO::PortA, GPIO::Pin4}) // W25N01GV NAND Flash
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}),
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initSPIBus(SPI::Bus::SPI2, {
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initSPIDevice(DRV_OSD_DEVTYPE_ATXXXX, SPI::CS{GPIO::PortB, GPIO::Pin12}),
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