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tap: add landing gear capability

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This configures the PWM output for the landing gear.
This commit is contained in:
Julian Oes
2016-10-20 23:17:05 +02:00
committed by Lorenz Meier
parent 2fff2ab9ac
commit 78b0d1a01f
10 changed files with 100 additions and 88 deletions
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src/drivers/stm32/drv_io_timer.c
+11 -1
View File
@@ -394,7 +394,7 @@ static int timer_set_rate(unsigned timer, unsigned rate)
}
static int io_timer_init_timer(unsigned timer)
int io_timer_init_timer(unsigned timer)
{
/* Do this only once per timer */
@@ -708,6 +708,10 @@ int io_timer_set_ccr(unsigned channel, uint16_t value)
} else {
/* configure the channel */
#ifdef BOARD_PWM_DRIVE_ACTIVE_LOW
unsigned period = rARR(channels_timer(channel));
value = period - value;
#endif
if (value > 0) {
value--;
@@ -727,6 +731,12 @@ uint16_t io_channel_get_ccr(unsigned channel)
if (io_timer_validate_channel_index(channel) == 0 &&
io_timer_get_channel_mode(channel) == IOTimerChanMode_PWMOut) {
value = REG(channels_timer(channel), timer_io_channels[channel].ccr_offset) + 1;
#ifdef BOARD_PWM_DRIVE_ACTIVE_LOW
unsigned period = rARR(channels_timer(channel));
value = period - value;
#endif
}
return value;
src/drivers/stm32/drv_io_timer.h
+3
View File
@@ -106,6 +106,9 @@ __EXPORT int io_timer_handler3(int irq, void *context);
__EXPORT int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode,
channel_handler_t channel_handler, void *context);
__EXPORT int io_timer_init_timer(unsigned timer);
__EXPORT int io_timer_set_rate(unsigned timer, unsigned rate);
__EXPORT int io_timer_set_enable(bool state, io_timer_channel_mode_t mode,
io_timer_channel_allocation_t masks);
src/drivers/stm32/drv_led_pwm.cpp
+4 -48
View File
@@ -85,8 +85,9 @@
#define rDMAR(_tmr) REG(_tmr, STM32_GTIM_DMAR_OFFSET)
#define rBDTR(_tmr) REG(_tmr, STM32_ATIM_BDTR_OFFSET)
static void led_pwm_timer_init(unsigned timer);
static void led_pwm_timer_set_rate(unsigned timer, unsigned rate);
extern int io_timer_init_timer(unsigned timer);
static void led_pwm_channel_init(unsigned channel);
int led_pwm_servo_set(unsigned channel, uint8_t value);
@@ -97,56 +98,11 @@ void led_pwm_servo_arm(bool armed);
unsigned led_pwm_timer_get_period(unsigned timer);
static void
led_pwm_timer_init(unsigned timer)
{
/* valid Timer */
if (led_pwm_timers[timer].base != 0) {
/* enable the timer clock before we try to talk to it */
modifyreg32(led_pwm_timers[timer].clock_register, 0, led_pwm_timers[timer].clock_bit);
/* disable and configure the timer */
rCR1(timer) = 0;
rCR2(timer) = 0;
rSMCR(timer) = 0;
rDIER(timer) = 0;
rCCER(timer) = 0;
rCCMR1(timer) = 0;
rCCMR2(timer) = 0;
rCCER(timer) = 0;
rDCR(timer) = 0;
if ((led_pwm_timers[timer].base == STM32_TIM1_BASE) || (led_pwm_timers[timer].base == STM32_TIM8_BASE)) {
/* master output enable = on */
rBDTR(timer) = ATIM_BDTR_MOE;
}
/* configure the timer to free-run at 1MHz */
rPSC(timer) = (led_pwm_timers[timer].clock_freq / 1000000) - 1;
/* default to updating at 50Hz */
led_pwm_timer_set_rate(timer, 50);
/* note that the timer is left disabled - arming is performed separately */
}
}
unsigned
led_pwm_timer_get_period(unsigned timer)
{
return (rARR(timer));
}
static void
led_pwm_timer_set_rate(unsigned timer, unsigned rate)
{
/* configure the timer to update at the desired rate */
rARR(timer) = 1000000 / rate;
/* generate an update event; reloads the counter and all registers */
rEGR(timer) = GTIM_EGR_UG;
}
static void
@@ -277,7 +233,7 @@ led_pwm_servo_init(void)
{
/* do basic timer initialisation first */
for (unsigned i = 0; i < arraySize(led_pwm_timers); i++) {
led_pwm_timer_init(i);
io_timer_init_timer(i);
}
/* now init channels */