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boards: mro_ctrl-zero-classic updates to sync with ctrl-zero-h7-oem

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This commit is contained in:
Daniel Agar
2022-04-30 09:40:52 -04:00
parent 6fc857772d
commit 7784cd1f40
10 changed files with 35 additions and 49 deletions
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Makefile
+1 -1
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@@ -330,7 +330,7 @@ px4io_update: px4_io-v2_default cubepilot_io-v2_default
cp build/cubepilot_io-v2_default/cubepilot_io-v2_default.bin boards/cubepilot/cubeyellow/extras/cubepilot_io-v2_default.bin cp build/cubepilot_io-v2_default/cubepilot_io-v2_default.bin boards/cubepilot/cubeyellow/extras/cubepilot_io-v2_default.bin
git status git status
bootloaders_update: cuav_nora_bootloader cuav_x7pro_bootloader cubepilot_cubeorange_bootloader holybro_durandal-v1_bootloader matek_h743-slim_bootloader modalai_fc-v2_bootloader mro_ctrl-zero-h7_bootloader mro_ctrl-zero-h7-oem_bootloader mro_pixracerpro_bootloader px4_fmu-v6u_bootloader px4_fmu-v6x_bootloader bootloaders_update: cuav_nora_bootloader cuav_x7pro_bootloader cubepilot_cubeorange_bootloader holybro_durandal-v1_bootloader matek_h743-slim_bootloader modalai_fc-v2_bootloader mro_ctrl-zero-classic_bootloader mro_ctrl-zero-h7_bootloader mro_ctrl-zero-h7-oem_bootloader mro_pixracerpro_bootloader px4_fmu-v6u_bootloader px4_fmu-v6x_bootloader
git status git status
.PHONY: coverity_scan .PHONY: coverity_scan
boards/mro/ctrl-zero-classic/default.px4board
+4 -6
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@@ -39,6 +39,7 @@ CONFIG_MODULES_ATTITUDE_ESTIMATOR_Q=y
CONFIG_MODULES_BATTERY_STATUS=y CONFIG_MODULES_BATTERY_STATUS=y
CONFIG_MODULES_CAMERA_FEEDBACK=y CONFIG_MODULES_CAMERA_FEEDBACK=y
CONFIG_MODULES_COMMANDER=y CONFIG_MODULES_COMMANDER=y
CONFIG_MODULES_CONTROL_ALLOCATOR=y
CONFIG_MODULES_DATAMAN=y CONFIG_MODULES_DATAMAN=y
CONFIG_MODULES_EKF2=y CONFIG_MODULES_EKF2=y
CONFIG_MODULES_ESC_BATTERY=y CONFIG_MODULES_ESC_BATTERY=y
@@ -55,14 +56,13 @@ CONFIG_MODULES_LOAD_MON=y
CONFIG_MODULES_LOCAL_POSITION_ESTIMATOR=y CONFIG_MODULES_LOCAL_POSITION_ESTIMATOR=y
CONFIG_MODULES_LOGGER=y CONFIG_MODULES_LOGGER=y
CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y CONFIG_MODULES_MAG_BIAS_ESTIMATOR=y
CONFIG_MODULES_MAVLINK=y
CONFIG_MODULES_MANUAL_CONTROL=y CONFIG_MODULES_MANUAL_CONTROL=y
CONFIG_MODULES_MAVLINK=y
CONFIG_MODULES_MC_ATT_CONTROL=y CONFIG_MODULES_MC_ATT_CONTROL=y
CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y
CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y
CONFIG_MODULES_MC_POS_CONTROL=y CONFIG_MODULES_MC_POS_CONTROL=y
CONFIG_MODULES_MC_RATE_CONTROL=y CONFIG_MODULES_MC_RATE_CONTROL=y
CONFIG_MODULES_CONTROL_ALLOCATOR=y
CONFIG_MODULES_NAVIGATOR=y CONFIG_MODULES_NAVIGATOR=y
CONFIG_MODULES_RC_UPDATE=y CONFIG_MODULES_RC_UPDATE=y
CONFIG_MODULES_ROVER_POS_CONTROL=y CONFIG_MODULES_ROVER_POS_CONTROL=y
@@ -71,20 +71,18 @@ CONFIG_MODULES_SIH=y
CONFIG_MODULES_TEMPERATURE_COMPENSATION=y CONFIG_MODULES_TEMPERATURE_COMPENSATION=y
CONFIG_MODULES_UUV_ATT_CONTROL=y CONFIG_MODULES_UUV_ATT_CONTROL=y
CONFIG_MODULES_UUV_POS_CONTROL=y CONFIG_MODULES_UUV_POS_CONTROL=y
CONFIG_MODULES_VMOUNT=y CONFIG_MODULES_GIMBAL=y
CONFIG_MODULES_VTOL_ATT_CONTROL=y CONFIG_MODULES_VTOL_ATT_CONTROL=y
CONFIG_SYSTEMCMDS_BL_UPDATE=y
CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y CONFIG_SYSTEMCMDS_ACTUATOR_TEST=y
CONFIG_SYSTEMCMDS_BL_UPDATE=y
CONFIG_SYSTEMCMDS_DMESG=y CONFIG_SYSTEMCMDS_DMESG=y
CONFIG_SYSTEMCMDS_DUMPFILE=y CONFIG_SYSTEMCMDS_DUMPFILE=y
CONFIG_SYSTEMCMDS_ESC_CALIB=y
CONFIG_SYSTEMCMDS_GPIO=y CONFIG_SYSTEMCMDS_GPIO=y
CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y CONFIG_SYSTEMCMDS_HARDFAULT_LOG=y
CONFIG_SYSTEMCMDS_I2CDETECT=y CONFIG_SYSTEMCMDS_I2CDETECT=y
CONFIG_SYSTEMCMDS_LED_CONTROL=y CONFIG_SYSTEMCMDS_LED_CONTROL=y
CONFIG_SYSTEMCMDS_MFT=y CONFIG_SYSTEMCMDS_MFT=y
CONFIG_SYSTEMCMDS_MIXER=y CONFIG_SYSTEMCMDS_MIXER=y
CONFIG_SYSTEMCMDS_MOTOR_RAMP=y
CONFIG_SYSTEMCMDS_MOTOR_TEST=y CONFIG_SYSTEMCMDS_MOTOR_TEST=y
CONFIG_SYSTEMCMDS_MTD=y CONFIG_SYSTEMCMDS_MTD=y
CONFIG_SYSTEMCMDS_NSHTERM=y CONFIG_SYSTEMCMDS_NSHTERM=y
boards/mro/ctrl-zero-classic/extras/mro_ctrl-zero-classic_bootloader.bin
Executable
BIN
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boards/mro/ctrl-zero-classic/init/rc.board_defaults
+1 -2
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@@ -4,7 +4,6 @@
#------------------------------------------------------------------------------ #------------------------------------------------------------------------------
param set-default BAT1_V_DIV 10.1 param set-default BAT1_V_DIV 10.1
param set-default BAT1_A_PER_V 24 param set-default BAT1_A_PER_V 17
safety_button start safety_button start
boards/mro/ctrl-zero-classic/nuttx-config/bootloader/defconfig
+3 -2
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@@ -11,11 +11,11 @@
# CONFIG_STM32H7_SYSCFG is not set # CONFIG_STM32H7_SYSCFG is not set
CONFIG_ARCH="arm" CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD_CUSTOM=y CONFIG_ARCH_BOARD_CUSTOM=y
CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/mro/ctrl-zero-classic/nuttx-config"
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
CONFIG_ARCH_CHIP="stm32h7" CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743ZIT6=y CONFIG_ARCH_CHIP_STM32H743II=y
CONFIG_ARCH_CHIP_STM32H7=y CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_INTERRUPTSTACK=512 CONFIG_ARCH_INTERRUPTSTACK=512
CONFIG_ARMV7M_BASEPRI_WAR=y CONFIG_ARMV7M_BASEPRI_WAR=y
@@ -29,6 +29,7 @@ CONFIG_BOARD_LOOPSPERMSEC=95150
CONFIG_BOARD_RESET_ON_ASSERT=2 CONFIG_BOARD_RESET_ON_ASSERT=2
CONFIG_C99_BOOL8=y CONFIG_C99_BOOL8=y
CONFIG_CDCACM=y CONFIG_CDCACM=y
CONFIG_CDCACM_IFLOWCONTROL=y
CONFIG_CDCACM_PRODUCTID=0x1022 CONFIG_CDCACM_PRODUCTID=0x1022
CONFIG_CDCACM_PRODUCTSTR="PX4 BL mRo ControlZero Classic" CONFIG_CDCACM_PRODUCTSTR="PX4 BL mRo ControlZero Classic"
CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_RXBUFSIZE=600
boards/mro/ctrl-zero-classic/nuttx-config/include/board.h
+21 -20
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@@ -222,34 +222,35 @@
/* UART/USART */ /* UART/USART */
#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */ #define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */ #define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2 /* PD4 */ #define GPIO_USART2_CTS GPIO_USART2_CTS_NSS_2 /* PD3 */
#define GPIO_USART2_CTS GPIO_USART2_CTS_NSS_2 /* PD3 */ #define GPIO_USART2_RTS GPIO_USART2_RTS_2 /* PD4 */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */ #define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */ #define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */ #define GPIO_USART3_CTS GPIO_USART3_CTS_NSS_2 /* PD11 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_NSS_2 /* PD11 */ #define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */
#define GPIO_UART4_RX GPIO_UART4_RX_1 /* PA1 */ #define GPIO_UART4_TX GPIO_UART4_TX_2 /* PA0 */
#define GPIO_UART4_TX GPIO_UART4_TX_1 /* PA0 */ #define GPIO_UART4_RX GPIO_UART4_RX_2 /* PA1 */
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */ #define GPIO_USART6_TX 0 /* USART6 is RX-only */
#define GPIO_USART6_TX GPIO_USART6_TX_2 /* PG14 */ #define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
#define GPIO_UART7_RX GPIO_UART7_RX_1 /* PE7 */ #define GPIO_UART7_TX GPIO_UART7_TX_3 /* PE8 */
#define GPIO_UART7_TX GPIO_UART7_TX_1 /* PE8 */ #define GPIO_UART7_RX GPIO_UART7_RX_3 /* PE7 */
#define GPIO_UART8_RX GPIO_UART8_RX_1 /* PE0 */ #define GPIO_UART8_TX GPIO_UART8_TX_1 /* PE1 */
#define GPIO_UART8_TX GPIO_UART8_TX_1 /* PE1 */ #define GPIO_UART8_RX GPIO_UART8_RX_1 /* PE0 */
/* CAN */ /* CAN */
#define GPIO_CAN1_RX GPIO_CAN1_RX_3 /* PD0 */ #define GPIO_CAN1_RX GPIO_CAN1_RX_3 /* PD0 */
#define GPIO_CAN1_TX GPIO_CAN1_TX_3 /* PD1 */ #define GPIO_CAN1_TX GPIO_CAN1_TX_3 /* PD1 */
#define GPIO_CAN2_RX GPIO_CAN2_RX_1 /* PB12 */
#define GPIO_CAN2_TX GPIO_CAN2_TX_1 /* PB13 */ #define GPIO_CAN2_RX GPIO_CAN2_RX_1 /* PB12 */
#define GPIO_CAN2_TX GPIO_CAN2_TX_1 /* PB13 */
/* SPI */ /* SPI */
boards/mro/ctrl-zero-classic/nuttx-config/nsh/defconfig
+4 -3
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@@ -28,7 +28,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR="../../../../boards/mro/ctrl-zero-classic/nuttx-con
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
CONFIG_ARCH_CHIP="stm32h7" CONFIG_ARCH_CHIP="stm32h7"
CONFIG_ARCH_CHIP_STM32H743ZIT6=y CONFIG_ARCH_CHIP_STM32H743II=y
CONFIG_ARCH_CHIP_STM32H7=y CONFIG_ARCH_CHIP_STM32H7=y
CONFIG_ARCH_INTERRUPTSTACK=512 CONFIG_ARCH_INTERRUPTSTACK=512
CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH_STACKDUMP=y
@@ -38,6 +38,7 @@ CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_MEMCPY=y CONFIG_ARMV7M_MEMCPY=y
CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_ARM_MPU_EARLY_RESET=y
CONFIG_BOARDCTL_RESET=y CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_CRASHDUMP=y CONFIG_BOARD_CRASHDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=95150 CONFIG_BOARD_LOOPSPERMSEC=95150
@@ -45,6 +46,7 @@ CONFIG_BOARD_RESET_ON_ASSERT=2
CONFIG_BUILTIN=y CONFIG_BUILTIN=y
CONFIG_C99_BOOL8=y CONFIG_C99_BOOL8=y
CONFIG_CDCACM=y CONFIG_CDCACM=y
CONFIG_CDCACM_IFLOWCONTROL=y
CONFIG_CDCACM_PRODUCTID=0x1022 CONFIG_CDCACM_PRODUCTID=0x1022
CONFIG_CDCACM_PRODUCTSTR="mRoControlZero Classic" CONFIG_CDCACM_PRODUCTSTR="mRoControlZero Classic"
CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_RXBUFSIZE=600
@@ -73,6 +75,7 @@ CONFIG_FS_FAT=y
CONFIG_FS_FATTIME=y CONFIG_FS_FATTIME=y
CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y CONFIG_FS_PROCFS_INCLUDE_PROGMEM=y
CONFIG_FS_PROCFS_MAX_TASKS=64
CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y CONFIG_FS_ROMFS=y
CONFIG_GRAN=y CONFIG_GRAN=y
@@ -85,10 +88,8 @@ CONFIG_IDLETHREAD_STACKSIZE=750
CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_LIBC_LONG_LONG=y CONFIG_LIBC_LONG_LONG=y
CONFIG_LIBC_STRERROR=y CONFIG_LIBC_STRERROR=y
CONFIG_FS_PROCFS_MAX_TASKS=64
CONFIG_MEMSET_64BIT=y CONFIG_MEMSET_64BIT=y
CONFIG_MEMSET_OPTSPEED=y CONFIG_MEMSET_OPTSPEED=y
CONFIG_MKFATFS_BUFFER_ALIGMENT=32
CONFIG_MMCSD=y CONFIG_MMCSD=y
CONFIG_MMCSD_SDIO=y CONFIG_MMCSD_SDIO=y
CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y
boards/mro/ctrl-zero-classic/nuttx-config/scripts/script.ld
-1
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@@ -199,7 +199,6 @@ SECTIONS
} > AXI_SRAM } > AXI_SRAM
/* Emit the the D3 power domain section for locating BDMA data */ /* Emit the the D3 power domain section for locating BDMA data */
.sram4_reserve (NOLOAD) : .sram4_reserve (NOLOAD) :
{ {
*(.sram4) *(.sram4)
boards/mro/ctrl-zero-classic/src/board_config.h
+1 -2
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@@ -156,9 +156,8 @@
#define BOARD_HAS_STATIC_MANIFEST 1 #define BOARD_HAS_STATIC_MANIFEST 1
#define BOARD_NUM_IO_TIMERS 3 #define BOARD_NUM_IO_TIMERS 4
#define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5, 6, 7};
#define BOARD_ENABLE_CONSOLE_BUFFER #define BOARD_ENABLE_CONSOLE_BUFFER
boards/mro/ctrl-zero-classic/src/init.c
-12
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@@ -123,16 +123,6 @@ __EXPORT void board_on_reset(int status)
************************************************************************************/ ************************************************************************************/
__EXPORT void stm32_boardinitialize(void) __EXPORT void stm32_boardinitialize(void)
{ {
// clear all existing MPU configuration from bootloader
for (int region = 0; region < CONFIG_ARM_MPU_NREGIONS; region++) {
putreg32(region, MPU_RNR);
putreg32(0, MPU_RBAR);
putreg32(0, MPU_RASR);
// save
putreg32(0, MPU_CTRL);
}
/* Reset PWM first thing */ /* Reset PWM first thing */
board_on_reset(-1); board_on_reset(-1);
@@ -196,12 +186,10 @@ __EXPORT int board_app_initialize(uintptr_t arg)
if (!sdio_dev) { if (!sdio_dev) {
syslog(LOG_ERR, "[boot] Failed to initialize SDIO slot %d\n", 0); syslog(LOG_ERR, "[boot] Failed to initialize SDIO slot %d\n", 0);
return ERROR;
} }
if (mmcsd_slotinitialize(0, sdio_dev) != OK) { if (mmcsd_slotinitialize(0, sdio_dev) != OK) {
syslog(LOG_ERR, "[boot] Failed to bind SDIO to the MMC/SD driver\n"); syslog(LOG_ERR, "[boot] Failed to bind SDIO to the MMC/SD driver\n");
return ERROR;
} }
/* Assume that the SD card is inserted. What choice do we have? */ /* Assume that the SD card is inserted. What choice do we have? */