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STM32 SDIO DMA setup was losing DMA priority
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@5019 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
@@ -3144,3 +3144,6 @@
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Ethernet (contributed by Max Holtzberg).
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Ethernet (contributed by Max Holtzberg).
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* configs/olimex-stm32-p107: Add board support for the Olimiex STM32-P107
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* configs/olimex-stm32-p107: Add board support for the Olimiex STM32-P107
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board (contributed by Max Holtzberg).
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board (contributed by Max Holtzberg).
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* arch/arm/src/stm32/stm32f2xx_dma.c, stm32f4xx_dma.c, stm32_serial.c, and
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stm32_spic.c: DMA priority was getting zeroed by STM32 F2/F4 DMA drivers
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so that all DMAs ran at the lowest priority.
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@@ -132,6 +132,30 @@
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*/
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*/
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# define RXDMA_BUFFER_SIZE 32
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# define RXDMA_BUFFER_SIZE 32
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/* DMA priority */
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# ifndef CONFIG_USART_DMAPRIO
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# if defined(CONFIG_STM32_STM32F10XX)
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# define CONFIG_USART_DMAPRIO DMA_CCR_PRIMED
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# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define CONFIG_USART_DMAPRIO DMA_SCR_PRIMED
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# else
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# error "Unknown STM32 DMA"
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# endif
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# endif
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# if defined(CONFIG_STM32_STM32F10XX)
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# if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
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# error "Illegal value for CONFIG_USART_DMAPRIO"
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# endif
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# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# if (CONFIG_USART_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
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# error "Illegal value for CONFIG_USART_DMAPRIO"
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# endif
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# else
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# error "Unknown STM32 DMA"
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# endif
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#endif
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#endif
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/* Power management definitions */
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/* Power management definitions */
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@@ -975,6 +999,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
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DMA_SCR_MINC |
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DMA_SCR_MINC |
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DMA_SCR_PSIZE_8BITS |
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DMA_SCR_PSIZE_8BITS |
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DMA_SCR_MSIZE_8BITS |
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DMA_SCR_MSIZE_8BITS |
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CONFIG_USART_DMAPRIO |
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DMA_SCR_PBURST_SINGLE |
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DMA_SCR_PBURST_SINGLE |
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DMA_SCR_MBURST_SINGLE);
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DMA_SCR_MBURST_SINGLE);
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@@ -88,18 +88,47 @@
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* Definitions
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* Definitions
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************************************************************************************/
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* Configuration ********************************************************************/
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/* SPI interrupts */
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#ifdef CONFIG_STM32_SPI_INTERRUPTS
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#ifdef CONFIG_STM32_SPI_INTERRUPTS
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# error "Interrupt driven SPI not yet supported"
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# error "Interrupt driven SPI not yet supported"
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#endif
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#endif
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/* Can't have both interrupt driven SPI and SPI DMA */
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#if defined(CONFIG_STM32_SPI_INTERRUPTS) && defined(CONFIG_STM32_SPI_DMA)
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#if defined(CONFIG_STM32_SPI_INTERRUPTS) && defined(CONFIG_STM32_SPI_DMA)
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# error "Cannot enable both interrupt mode and DMA mode for SPI"
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# error "Cannot enable both interrupt mode and DMA mode for SPI"
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#endif
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#endif
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/* DMA channel configuration */
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/* SPI DMA priority */
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#define SPI_DMA_PRIO DMA_CCR_PRIMED /* Check this to alter priority */
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#ifdef CONFIG_STM32_SPI_DMA
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# if defined(CONFIG_SPI_DMAPRIO)
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# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO
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# elif defined(CONFIG_STM32_STM32F10XX)
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# define SPI_DMA_PRIO DMA_CCR_PRIMED
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# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define SPI_DMA_PRIO DMA_SCR_PRIMED
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# else
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# error "Unknown STM32 DMA"
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# endif
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# if defined(CONFIG_STM32_STM32F10XX)
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# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0
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# error "Illegal value for CONFIG_SPI_DMAPRIO"
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# endif
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# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
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# error "Illegal value for CONFIG_SPI_DMAPRIO"
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# endif
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# else
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# error "Unknown STM32 DMA"
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# endif
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#endif
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/* DMA channel configuration */
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#define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
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#define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
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#define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )
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#define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )
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@@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
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regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
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regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
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regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|
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DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK|
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_DBM|DMA_SCR_CIRC|
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DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK|
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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regval |= scr;
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regval |= scr;
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dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;
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dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;
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@@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
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regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
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regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
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regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|
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DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK|
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
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DMA_SCR_DBM|DMA_SCR_CIRC|
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DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK|
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
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regval |= scr;
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regval |= scr;
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dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;
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dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;
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