mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-10-28 11:03:34 +08:00
InvenSense ICM20602 and ICM20608-G: new standalone optimized drivers
- uses the FIFO and SPI DMA to transfer full raw data (8 kHz gyro, 4 kHz accel)
- new sensor messages for better visibility
- sensor_{accel, gyro}_fifo: full raw data for optional logging and analysis
- sensor_{accel, gyro}_status: metadata, clipping, etc
- currently not enabled by default
This commit is contained in:
@@ -53,7 +53,7 @@ px4_add_board(
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#pca9685
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#protocol_splitter
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#pwm_input
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pwm_out_sim
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#pwm_out_sim
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px4fmu
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px4io
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#roboclaw
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@@ -28,6 +28,8 @@ px4_add_board(
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imu/adis16448
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imu/adis16477
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imu/adis16497
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imu/invensense/icm20602
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imu/invensense/icm20608-g
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imu/mpu6000
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imu/mpu9250
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irlock
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@@ -49,5 +49,9 @@ then
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mpu6000 -R 2 -T 20608 start
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fi
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# new sensor drivers (in testing)
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#icm20602 -R 8 start
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#icm20608g -R 8 start
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# mpu9250 internal SPI bus mpu9250 is rotated 90 deg yaw
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mpu9250 -R 2 start
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@@ -40,6 +40,7 @@
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include "board_dma_map.h"
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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@@ -195,17 +196,6 @@
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# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA Channl/Stream Selections *****************************************************/
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/* Stream selections are arbitrary for now but might become important in the future
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* is we set aside more DMA channels/streams.
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*
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* SDIO DMA
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* DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
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* DMAMAP_SDIO_2 = Channel 4, Stream 6
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*/
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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/* Alternate function pin selections ************************************************/
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/*
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@@ -235,9 +225,6 @@
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/* UART8 has no alternate pin config */
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/* UART RX DMA configurations */
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 /*DMA2 Stream 2*/
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 /*DMA2 Stream 1*/
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/*
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* CAN
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@@ -0,0 +1,23 @@
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#pragma once
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/* DMA Channel/Stream Selections
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*
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* DMAMAP_USART3_RX = DMA1, Stream 1, Channel 4
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* DMAMAP_UART4_RX = DMA1, Stream 2, Channel 4
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* DMAMAP_UART7_RX = DMA1, Stream 3, Channel 5
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* DMAMAP_USART2_RX = DMA1, Stream 5, Channel 4
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* DMAMAP_TIM4_UP = DMA1, Stream 6, Channel 2
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*
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* DMAMAP_SPI1_RX_1 = DMA2, Stream 0, Channel 3
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* DMAMAP_USART6_RX_1 = DMA2, Stream 1, Channel 4
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* DMAMAP_USART1_RX_1 = DMA2, Stream 2, Channel 4
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* DMAMAP_SPI1_TX_1 = DMA2, Stream 3, Channel 3
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* DMAMAP_TIM1_UP = DMA2, Stream 5, Channel 6
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* DMAMAP_SDIO_2 = DMA2, Stream 6, Channel 4
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*/
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#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1
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#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1
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#define DMAMAP_SDIO DMAMAP_SDIO_2
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@@ -186,8 +186,10 @@ CONFIG_STM32_SDIO_CARD=y
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CONFIG_STM32_SERIALBRK_BSDCOMPAT=y
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CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
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CONFIG_STM32_SPI1=y
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CONFIG_STM32_SPI1_DMA=y
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CONFIG_STM32_SPI2=y
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CONFIG_STM32_SPI4=y
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CONFIG_STM32_SPI_DMA=y
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CONFIG_STM32_TIM10=y
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CONFIG_STM32_TIM11=y
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CONFIG_STM32_TIM1=y
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@@ -187,8 +187,10 @@ CONFIG_STM32_SDIO_CARD=y
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CONFIG_STM32_SERIALBRK_BSDCOMPAT=y
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CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
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CONFIG_STM32_SPI1=y
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CONFIG_STM32_SPI1_DMA=y
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CONFIG_STM32_SPI2=y
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CONFIG_STM32_SPI4=y
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CONFIG_STM32_SPI_DMA=y
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CONFIG_STM32_TIM10=y
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CONFIG_STM32_TIM11=y
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CONFIG_STM32_TIM1=y
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@@ -76,7 +76,6 @@
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* PE15 HMC5983 PE12
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* ---- ----------------------------------------------- -----
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*/
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#define GPIO_SPI1_CS_PORTC_PIN2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN2)
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#define GPIO_SPI1_CS_PORTC_PIN15 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN15)
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#define GPIO_SPI1_CS_PORTE_PIN15 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15)
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@@ -325,7 +324,7 @@
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs. */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1008) // 5120 fat + 512 + 1008 spi
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#define BOARD_HAS_ON_RESET 1
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@@ -30,6 +30,8 @@ px4_add_board(
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#imu # all available imu drivers
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imu/mpu6000
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imu/mpu9250
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imu/invensense/icm20602
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imu/invensense/icm20608-g
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irlock
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lights/blinkm
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lights/rgbled
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@@ -36,24 +36,21 @@
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*
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************************************************************************************/
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#ifndef __NUTTX_CONFIG_PX4FMUV4_PRO_INCLUDE_BOARD_H
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#define __NUTTX_CONFIG_PX4FMUV4_PRO_INCLUDE_BOARD_H
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#ifndef __ARCH_BOARD_BOARD_H
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#define __ARCH_BOARD_BOARD_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include "board_dma_map.h"
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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#include <stm32.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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@@ -201,7 +198,7 @@
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* to service FIFOs in interrupt driven mode. These values have not been
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* tuned!!!
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*
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* SDIOCLK =48MHz, SDMMC_CK=SDIOCLK/(118+2)=400 KHz
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* SDIOCLK=48MHz, SDMMC_CK=SDIOCLK/(118+2)=400 KHz
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*/
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/* Use the Falling edge of the SDIO_CLK clock to change the edge the
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@@ -210,16 +207,16 @@
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#define SDIO_CLKCR_EDGE SDIO_CLKCR_NEGEDGE
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#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
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#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
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/* DMA ON: SDIOCLK=48MHz, SDMMC_CK=SDIOCLK/(1+2)=16 MHz
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* DMA OFF: SDIOCLK=48MHz, SDMMC_CK=SDIOCLK/(2+2)=12 MHz
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*/
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#ifdef CONFIG_STM32_SDIO_DMA
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# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA ON: SDIOCLK=48MHz, SDMMC_CK=SDIOCLK/(1+2)=16 MHz
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@@ -228,23 +225,11 @@
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//TODO #warning "Check Freq for 24mHz"
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#ifdef CONFIG_STM32_SDIO_DMA
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# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA Channel/Stream Selections *****************************************************/
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/* Stream selections are arbitrary for now but might become important in the future
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* is we set aside more DMA channels/streams.
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*
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* SDIO DMA
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* DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA
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* DMAMAP_SDIO_2 = Channel 4, Stream 6
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*/
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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/* FLASH wait states
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*
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* --------- ---------- ----------- ---------
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@@ -260,58 +245,6 @@
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#define BOARD_FLASH_WAITSTATES 5
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/* LED definitions ******************************************************************/
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/* The px4_fmu-v4pro board has numerous LEDs.
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* FMU_LED_RED, FMU_LED_GREEN & FMU_LED_BLUE are directly connected and
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* can be controlled by software.
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
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* The following definitions are used to access individual LEDs.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED1 0
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#define BOARD_LED2 1
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#define BOARD_LED3 2
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#define BOARD_NLEDS 3
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#define BOARD_LED_RED BOARD_LED1
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#define BOARD_LED_GREEN BOARD_LED2
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#define BOARD_LED_BLUE BOARD_LED3
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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#define BOARD_LED3_BIT (1 << BOARD_LED3)
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/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
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* include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
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* events as follows:
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*
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*
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* SYMBOL Meaning LED state
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* Red Green Blue
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* ---------------------- -------------------------- ------ ------ ----*/
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#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */
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#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */
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#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */
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#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */
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#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */
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#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */
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#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */
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#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */
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#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */
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/* Thus if the Green LED is statically on, NuttX has successfully booted and
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* is, apparently, running normally. If the Red LED is flashing at
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* approximately 2Hz, then a fatal error has been detected and the system
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* has halted.
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*/
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/* Alternate function pin selections ************************************************/
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/*
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@@ -341,9 +274,6 @@
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/* UART8 has no alternate pin config */
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/* UART RX DMA configurations */
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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/*
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* CAN
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@@ -383,7 +313,6 @@
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#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
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#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
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#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
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#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
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#define GPIO_SPI2_SCK GPIO_SPI2_SCK_1
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@@ -422,7 +351,6 @@
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# define PROBE_MARK(n)
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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@@ -458,4 +386,4 @@ EXTERN void stm32_boardinitialize(void);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __NUTTX_CONFIG_PX4FMUV4_PRO_INCLUDE_BOARD_H */
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#endif /* __ARCH_BOARD_BOARD_H */
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@@ -0,0 +1,23 @@
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#pragma once
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/* DMA Channel/Stream Selections
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*
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* DMAMAP_USART3_RX = DMA1, Stream 1, Channel 4
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* DMAMAP_UART4_RX = DMA1, Stream 2, Channel 4
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* DMAMAP_UART7_RX = DMA1, Stream 3, Channel 5
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* DMAMAP_USART2_RX = DMA1, Stream 5, Channel 4
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* DMAMAP_UART8_RX = DMA1, Stream 6, Channel 5
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*
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* DMAMAP_SPI1_RX_1 = DMA2, Stream 0, Channel 3
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* DMAMAP_USART6_RX_2 = DMA2, Stream 2, Channel 5
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* DMAMAP_SPI1_TX_1 = DMA2, Stream 3, Channel 3
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* DMAMAP_USART1_RX_2 = DMA2, Stream 5, Channel 4
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* DMAMAP_SDIO_2 = DMA2, Stream 6, Channel 4
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* DMAMAP_USART6_TX_2 = DMA2, Stream 7, Channel 5
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*/
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#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_SDIO DMAMAP_SDIO_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_TX_2
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@@ -190,9 +190,11 @@ CONFIG_STM32_SDIO_CARD=y
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CONFIG_STM32_SERIALBRK_BSDCOMPAT=y
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CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
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CONFIG_STM32_SPI1=y
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CONFIG_STM32_SPI1_DMA=y
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CONFIG_STM32_SPI2=y
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CONFIG_STM32_SPI5=y
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CONFIG_STM32_SPI6=y
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CONFIG_STM32_SPI_DMA=y
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CONFIG_STM32_TIM10=y
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CONFIG_STM32_TIM11=y
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CONFIG_STM32_TIM1=y
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@@ -326,9 +326,8 @@
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#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
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/* This board provides a DMA pool and APIs */
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#define BOARD_DMA_ALLOC_POOL_SIZE 5120
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/* This board provides a DMA pool and APIs. */
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#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1008) // 5120 fat + 512 + 1008 spi
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#define BOARD_HAS_ON_RESET 1
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Reference in New Issue
Block a user