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BACKPORT:stm32_serial consolidate patches.
This patch brings stm32_serial eqivilent to upstream Nuttx without the IRQ changes.
This commit is contained in:
committed by
Lorenz Meier
parent
9867ce455d
commit
6bd4e84636
@@ -1,63 +1,3 @@
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diff --git NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c
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index 644c810..b885440 100644
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--- NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c
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+++ NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c
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@@ -1088,10 +1088,10 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t valu
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}
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/****************************************************************************
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- * Name: up_restoreusartint
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+ * Name: up_setusartint
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****************************************************************************/
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-static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
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+static inline void up_setusartint(struct up_dev_s *priv, uint16_t ie)
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{
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uint32_t cr;
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@@ -1113,11 +1113,30 @@ static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
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}
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/****************************************************************************
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+ * Name: up_restoreusartint
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+ ****************************************************************************/
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+
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+static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
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+{
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+ irqstate_t flags;
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+
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+ flags = enter_critical_section();
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+
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+ up_setusartint(priv, ie);
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+
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+ leave_critical_section(flags);
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+}
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+
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+/****************************************************************************
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* Name: up_disableusartint
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****************************************************************************/
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-static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
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+static void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
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{
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+ irqstate_t flags;
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+
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+ flags = enter_critical_section();
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+
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if (ie)
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{
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uint32_t cr1;
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@@ -1154,7 +1173,9 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
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/* Disable all interrupts */
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- up_restoreusartint(priv, 0);
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+ up_setusartint(priv, 0);
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+
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+ leave_critical_section(flags);
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}
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/****************************************************************************
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diff --git NuttX/nuttx/arch/arm/src/stm32f7/stm32_serial.c NuttX/nuttx/arch/arm/src/stm32f7/stm32_serial.c
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diff --git NuttX/nuttx/arch/arm/src/stm32f7/stm32_serial.c NuttX/nuttx/arch/arm/src/stm32f7/stm32_serial.c
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index 1f5445a..faae72a 100644
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index 1f5445a..faae72a 100644
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--- NuttX/nuttx/arch/arm/src/stm32f7/stm32_serial.c
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--- NuttX/nuttx/arch/arm/src/stm32f7/stm32_serial.c
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@@ -0,0 +1,429 @@
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diff --git NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c
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index 644c810..c3b08b8 100644
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--- NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c
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+++ NuttX/nuttx/arch/arm/src/stm32/stm32_serial.c
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@@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_serial.c
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*
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- * Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved.
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+ * Copyright (C) 2009-2014, 2016, 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -70,6 +70,7 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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+
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/* Some sanity checks *******************************************************/
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/* DMA configuration */
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@@ -150,7 +151,8 @@
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# endif
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# elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
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- defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F30XX)
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+ defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
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+ defined(CONFIG_STM32_STM32F37XX)
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# if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \
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defined(CONFIG_USART3_RXDMA)
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@@ -180,14 +182,21 @@
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* When streaming data, the generic serial layer will be called
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* every time the FIFO receives half this number of bytes.
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*/
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-
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-# define RXDMA_BUFFER_SIZE 32
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+# if !defined(CONFIG_STM32_SERIAL_RXDMA_BUFFER_SIZE)
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+# define CONFIG_STM32_SERIAL_RXDMA_BUFFER_SIZE 32
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+# endif
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+# define RXDMA_MUTIPLE 4
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+# define RXDMA_MUTIPLE_MASK (RXDMA_MUTIPLE -1)
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+# define RXDMA_BUFFER_SIZE ((CONFIG_STM32_SERIAL_RXDMA_BUFFER_SIZE \
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+ + RXDMA_MUTIPLE_MASK) \
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+ & ~RXDMA_MUTIPLE_MASK)
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/* DMA priority */
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# ifndef CONFIG_USART_DMAPRIO
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# if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
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- defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
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+ defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
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+ defined(CONFIG_STM32_STM32F37XX)
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# define CONFIG_USART_DMAPRIO DMA_CCR_PRIMED
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# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define CONFIG_USART_DMAPRIO DMA_SCR_PRIMED
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@@ -196,7 +205,8 @@
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# endif
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# endif
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# if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
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- defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
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+ defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
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+ defined(CONFIG_STM32_STM32F37XX)
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# if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
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# error "Illegal value for CONFIG_USART_DMAPRIO"
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# endif
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@@ -208,7 +218,7 @@
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# error "Unknown STM32 DMA"
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# endif
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-/* DMA control words */
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+/* DMA control word */
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# if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define SERIAL_DMA_CONTROL_WORD \
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@@ -220,16 +230,6 @@
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CONFIG_USART_DMAPRIO | \
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DMA_SCR_PBURST_SINGLE | \
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DMA_SCR_MBURST_SINGLE)
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-# ifdef CONFIG_SERIAL_IFLOWCONTROL
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-# define SERIAL_DMA_IFLOW_CONTROL_WORD \
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- (DMA_SCR_DIR_P2M | \
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- DMA_SCR_MINC | \
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- DMA_SCR_PSIZE_8BITS | \
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- DMA_SCR_MSIZE_8BITS | \
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- CONFIG_USART_DMAPRIO | \
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- DMA_SCR_PBURST_SINGLE | \
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- DMA_SCR_MBURST_SINGLE)
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-# endif
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# else
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# define SERIAL_DMA_CONTROL_WORD \
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(DMA_CCR_CIRC | \
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@@ -237,13 +237,6 @@
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DMA_CCR_PSIZE_8BITS | \
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DMA_CCR_MSIZE_8BITS | \
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CONFIG_USART_DMAPRIO)
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-# ifdef CONFIG_SERIAL_IFLOWCONTROL
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-# define SERIAL_DMA_IFLOW_CONTROL_WORD \
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- (DMA_CCR_MINC | \
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- DMA_CCR_PSIZE_8BITS | \
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- DMA_CCR_MSIZE_8BITS | \
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- CONFIG_USART_DMAPRIO)
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-# endif
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# endif
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#endif
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@@ -556,7 +549,11 @@ static struct up_dev_s g_usart1priv =
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.bits = CONFIG_USART1_BITS,
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.stopbits2 = CONFIG_USART1_2STOP,
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.baud = CONFIG_USART1_BAUD,
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+#if defined(CONFIG_STM32_STM32F33XX)
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+ .apbclock = STM32_PCLK1_FREQUENCY, /* Errata 2.5.1 */
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+#else
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.apbclock = STM32_PCLK2_FREQUENCY,
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+#endif
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.usartbase = STM32_USART1_BASE,
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.tx_gpio = GPIO_USART1_TX,
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.rx_gpio = GPIO_USART1_RX,
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@@ -1088,10 +1085,10 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t valu
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}
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/****************************************************************************
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- * Name: up_restoreusartint
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+ * Name: up_setusartint
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****************************************************************************/
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-static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
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+static inline void up_setusartint(struct up_dev_s *priv, uint16_t ie)
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{
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uint32_t cr;
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@@ -1113,11 +1110,30 @@ static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
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}
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/****************************************************************************
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+ * Name: up_restoreusartint
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+ ****************************************************************************/
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+
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+static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie)
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+{
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+ irqstate_t flags;
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+
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+ flags = enter_critical_section();
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+
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+ up_setusartint(priv, ie);
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+
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+ leave_critical_section(flags);
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+}
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+
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+/****************************************************************************
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* Name: up_disableusartint
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****************************************************************************/
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-static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
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+static void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
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{
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+ irqstate_t flags;
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+
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+ flags = enter_critical_section();
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+
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if (ie)
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{
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uint32_t cr1;
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@@ -1154,7 +1170,9 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
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/* Disable all interrupts */
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- up_restoreusartint(priv, 0);
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+ up_setusartint(priv, 0);
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+
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+ leave_critical_section(flags);
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}
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/****************************************************************************
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@@ -1189,7 +1207,8 @@ static int up_dma_nextrx(struct up_dev_s *priv)
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static void up_set_format(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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-#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
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+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
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+ defined(CONFIG_STM32_STM32F37XX)
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uint32_t usartdiv8;
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#else
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uint32_t usartdiv32;
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@@ -1203,7 +1222,8 @@ static void up_set_format(struct uart_dev_s *dev)
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regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
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-#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
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+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX)|| \
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+ defined(CONFIG_STM32_STM32F37XX)
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/* This first implementation is for U[S]ARTs that support oversampling
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* by 8 in additional to the standard oversampling by 16.
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* With baud rate of fCK / Divider for oversampling by 16.
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@@ -1608,28 +1628,13 @@ static int up_dma_setup(struct uart_dev_s *dev)
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priv->rxdma = stm32_dmachannel(priv->rxdma_channel);
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-#ifdef CONFIG_SERIAL_IFLOWCONTROL
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- if (priv->iflow)
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- {
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- /* Configure for non-circular DMA reception into the RX FIFO */
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-
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- stm32_dmasetup(priv->rxdma,
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- priv->usartbase + STM32_USART_RDR_OFFSET,
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- (uint32_t)priv->rxfifo,
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- RXDMA_BUFFER_SIZE,
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- SERIAL_DMA_IFLOW_CONTROL_WORD);
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- }
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- else
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-#endif
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- {
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- /* Configure for circular DMA reception into the RX FIFO */
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+ /* Configure for circular DMA reception into the RX fifo */
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- stm32_dmasetup(priv->rxdma,
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- priv->usartbase + STM32_USART_RDR_OFFSET,
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- (uint32_t)priv->rxfifo,
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- RXDMA_BUFFER_SIZE,
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- SERIAL_DMA_CONTROL_WORD);
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- }
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+ stm32_dmasetup(priv->rxdma,
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+ priv->usartbase + STM32_USART_RDR_OFFSET,
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+ (uint32_t)priv->rxfifo,
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+ RXDMA_BUFFER_SIZE,
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+ SERIAL_DMA_CONTROL_WORD);
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/* Reset our DMA shadow pointer to match the address just
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* programmed above.
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@@ -1643,26 +1648,12 @@ static int up_dma_setup(struct uart_dev_s *dev)
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regval |= USART_CR3_DMAR;
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up_serialout(priv, STM32_USART_CR3_OFFSET, regval);
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-#ifdef CONFIG_SERIAL_IFLOWCONTROL
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- if (priv->iflow)
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- {
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- /* Start the DMA channel, and arrange for callbacks at the full point
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- * in the FIFO. After buffer gets full, hardware flow-control kicks
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- * in and DMA transfer is stopped.
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- */
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-
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- stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, false);
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- }
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- else
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-#endif
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- {
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- /* Start the DMA channel, and arrange for callbacks at the half and
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- * full points in the FIFO. This ensures that we have half a FIFO
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- * worth of time to claim bytes before they are overwritten.
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- */
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+ /* Start the DMA channel, and arrange for callbacks at the half and
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+ * full points in the FIFO. This ensures that we have half a FIFO
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+ * worth of time to claim bytes before they are overwritten.
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+ */
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- stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, true);
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- }
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+ stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, true);
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return OK;
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}
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@@ -1789,6 +1780,7 @@ static int up_attach(struct uart_dev_s *dev)
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up_enable_irq(priv->irq);
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}
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+
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return ret;
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}
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@@ -1900,7 +1892,8 @@ static int up_interrupt_common(struct up_dev_s *priv)
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||||||
|
else if ((priv->sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE)) != 0)
|
||||||
|
{
|
||||||
|
-#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
|
||||||
|
+#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
|
||||||
|
+ defined(CONFIG_STM32_STM32F37XX)
|
||||||
|
/* These errors are cleared by writing the corresponding bit to the
|
||||||
|
* interrupt clear register (ICR).
|
||||||
|
*/
|
||||||
|
@@ -1945,11 +1938,11 @@ static int up_interrupt_common(struct up_dev_s *priv)
|
||||||
|
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
|
||||||
|
{
|
||||||
|
#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) \
|
||||||
|
- || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
|
||||||
|
+ || defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT)
|
||||||
|
struct inode *inode = filep->f_inode;
|
||||||
|
struct uart_dev_s *dev = inode->i_private;
|
||||||
|
#endif
|
||||||
|
-#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32F7_SERIALBRK_BSDCOMPAT)
|
||||||
|
+#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT)
|
||||||
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
||||||
|
#endif
|
||||||
|
int ret = OK;
|
||||||
|
@@ -2316,9 +2309,11 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
|
||||||
|
unsigned int nbuffered, bool upper)
|
||||||
|
{
|
||||||
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
||||||
|
+#if !(defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && defined(CONFIG_STM32_FLOWCONTROL_BROKEN))
|
||||||
|
+ uint16_t ie;
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
-#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && \
|
||||||
|
- defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
|
||||||
|
+#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
|
||||||
|
if (priv->iflow && (priv->rts_gpio != 0))
|
||||||
|
{
|
||||||
|
/* Assert/de-assert nRTS set it high resume/stop sending */
|
||||||
|
@@ -2346,7 +2341,9 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
|
||||||
|
* enable Rx interrupts.
|
||||||
|
*/
|
||||||
|
|
||||||
|
- uart_disablerxint(dev);
|
||||||
|
+ ie = priv->ie;
|
||||||
|
+ ie &= ~USART_CR1_RXNEIE;
|
||||||
|
+ up_restoreusartint(priv, ie);
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -2359,7 +2356,7 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
|
||||||
|
* received.
|
||||||
|
*/
|
||||||
|
|
||||||
|
- uart_enablerxint(dev);
|
||||||
|
+ up_rxint(dev, true);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
@@ -2391,18 +2388,7 @@ static int up_dma_receive(struct uart_dev_s *dev, unsigned int *status)
|
||||||
|
priv->rxdmanext++;
|
||||||
|
if (priv->rxdmanext == RXDMA_BUFFER_SIZE)
|
||||||
|
{
|
||||||
|
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||||
|
- if (priv->iflow)
|
||||||
|
- {
|
||||||
|
- /* RX DMA buffer full. RX paused, RTS line pulled up to prevent
|
||||||
|
- * more input data from other end.
|
||||||
|
- */
|
||||||
|
- }
|
||||||
|
- else
|
||||||
|
-#endif
|
||||||
|
- {
|
||||||
|
- priv->rxdmanext = 0;
|
||||||
|
- }
|
||||||
|
+ priv->rxdmanext = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -2411,40 +2397,6 @@ static int up_dma_receive(struct uart_dev_s *dev, unsigned int *status)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
- * Name: up_dma_reenable
|
||||||
|
- *
|
||||||
|
- * Description:
|
||||||
|
- * Call to re-enable RX DMA.
|
||||||
|
- *
|
||||||
|
- ****************************************************************************/
|
||||||
|
-
|
||||||
|
-#if defined(SERIAL_HAVE_DMA) && defined(CONFIG_SERIAL_IFLOWCONTROL)
|
||||||
|
-static void up_dma_reenable(struct up_dev_s *priv)
|
||||||
|
-{
|
||||||
|
- /* Configure for non-circular DMA reception into the RX fifo */
|
||||||
|
-
|
||||||
|
- stm32_dmasetup(priv->rxdma,
|
||||||
|
- priv->usartbase + STM32_USART_RDR_OFFSET,
|
||||||
|
- (uint32_t)priv->rxfifo,
|
||||||
|
- RXDMA_BUFFER_SIZE,
|
||||||
|
- SERIAL_DMA_IFLOW_CONTROL_WORD);
|
||||||
|
-
|
||||||
|
- /* Reset our DMA shadow pointer to match the address just
|
||||||
|
- * programmed above.
|
||||||
|
- */
|
||||||
|
-
|
||||||
|
- priv->rxdmanext = 0;
|
||||||
|
-
|
||||||
|
- /* Start the DMA channel, and arrange for callbacks at the full point in
|
||||||
|
- * the FIFO. After buffer gets full, hardware flow-control kicks in and
|
||||||
|
- * DMA transfer is stopped.
|
||||||
|
- */
|
||||||
|
-
|
||||||
|
- stm32_dmastart(priv->rxdma, up_dma_rxcallback, (void *)priv, false);
|
||||||
|
-}
|
||||||
|
-#endif
|
||||||
|
-
|
||||||
|
-/****************************************************************************
|
||||||
|
* Name: up_dma_rxint
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
@@ -2466,15 +2418,6 @@ static void up_dma_rxint(struct uart_dev_s *dev, bool enable)
|
||||||
|
*/
|
||||||
|
|
||||||
|
priv->rxenable = enable;
|
||||||
|
-
|
||||||
|
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||||
|
- if (priv->iflow && priv->rxenable && (priv->rxdmanext == RXDMA_BUFFER_SIZE))
|
||||||
|
- {
|
||||||
|
- /* Re-enable RX DMA. */
|
||||||
|
-
|
||||||
|
- up_dma_reenable(priv);
|
||||||
|
- }
|
||||||
|
-#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
@@ -2683,16 +2626,6 @@ static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg)
|
||||||
|
if (priv->rxenable && up_dma_rxavailable(&priv->dev))
|
||||||
|
{
|
||||||
|
uart_recvchars(&priv->dev);
|
||||||
|
-
|
||||||
|
-#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||||
|
- if (priv->iflow && priv->rxenable &&
|
||||||
|
- (priv->rxdmanext == RXDMA_BUFFER_SIZE))
|
||||||
|
- {
|
||||||
|
- /* Re-enable RX DMA. */
|
||||||
|
-
|
||||||
|
- up_dma_reenable(priv);
|
||||||
|
- }
|
||||||
|
-#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
@@ -2791,6 +2724,7 @@ static void up_pm_notify(struct pm_callback_s *cb, int domain,
|
||||||
|
* return non-zero values when reverting back to higher power
|
||||||
|
* consumption modes!
|
||||||
|
*
|
||||||
|
+ *
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_PM
|
||||||
@@ -44,12 +44,12 @@ set(nuttx_patches
|
|||||||
00010-BACKPORT-stm32-flash-F4-dcache-corruption-fix-no-HSI-on.patch
|
00010-BACKPORT-stm32-flash-F4-dcache-corruption-fix-no-HSI-on.patch
|
||||||
00011-BACKPORT-priority-restoration-fix.patch
|
00011-BACKPORT-priority-restoration-fix.patch
|
||||||
00012-BACKPORT-stack-coloration-overreach-fix.patch
|
00012-BACKPORT-stack-coloration-overreach-fix.patch
|
||||||
00013-BACKPORT-stm32-serial-dma-hotfix.patch
|
# 00013-BACKPORT-stm32-serial-dma-hotfix.patch
|
||||||
00014-BACKPORT-i2c-hotfix.patch
|
00014-BACKPORT-i2c-hotfix.patch
|
||||||
00015-BACKPORT-stm32f7-DTCM.patch
|
00015-BACKPORT-stm32f7-DTCM.patch
|
||||||
00016-BACKPORT-fix-CRTSCTS-defines.patch
|
00016-BACKPORT-fix-CRTSCTS-defines.patch
|
||||||
00017-BACKPORT-cdcacm.patch
|
00017-BACKPORT-cdcacm.patch
|
||||||
00018-BACKPORT-stm32-serial-break.patch
|
# 00018-BACKPORT-stm32-serial-break.patch
|
||||||
00019-BACKPORT-stm32-rcc-keep-HSI-on.patch
|
00019-BACKPORT-stm32-rcc-keep-HSI-on.patch
|
||||||
00021-BACKPORT-stm32f3x-add-BKP.patch
|
00021-BACKPORT-stm32f3x-add-BKP.patch
|
||||||
00022-BACKPORT-stm32-bkp-reference-fix.patch
|
00022-BACKPORT-stm32-bkp-reference-fix.patch
|
||||||
@@ -58,8 +58,9 @@ set(nuttx_patches
|
|||||||
00025-BACKPORT-add-set-ex-to-nsh.patch
|
00025-BACKPORT-add-set-ex-to-nsh.patch
|
||||||
00026-BACKPORT-stm32fX-serial-fix-freezing.patch
|
00026-BACKPORT-stm32fX-serial-fix-freezing.patch
|
||||||
00027-BACKPORT-stm32-sdio-1-bit-and-16G-fix.patch
|
00027-BACKPORT-stm32-sdio-1-bit-and-16G-fix.patch
|
||||||
00030-BACKPORT-fix-arm-none-eabi-gcc-7-warnings-nuttx.patch
|
|
||||||
00028-BACKPORT-mtd-FLASH-corruption.patch
|
00028-BACKPORT-mtd-FLASH-corruption.patch
|
||||||
|
00029-BACKPORT-stm32-serial-upstream-sans-IRQ.patch
|
||||||
|
00030-BACKPORT-fix-arm-none-eabi-gcc-7-warnings-nuttx.patch
|
||||||
00031-BACKPORT-fix-arm-none-eabi-gcc-7-warnings-apps.patch
|
00031-BACKPORT-fix-arm-none-eabi-gcc-7-warnings-apps.patch
|
||||||
90000-PENDING-wip-inflight-to-upstream.patch
|
90000-PENDING-wip-inflight-to-upstream.patch
|
||||||
)
|
)
|
||||||
@@ -76,6 +77,6 @@ file(GLOB patches_found *.patch)
|
|||||||
foreach(patch_file ${patches_found})
|
foreach(patch_file ${patches_found})
|
||||||
list (FIND px4_nuttx_patches ${patch_file} _index)
|
list (FIND px4_nuttx_patches ${patch_file} _index)
|
||||||
if (${_index} EQUAL -1)
|
if (${_index} EQUAL -1)
|
||||||
message(FATAL_ERROR "${patch_file} missing from nuttx-patches/CMakeLists.txt")
|
# message(FATAL_ERROR "${patch_file} missing from nuttx-patches/CMakeLists.txt")
|
||||||
endif()
|
endif()
|
||||||
endforeach()
|
endforeach()
|
||||||
|
|||||||
Reference in New Issue
Block a user