Resync new repository with old repo r5166

git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5153 42af7a65-404d-4744-a932-0658087f49c3

nuttx/configs/vsn/src/Makefile

@@ -0,0 +1,111 @@
+############################################################################
+# configs/vsn/src/Makefile
+#
+#   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+#   Copyright (c) 2011 Uros Platise. All rights reserved.
+#
+#   Authors: Gregory Nutt <gnutt@nuttx.org>
+#            Uros Platise <uros.platise@isotel.eu>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+#$(TOPDIR)/$(CONFIG_APPS_DIR)
+APPDIR		= $(TOPDIR)/../apps/
+
+-include $(APPDIR)/Make.defs
+
+APPNAME		= sif
+PRIORITY	= SCHED_PRIORITY_DEFAULT
+STACKSIZE	= 4096
+
+CFLAGS		+= -I$(TOPDIR)/sched
+
+ASRCS		= 
+AOBJS		= $(ASRCS:.S=$(OBJEXT))
+
+CSRCS		= sysclock.c boot.c leds.c buttons.c spi.c \
+			  usbdev.c power.c muxbus.c sif.c
+
+ifeq ($(CONFIG_USBMSC),y)
+CSRCS		+= usbmsc.c
+endif
+COBJS		= $(CSRCS:.c=$(OBJEXT))
+
+SRCS		= $(ASRCS) $(CSRCS)
+OBJS		= $(AOBJS) $(COBJS)
+
+ARCH_SRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+  CFLAGS	+= -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
+  		   -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
+  		   -I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
+else
+  CFLAGS	+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
+endif
+
+all: libboard$(LIBEXT)
+
+$(AOBJS): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libboard$(LIBEXT): $(OBJS)
+	@( for obj in $(OBJS) ; do \
+		$(call ARCHIVE, $@, $${obj}); \
+	done ; )
+
+# Register application
+
+.context:
+	$(call REGISTER,$(APPNAME),$(PRIORITY),$(STACKSIZE),$(APPNAME)_main)
+	@touch $@
+
+context: .context
+
+# Create dependencies
+
+.depend: Makefile $(SRCS)
+	@$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	@touch $@
+
+depend: .depend
+
+clean:
+	@rm -f libboard$(LIBEXT) *~ .*.swp
+	$(call CLEAN)
+
+distclean: clean
+	@rm -f Make.dep .depend .context
+
+-include Make.dep

nuttx/configs/vsn/src/README.txt

@@ -0,0 +1,58 @@
+
+VSN Board Support Package, for the NuttX, Uros Platise <uros.platise@isotel.eu>
+===============================================================================
+http://www.netClamps.com
+
+The directory contains start-up and board level functions. 
+Execution starts in the following order:
+
+ - sysclock, immediately after reset stm32_rcc calls external
+   clock configuration when
+     CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
+   is set. It must be set for the VSN board.
+   
+ - boot, performs initial chip and board initialization
+ - sched/os_bringup.c then calls either user_start or exec_namedapp()
+   with application as set in the .config
+
+
+Naming throughout the code
+==========================
+
+ - _init(): used to be called once only, after powerup, to perform board
+   initialization
+ - _start() or called via FS _open(): starts peripheral power, puts it 
+   into operation
+ - _stop() or called via FS _close(): opposite to _start()
+ 
+
+System notifications (a sort of run-levels)
+===========================================
+
+On the VSN, NSH represents the core application as it supports scripts
+easily adaptable for any custom application configuration. NSH is 
+invoked as follows (argument runs a script from the /etc/init.d directory):
+
+ - nsh init: on system powerup called by the NuttX APP_START
+
+TODOs: 
+ 
+ - nsh xpowerup: run on external power used to:
+   - try to setup an USB serial connection
+   - configure SLIP mode, internet
+   - start other internet services, such as telnetd, ftpd, httpd
+   
+ - nsh xpowerdown: run whenever USB recevied suspend signal or
+   external power has been removed.
+   - used to stop internet services
+   
+ - nsh batdown: whenever battery is completely discharged
+
+   
+Compile notes
+===============================
+
+To link-in the sif_main() utility do, in this folder:
+ - make context TOPDIR=<path to nuttx top dir>
+ 
+This will result in registering the application into the namedapp.

nuttx/configs/vsn/src/boot.c

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+/************************************************************************************
+ * configs/vsn/src/boot.c
+ * arch/arm/src/board/boot.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *            Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/** \file
+ *  \author Gregory Nutt, Uros Platise
+ *  \brief VSN Button
+ */
+
+#include <debug.h>
+#include "vsn.h"
+
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/** Initialize Board
+ *
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ **/
+
+void stm32_boardinitialize(void)
+{
+  /* Set start-up board voltage */
+
+  board_power_init();
+  vsn_muxbus_init();
+
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+   * stm32_spiinitialize() has been brought into the link.
+   */
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
+  if (stm32_spiinitialize) stm32_spiinitialize();
+#endif
+
+   /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+    * disabled, and 3) the weak function stm32_usbinitialize() has been brought
+    * into the build.
+    */
+
+#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
+  if (stm32_usbinitialize) stm32_usbinitialize();
+#endif
+
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  up_ledinit();
+#endif
+}

nuttx/configs/vsn/src/buttons.c

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+/****************************************************************************
+ * configs/vsn/src/buttons.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief VSN Button
+ */
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+#include <nuttx/config.h>
+#include <stdint.h>
+#include <arch/board/board.h>
+#include "vsn.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/** Called from an interrupt
+ * 
+ * \todo Measure the time button is being pressed, and then:
+ *  - if short signal all processes (tasks and threads) with 'button user request': SIGUSR1
+ *  - if long (>0.5 s) signal all with 'power-off request': SIGTERM
+ **/ 
+void buttons_callback(void)
+{
+}
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+void up_buttoninit(void)
+{
+  stm32_configgpio(GPIO_PUSHBUTTON);
+}
+
+
+uint8_t up_buttons(void)
+{
+  return stm32_gpioread(GPIO_PUSHBUTTON);
+}
+
+
+#endif /* CONFIG_ARCH_BUTTONS */

nuttx/configs/vsn/src/chipcon.c

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+/****************************************************************************
+ * configs/vsn/src/chipcon.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ * 
+ *   Author: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief Chipcon CC1101 Interface
+ */
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/** Set external clock frequency, or disable it
+ */
+int chipcon_setXclock(int prescaler)
+{
+	// check present state, if it is enabled (in the chip!)
+	
+	// change state and with OK if everything is OK.
+	
+	return ERROR;
+}
+
+
+int chipcon_setchannel(uint16_t channel)
+{
+}
+
+
+void chipcon_init(int spino)
+{
+	// create stream driver, where STDIN is packet oriented
+	// means that two messages received are kept separated
+	// in internal buffers.
+	
+	// default mode is AUTO, RX enabled and auto TX on writes and
+	// when chipcon is IDLE.
+}
+
+
+void chipcon_open(void)
+{
+}
+
+
+void chipcon_ioctl(void)
+{
+	// access to setXclock
+}

nuttx/configs/vsn/src/leds.c

@@ -0,0 +1,120 @@
+/****************************************************************************
+ * configs/vsn/src/leds.c
+ * arch/arm/src/board/leds.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief VSN LED
+ */
+
+#include <nuttx/config.h>
+#include <arch/board/board.h>
+
+#ifdef CONFIG_ARCH_LEDS
+
+#include <arch/stm32/irq.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include "vsn.h"
+
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG with
+ * CONFIG_DEBUG_VERBOSE too)
+ */
+
+#undef LED_DEBUG  /* Define to enable debug */
+
+#ifdef LED_DEBUG
+#  define leddbg  lldbg
+#  define ledvdbg llvdbg
+#else
+#  define leddbg(x...)
+#  define ledvdbg(x...)
+#endif
+
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+ 
+irqstate_t irqidle_mask;
+
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static void led_setonoff(unsigned int bits)
+{
+}
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+
+void up_ledinit(void)
+{
+   stm32_configgpio(GPIO_LED);
+}
+
+
+void up_ledon(int led)
+{
+  if (led==LED_IDLE) {
+	irqidle_mask = irqsave();
+	stm32_gpiowrite(GPIO_LED, true);
+  }
+}
+
+
+void up_ledoff(int led)
+{
+  if (led==LED_IDLE) {
+    stm32_gpiowrite(GPIO_LED, false);
+    irqrestore(irqidle_mask);
+  }
+}
+
+#endif /* CONFIG_ARCH_LEDS */

nuttx/configs/vsn/src/muxbus.c

@@ -0,0 +1,198 @@
+/****************************************************************************
+ * config/vsn/src/muxbus.c
+ * arch/arm/src/board/muxbus.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief VSN Multiplexed Bus, SDIO Interface and the Analog Front-End
+ */
+
+#include <nuttx/config.h>
+#include <semaphore.h>
+#include <errno.h>
+
+#include "vsn.h"
+#include "stm32_gpio.h"
+
+
+/****************************************************************************
+ * Private data
+ ****************************************************************************/
+
+/** Set true when the bus has been locked by the SDIO interface */
+bool vsn_muxbus_ownedbysdio;
+
+/** Semaphore to resolve conflicts between muxbus locks */
+sem_t vsn_muxbus_sem;
+
+
+/****************************************************************************
+ * Private functions
+ ****************************************************************************/
+
+void vsn_muxbus_takeownership(void)
+{
+    while (sem_wait(&vsn_muxbus_sem) != 0) {
+    
+        /* The only case that an error should occr here is if the wait was
+         * awakened by a signal.
+         */
+
+        ASSERT(errno == EINTR);
+    }
+}
+
+
+void vsn_muxbus_sdio_release(void)
+{
+    stm32_unconfiggpio(GPIO_SDIO_D0);
+    stm32_unconfiggpio(GPIO_SDIO_CK);
+    stm32_unconfiggpio(GPIO_SDIO_CMD);
+    
+    vsn_muxbus_ownedbysdio = FALSE;
+}
+
+
+void vsn_muxbus_sdio_access(void)
+{
+    stm32_configgpio(GPIO_SDIO_D0);
+    stm32_configgpio(GPIO_SDIO_CK);
+    stm32_configgpio(GPIO_SDIO_CMD);
+
+    vsn_muxbus_ownedbysdio = TRUE;
+}
+
+
+/****************************************************************************
+ * Public functions
+ ****************************************************************************/
+
+
+void vsn_muxbus_init(void)
+{
+    /* Put the PGA in default shut-down state */
+
+    stm32_configgpio(GPIO_PGIA_AEN);
+
+    /* setup semaphore in non-locked condition */
+    
+    sem_init(&vsn_muxbus_sem, 0, 1);
+    
+    /* by default give the bus to the SDIO */
+    
+    vsn_muxbus_sdio_access();
+}
+
+
+/** 
+ * We could do extra checks: who is the owner to prevent
+ * unlocking from SDIO side eventhough it was not locked 
+ * by him, but temporarily by the PGA
+ */
+void stm32_muxbus_sdio_lock(bool lock)
+{
+    if ( lock )
+        vsn_muxbus_takeownership();
+    else
+        sem_post(&vsn_muxbus_sem);
+}
+
+
+/**
+ * The following rules apply for the SDcard:
+ * 
+ *  - CMD serial line always starts with 0 (start-bit) and ends with 1 (stop-bit)
+ *    The total length is always 48 bits protected by CRCs. When changing the 
+ *    gain, CMD must be seen as 1 on CK changes.
+ * 
+ *  - An alternative mechanism would be to use suspend/resume commands
+ * 
+ *  - If SDcard internal shift-register is 8-bit oriented there might be a need
+ *    to shift 7 dummy bits to properly detect invalid start of packet 
+ *    (with start bit set as 1) to invalidate bus transitions (in case CK 
+ *    is changing).
+ * 
+ * SDIO returns the bus in HiZ states, where CLK = 0, D = CMD = external pull-up
+ */
+int vsn_muxbus_setpgagain(int gain)
+{
+    /* Shutdown the Analog Devices AD8231 and exit if gain is invalid */
+
+    stm32_gpiowrite(GPIO_PGIA_AEN, FALSE);
+    
+    if (gain < 0 || gain > 7)
+        return -1;
+
+    vsn_muxbus_takeownership();
+    vsn_muxbus_sdio_release();
+    
+    /* If we have to set CLK = 1, made that first as D, CMD are 1 by pull-ups */
+    
+    if (gain & 2)
+        stm32_configgpio(GPIO_PGIA_A1_H);
+    else stm32_configgpio(GPIO_PGIA_A1_L);
+    
+    /* Set the D and CMD bits */
+    
+    if (gain & 1)
+        stm32_configgpio(GPIO_PGIA_A0_H);
+    else stm32_configgpio(GPIO_PGIA_A0_L);
+        
+    if (gain & 4)
+        stm32_configgpio(GPIO_PGIA_A2_H);
+    else stm32_configgpio(GPIO_PGIA_A2_L);
+    
+    /* Sample GAIN on rising edge */
+    
+    stm32_gpiowrite(GPIO_PGIA_AEN, TRUE);
+    
+    /* Release D and CMD pins to 1; however shorten rising edge actively */
+    
+    stm32_gpiowrite(GPIO_PGIA_A0_H, TRUE);
+    stm32_gpiowrite(GPIO_PGIA_A2_H, TRUE);
+    
+    stm32_unconfiggpio(GPIO_PGIA_A0_H);
+    stm32_unconfiggpio(GPIO_PGIA_A2_H);
+    
+    /* Release CLK by going down and return the bus */
+    
+    stm32_unconfiggpio(GPIO_PGIA_A1_L);    
+    
+    vsn_muxbus_sdio_access();
+    sem_post(&vsn_muxbus_sem);
+    
+    return gain;
+}

nuttx/configs/vsn/src/power.c

@@ -0,0 +1,108 @@
+/****************************************************************************
+ * config/vsn/src/power.c
+ * arch/arm/src/board/power.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief VSN Power
+ */
+
+#include <nuttx/config.h>
+
+#include <arch/board/board.h>
+#include <arch/stm32/irq.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include "vsn.h"
+
+
+/****************************************************************************
+ * Declarations and Structures
+ ****************************************************************************/ 
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/ 
+
+void board_power_register(void);
+void board_power_adjust(void);
+void board_power_status(void);
+
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/ 
+
+void board_power_init(void)
+{
+    stm32_configgpio(GPIO_PVS);
+    stm32_configgpio(GPIO_PST);
+    stm32_configgpio(GPIO_XPWR);
+    stm32_configgpio(GPIO_SCTC);
+    stm32_configgpio(GPIO_PCLR);
+}
+
+
+void board_power_reboot(void)
+{
+    // low-level board reset (not just MCU reset)
+    // if external power is present, stimulate power-off as board
+    // will wake-up immediatelly, if power is not present, set an alarm
+    // before power off the board.
+}
+
+
+void board_power_off(void)
+{
+    // Check if external supply is not present, otherwise return
+    // notifying that it is not possible to power-off the board
+
+    // \todo
+    
+    // stop background processes
+    irqsave();
+
+    // switch to internal HSI and get the PD0 and PD1 as GPIO
+    sysclock_select_hsi();
+
+    // trigger shutdown with pull-up resistor (not push-pull!) and wait.
+    stm32_gpiowrite(GPIO_PCLR, true);
+    for(;;);
+}

nuttx/configs/vsn/src/rtac.c

@@ -0,0 +1,106 @@
+/****************************************************************************
+ * config/vsn/src/rtac.c
+ * arch/arm/src/board/rtac.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief Real Time Alarm Clock
+ * 
+ * Implementation of the Real-Time Alarm Clock as per SNP Specifications.
+ * It provides real-time and phase controlled timer module while it 
+ * cooperates with hardware RTC for low-power operation.
+ * 
+ * It provides a replacement for a system 32-bit UTC time/date counter.
+ * 
+ * It runs at maximum STM32 allowed precision of 16384 Hz, providing 
+ * resolution of 61 us, required by the Sensor Network Protocol.
+ */
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/** Execute from a group of events
+ **/
+int rtac_execg(int group)
+{
+    // called by each thread to spawn its apps given by its ID or group ID of
+    // multiple threads, when group parameter is set.
+}
+
+
+/** Wait and execute from a group of events
+ **/
+int rtac_waitg(int group, int time)
+{
+    // blocking variant of rtac_exec with timeout if specified
+}
+
+
+/** Power optimization of base systick timer
+ * 
+ * 1. Simple method to skip wake-ups:
+ *  - ask timers about the min. period, which is Ns * systick
+ *  - set the preload register with floor(Ns) * DEFAULT_PRELOAD
+ *  - on wake-up call routines Ns times.
+ * 
+ * 2. If intermediate ISR occuried then:
+ *  - check how many periods have passed by reading the counter: Np
+ *  - set the new counter value as (counter % DEFAULT_PRELOAD)
+ *  - call timer routines Np times; the next call is as usual, starting
+ *    at 1. point above
+ * 
+ * This is okay if ISR's do not read timers, if they read timers then:
+ *  - on ISR wake-up the code described under 2. must be called first
+ *    (on wake-up from IDLE)
+ * 
+ * BUT: the problem is that SYSTICK does not run in Stop mode but RTC
+ *   only, so it might be better to replace SYSTICK with RTAC (this
+ *   module) and do the job above, permitting ultra low power modes of
+ *   25 uA or further down to 5 uA.
+ */

nuttx/configs/vsn/src/sif.c

@@ -0,0 +1,721 @@
+/****************************************************************************
+ * config/vsn/src/sif.c
+ * arch/arm/src/board/sif.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief VSN Sensor Interface
+ * 
+ * Public interface:
+ *  - sif_init(): should be called just once after system starts, to 
+ *    initialize internal data structures, device driver and hardware
+ *  - individual starts() and stops() that control gpio, usart, i2c, ...
+ *    are wrapped throu open() and close()
+ *  - read() and write() are used for streaming
+ *  - ioctl() for configuration    
+ * 
+ * STDOUT Coding 16-bit (little endian):
+ *  - MSB = 0 GPIOs, followed by the both GPIO config bytes
+ *  - MSB = 1 Input AD, centered around 0x4000
+ * 
+ * STDIN Coding 16-bit (little endian):
+ *  - MSB = 0 GPIOs, followed by the both GPIO config bytes
+ *    - MSB-1 = 0 Analog Output (PWM or Power)
+ *    - MSB-1 = 1 Analog Reference Tap
+ * 
+ * GPIO Update cycle:
+ *  - if they follow the Analog Output, they are synced with them
+ *  - if they follow the Analog Reference Tap, they are synced with them
+ *  - if either is configured without sample rate value, they are updated
+ *    immediately, same as them
+ * 
+ * Implementation:
+ *  - Complete internal states and updateing is made via the struct 
+ *    vsn_sif_s, which is also accessible thru the ioctl() with 
+ *    SNP Message descriptor.
+ **/
+
+#include <nuttx/config.h>
+#include <nuttx/fs/fs.h>
+#include <semaphore.h>
+#include <nuttx/clock.h>
+#include <nuttx/time.h>
+#include <nuttx/rtc.h>
+#include <nuttx/progmem.h>
+
+#include <nuttx/i2c.h>
+#include <nuttx/sensors/lis331dl.h>
+
+#include <nuttx/spi.h>
+#include <nuttx/wireless/cc1101.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <errno.h>
+
+#include "vsn.h"
+#include "stm32_gpio.h"
+
+
+/****************************************************************************
+ * Declarations and Structures
+ ****************************************************************************/ 
+ 
+#define VSN_SIF_READ_BUFSIZE    128
+#define VSN_SIF_WRITE_BUFSIZE   128
+
+
+typedef unsigned char vsn_sif_state_t;
+
+#   define VSN_SIF_STATE_POWERDOWN  0x00    ///< power-down
+
+#   define VSN_SIF_STATE_ACT_GPIO   0x01    ///< gpio is active
+#   define VSN_SIF_STATE_ACT_USART  0x02    ///< usart is active
+#   define VSN_SIF_STATE_ACT_I2C    0x04    ///< i2c is active
+#   define VSN_SIF_STATE_ACT_OWIR1  0x08    ///< 1-wire is active on first GPIO
+#   define VSN_SIF_STATE_ACT_OWIR2  0x10    ///< 1-wire is active on second GPIO
+
+#   define VSN_SIF_STATE_ACT_ANOUT  0x20    ///< analog output is active
+#   define VSN_SIF_STATE_ACT_ANIN   0x40    ///< analog input is active
+
+
+typedef unsigned char vsn_sif_gpio_t;
+
+#   define VSN_SIF_GPIO_STATE_MASK  7
+#   define VSN_SIF_GPIO_HIGHZ       0       ///< High-Z
+#   define VSN_SIF_GPIO_PULLUP      1       ///< Pull-Up
+#   define VSN_SIF_GPIO_PULLDOWN    2       ///< Pull-Down
+#   define VSN_SIF_GPIO_OUTLOW      3       ///< Set Low
+#   define VSN_SIF_GPIO_OUTHIGH     4       ///< Set High
+
+#   define VSN_SIF_GPIO_DISALT_MASK 0x10    ///< Disable Alternate Function, Mask Bit
+#   define VSN_SIF_GPIO_TRIG_MASK   0x20    ///< Send data change to the stdout
+#   define VSN_SIF_GPIO_READ_MASK   0x40    ///< Readout mask
+
+
+#define VSN_SIF_ANOUT_LOW       0	// Pseudo Analog Output acts as GPIO
+#define VSN_SIF_ANOUT_HIGH      1	// Pseudo Analog Output acts as GPIO high
+#define	VSN_SIF_ANOUT_HIGHPWR   2	// ... acts as high power output
+#define VSN_SIF_ANOUT_PWM       3	// ... acts as PWM output 
+#define VSN_SIF_ANOUT_PWMPWR    4	// acts as power PWM output
+
+#define VSN_SIF_ANIN_GAINMASK   7
+#define VSN_SIF_ANIN_GAIN1      0
+#define VSN_SIF_ANIN_GAIN2      1
+#define VSN_SIF_ANIN_GAIN4      2
+#define VSN_SIF_ANIN_GAIN8      3
+#define VSN_SIF_ANIN_GAIN16     4
+#define VSN_SIF_ANIN_GAIN32     5
+#define VSN_SIF_ANIN_GAIN64     6
+#define VSN_SIF_ANIN_GAIN128    7
+
+#define VSN_SIF_ANIN_BITS8
+#define VSN_SIF_ANIN_BITS9
+#define VSN_SIF_ANIN_BITS10
+#define VSN_SIF_ANIN_BITS11
+#define VSN_SIF_ANIN_BITS12
+#define VSN_SIF_ANIN_BITS13
+#define VSN_SIF_ANIN_BITS14
+
+#define VSN_SIF_ANIN_OVERSMP1
+#define VSN_SIF_ANIN_OVERSMP2
+#define VSN_SIF_ANIN_OVERSMP4
+#define VSN_SIF_ANIN_OVERSMP8	
+#define VSN_SIF_ANIN_OVERSMP16
+
+
+struct vsn_sif_s {
+    vsn_sif_state_t     state;              // activity 
+    unsigned char       opencnt;            // open count
+	
+    vsn_sif_gpio_t      gpio[2];
+
+    unsigned char       anout_opts;
+    unsigned short int  anout_width;
+    unsigned short int  anout_period;       // setting it to 0, disables PWM
+    unsigned short int  anout_samplerate;   // as written by write()
+	 		
+    unsigned short int  anref_width;
+    unsigned short int  anref_period;       // setting it to 0, disables PWM
+    unsigned short int  anref_samplerate;   // as written by write()
+    
+    unsigned char       anin_opts;
+    unsigned int        anin_samplerate;    // returned on read() as 16-bit results
+    
+        /*--- Private Data ---*/
+    
+    struct stm32_tim_dev_s * tim3;          // Timer3 is used for PWM, and Analog RefTap
+    struct stm32_tim_dev_s * tim8;          // Timer8 is used for Power Switch
+    
+    struct i2c_dev_s    * i2c1;
+    struct i2c_dev_s    * i2c2;
+    
+    struct spi_dev_s    * spi2;
+    
+    sem_t               exclusive_access;
+};
+
+
+/****************************************************************************
+ * Private data
+ ****************************************************************************/ 
+
+struct vsn_sif_s vsn_sif;
+
+
+/****************************************************************************
+ * Semaphores
+ ****************************************************************************/ 
+
+void sif_sem_wait(void)
+{
+    while( sem_wait( &vsn_sif.exclusive_access ) != 0 ) {
+        ASSERT(errno == EINTR);
+    }
+}
+
+
+void inline sif_sem_post(void)
+{
+    sem_post( &vsn_sif.exclusive_access );
+}
+
+
+/****************************************************************************
+ * GPIOs and Alternative Functions
+ ****************************************************************************/ 
+
+
+void sif_gpios_reset(void)
+{
+    vsn_sif.gpio[0] = vsn_sif.gpio[1] = VSN_SIF_GPIO_HIGHZ;
+    
+    stm32_configgpio(GPIO_GP1_HIZ);
+    stm32_configgpio(GPIO_GP2_HIZ);
+}
+
+
+void sif_gpio1_update(void)
+{
+    uint32_t val;
+    
+    switch(vsn_sif.gpio[0] & VSN_SIF_GPIO_STATE_MASK) {
+        case VSN_SIF_GPIO_HIGHZ:    val = GPIO_GP1_HIZ; break;
+        case VSN_SIF_GPIO_PULLUP:   val = GPIO_GP1_PUP; break;
+        case VSN_SIF_GPIO_PULLDOWN: val = GPIO_GP1_PDN; break;
+        case VSN_SIF_GPIO_OUTLOW:   val = GPIO_GP1_LOW; break;
+        case VSN_SIF_GPIO_OUTHIGH:  val = GPIO_GP1_HIGH;break;
+        default: return;
+    }
+    if (stm32_configgpio(val) == ERROR)
+        printf("Error updating1\n");
+    
+    if ( stm32_gpioread(val) ) 
+        vsn_sif.gpio[0] |= VSN_SIF_GPIO_READ_MASK;
+    else vsn_sif.gpio[0] &= ~VSN_SIF_GPIO_READ_MASK;
+}
+
+
+void sif_gpio2_update(void)
+{
+    uint32_t val;
+    
+    switch(vsn_sif.gpio[1]) {
+        case VSN_SIF_GPIO_HIGHZ:    val = GPIO_GP2_HIZ; break;
+        case VSN_SIF_GPIO_PULLUP:   val = GPIO_GP2_PUP; break;
+        case VSN_SIF_GPIO_PULLDOWN: val = GPIO_GP2_PDN; break;
+        case VSN_SIF_GPIO_OUTLOW:   val = GPIO_GP2_LOW; break;
+        case VSN_SIF_GPIO_OUTHIGH:  val = GPIO_GP2_HIGH;break;
+        default: return;
+    }
+    if (stm32_configgpio(val) == ERROR)
+        printf("Error updating2\n");
+    
+    if ( stm32_gpioread(val) ) 
+        vsn_sif.gpio[1] |= VSN_SIF_GPIO_READ_MASK;
+    else vsn_sif.gpio[1] &= ~VSN_SIF_GPIO_READ_MASK;
+}
+
+
+int sif_gpios_lock(vsn_sif_state_t peripheral)
+{
+    return ERROR;
+}
+
+
+int sif_gpios_unlock(vsn_sif_state_t peripheral)
+{
+    return ERROR;
+}
+
+
+
+
+/****************************************************************************
+ * Analog Outputs
+ ****************************************************************************/ 
+ 
+static volatile int test = 0, teirq;
+
+
+static int sif_anout_isr(int irq, void *context)
+{
+    STM32_TIM_ACKINT(vsn_sif.tim8, 0);
+
+    test++;
+    teirq = irq;
+    
+    return OK;
+}
+
+
+int sif_anout_init(void)
+{
+    vsn_sif.tim3 = stm32_tim_init(3);
+    vsn_sif.tim8 = stm32_tim_init(8);
+        
+    if (!vsn_sif.tim3 || !vsn_sif.tim8) return ERROR;
+    
+    // Use the TIM3 as PWM modulated analogue output
+    
+    STM32_TIM_SETPERIOD(vsn_sif.tim3, 5);
+    STM32_TIM_SETCOMPARE(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, 3);
+
+    STM32_TIM_SETCLOCK(vsn_sif.tim3, 36e6);
+    STM32_TIM_SETMODE(vsn_sif.tim3, STM32_TIM_MODE_UP);
+    STM32_TIM_SETCHANNEL(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
+    
+    // Use the TIM8 to drive the upper power mosfet
+    
+    STM32_TIM_SETISR(vsn_sif.tim8, sif_anout_isr, 0);
+    STM32_TIM_ENABLEINT(vsn_sif.tim8, 0);
+    
+    STM32_TIM_SETPERIOD(vsn_sif.tim8, 4096);
+    STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, 5000);
+    
+    STM32_TIM_SETCLOCK(vsn_sif.tim8, 36e6);
+    STM32_TIM_SETMODE(vsn_sif.tim8, STM32_TIM_MODE_UP);
+    //STM32_TIM_SETCHANNEL(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
+
+    vsn_sif.i2c1 = up_i2cinitialize(1);
+    vsn_sif.i2c2 = up_i2cinitialize(2);
+    
+    vsn_sif.spi2 = up_spiinitialize(2);
+
+    return OK;
+}
+
+
+void sif_anout_update(void)
+{
+}
+
+
+void sif_anout_callback(void)
+{
+	// called at rate of PWM interrupt
+}
+
+
+/****************************************************************************
+ * Analog Input Reference Tap
+ ****************************************************************************/ 
+
+
+void sif_anref_init(void)
+{
+}
+
+
+/****************************************************************************
+ * Analog Input Sampler Unit
+ ****************************************************************************/ 
+
+#if 0
+/**
+ * Gain is set using the shared multiplexed bus with the SDIO card.
+ * The following rules apply for the SDcard:
+ * 
+ *  - CMD serial line always starts with 0 (start-bit) and ends with 1 (stop-bit)
+ *    The total length is always 48 bits protected by CRCs. When changing the 
+ *    gain, CMD must be seen as 1 on CK changes.
+ * 
+ *  - An alternative mechanism would be to use suspend/resume commands
+ * 
+ *  - If SDcard internal shift-register is 8-bit oriented there might be a need
+ *    to shift 7 dummy bits to properly detect invalid start of packet 
+ *    (with start bit set as 1) to invalidate bus transitions (in case CK 
+ *    is changing).
+ * 
+ * SDIO returns the bus in HiZ states, where CLK = 0, D = CMD = external pull-up
+ */
+int sif_anin_setgain(int gain)
+{
+    /* Shutdown the PGA and exit if gain is invalid */
+
+    stm32_gpiowrite(GPIO_PGIA_AEN, FALSE);
+    
+    if (gain < 0 || gain > 7)
+        return -1;
+    
+    sdio_gpio_request();
+    
+    /* If we have to set CLK = 1, made that first as D, CMD are 1 by pull-ups */
+    
+    if (gain & 2)
+        stm32_configgpio(GPIO_PGIA_A1_H);
+    else stm32_configgpio(GPIO_PGIA_A1_L);
+    
+    /* Set the D and CMD bits */
+    
+    if (gain & 1)
+        stm32_configgpio(GPIO_PGIA_A0_H);
+    else stm32_configgpio(GPIO_PGIA_A0_L);
+        
+    if (gain & 4)
+        stm32_configgpio(GPIO_PGIA_A2_H);
+    else stm32_configgpio(GPIO_PGIA_A2_L);
+    
+    /* Sample GAIN on rising edge */
+    
+    stm32_gpiowrite(GPIO_PGIA_AEN, TRUE);
+    
+    /* Release D and CMD pins to 1; however shorten rising edge actively */
+    
+    stm32_gpiowrite(GPIO_PGIA_A0_H, TRUE);
+    stm32_gpiowrite(GPIO_PGIA_A2_H, TRUE);
+    
+    stm32_unconfiggpio(GPIO_PGIA_A0_H);
+    stm32_unconfiggpio(GPIO_PGIA_A2_H);
+    
+    /* Release CLK by going down  */
+    
+    stm32_unconfiggpio(GPIO_PGIA_A1_L);    
+    
+    sdio_gpio_release();
+    
+    return gain;
+}
+#endif
+
+
+int sif_anin_reset(void)
+{
+    return OK;
+}
+
+
+/****************************************************************************
+ * Device driver functions
+ ****************************************************************************/ 
+
+int devsif_open(FAR struct file *filep)
+{
+    sif_sem_wait();
+    vsn_sif.opencnt++;
+    
+    // Start Hardware
+        
+    sif_sem_post();
+    return 0;
+}
+
+
+int devsif_close(FAR struct file *filep)
+{
+    sif_sem_wait();
+    
+    if (--vsn_sif.opencnt) {
+    
+        // suspend (powerdown) hardware
+        
+        sif_gpios_reset();
+        
+        //STM32_TIM_SETCLOCK(vsn_sif.tim3, 0);
+        //STM32_TIM_SETCLOCK(vsn_sif.tim8, 0);
+    }
+    
+    sif_sem_post();
+    return 0;
+}
+
+
+static ssize_t devsif_read(FAR struct file *filp, FAR char *buffer, size_t len)
+{
+    sif_sem_wait();
+    memset(buffer, 0, len);
+    sif_sem_post();
+    return len;
+}
+
+
+static ssize_t devsif_write(FAR struct file *filp, FAR const char *buffer, size_t len)
+{
+    sif_sem_wait();
+    printf("getpid: %d\n", getpid() );
+    sif_sem_post();
+    return len;
+}
+
+
+#ifndef CONFIG_DISABLE_POLL
+static int devsif_poll(FAR struct file *filp, FAR struct pollfd *fds,
+                        bool setup)
+{
+    if (setup) {
+        fds->revents |= (fds->events & (POLLIN|POLLOUT));
+        
+        if (fds->revents != 0) {
+            sem_post(fds->sem);
+        }
+    }
+    return OK;
+}
+#endif
+
+
+int devsif_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+    sif_sem_wait();
+    sif_sem_post();
+    return 0;
+}
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/ 
+
+
+static const struct file_operations devsif_fops = {
+    devsif_open,    /* open */
+    devsif_close,   /* close */
+    devsif_read,    /* read */
+    devsif_write,   /* write */
+    0,              /* seek */
+    devsif_ioctl    /* ioctl */
+#ifndef CONFIG_DISABLE_POLL
+  , devsif_poll     /* poll */
+#endif
+};
+
+ 
+/** Bring up the Sensor Interface by initializing all of the desired 
+ *  hardware components.
+ **/
+  
+int sif_init(void)
+{
+    /* Initialize data-structure */
+    
+    vsn_sif.state   = VSN_SIF_STATE_POWERDOWN;
+    vsn_sif.opencnt = 0;
+    sem_init(&vsn_sif.exclusive_access, 0, 1);
+    
+    /* Initialize hardware */
+    
+    sif_gpios_reset();
+    if ( sif_anout_init() != OK ) return -1;
+    if ( sif_anin_reset() != OK ) return -1;
+
+    /* If everything is okay, register the driver */
+    
+    (void)register_driver("/dev/sif0", &devsif_fops, 0666, NULL);
+    return OK;
+}
+
+
+/** SIF Utility
+ * 
+ * Provides direct access to the sensor connector, readings, and diagnostic.
+ **/
+ 
+extern int cc1101_eventcb(int irq, FAR void *context);
+ 
+int sif_main(int argc, char *argv[])
+{
+    if (argc >= 2) {	
+        if (!strcmp(argv[1], "init")) {          
+          return sif_init();
+        }
+        else if (!strcmp(argv[1], "gpio") && argc == 4) {
+            vsn_sif.gpio[0] = atoi(argv[2]);
+            vsn_sif.gpio[1] = atoi(argv[3]);
+            sif_gpio1_update();
+            sif_gpio2_update();
+            printf("GPIO States: %2x %2x\n", vsn_sif.gpio[0], vsn_sif.gpio[1] );
+            return 0;
+        }
+        else if (!strcmp(argv[1], "pwr") && argc == 3) {
+            int val = atoi(argv[2]);
+            //STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, val);
+            STM32_TIM_SETCOMPARE(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, val);
+            return 0;
+        }
+        else if (!strcmp(argv[1], "time") && argc == 3) {
+            struct timespec t_set;
+            t_set.tv_sec = atoi(argv[2]);
+            clock_settime(CLOCK_REALTIME, &t_set);
+        }
+        else if (!strcmp(argv[1], "free") ) {
+            uint16_t page = 0, stpage = 0xFFFF;
+            int status;
+            do {
+                status = up_progmem_ispageerased(page++);
+                
+                /* Is this beginning of new free space section */
+                if (status == 0) {
+                    if (stpage == 0xFFFF) stpage = page-1;
+                }
+                else if (status != 0) {
+                    if (stpage != 0xFFFF) {
+                        printf("Free Range:\t%d\t-\t%d\n", stpage, page-2);
+                        stpage = 0xFFFF;
+                    }
+                }
+            }
+            while (status >= 0);
+            return 0;
+        }
+        else if (!strcmp(argv[1], "erase") && argc == 3 ) {
+            int page = atoi(argv[2]);
+            printf("Erase result: %d\n", up_progmem_erasepage(page) );
+            return 0;
+        }
+        else if (!strcmp(argv[1], "flash") && argc == 3 ) {
+            uint16_t page = atoi(argv[2]);
+            uint32_t addr = page * up_progmem_pagesize(page);
+            
+            printf("Write result: %d (writing to address %xh)\n", 
+                up_progmem_write( addr, "Test", 4 ), addr);
+            return 0;
+        }
+        else if (!strcmp(argv[1], "i2c") && argc == 3) {
+            int val = atoi(argv[2]);
+            
+            I2C_SETFREQUENCY(vsn_sif.i2c1, 100000);
+            
+            struct lis331dl_dev_s * lis = lis331dl_init(vsn_sif.i2c1, val);
+
+            if (lis) {
+                const struct lis331dl_vector_s * a;
+                int i;
+                uint32_t time_stamp = clock_systimer();
+                
+                /* Set to 400 Hz : 3 = 133 Hz/axis */
+                
+                lis331dl_setconversion(lis, false, true);
+                
+                /* Sample some values */
+                
+                for (i=0; i<1000; ) {
+                    if ( (a = lis331dl_getreadings(lis)) ) {
+                        i++;
+                        printf("%d %d %d\n", a->x, a->y, a->z);
+                    }
+                    else if (errno != 11) {
+                        printf("Readings errno %d\n", errno);
+                        break;
+                    }
+                }
+                
+                printf("Time diff = %d\n", clock_systimer() - time_stamp);
+                
+                lis331dl_deinit(lis);
+            }
+            else printf("Exit point: errno=%d\n", errno);
+
+            return 0;
+        }
+        else if (!strcmp(argv[1], "pga")) {
+            int gain = atoi(argv[2]);
+            
+            gain = vsn_muxbus_setpgagain(gain);
+
+            printf("Gain changed: %d\n", gain);
+            return 0;
+        }
+        else if (!strcmp(argv[1], "cc")) {
+            struct cc1101_dev_s * cc;
+            uint8_t buf[64];
+            int sta;
+            
+            cc = cc1101_init(vsn_sif.spi2, CC1101_PIN_GDO0, GPIO_CC1101_GDO0,
+                &cc1101_rfsettings_ISM1_868MHzGFSK100kbps);
+                
+            if (cc) {
+            
+                /* Work-around: enable falling edge, event and interrupt */
+                stm32_gpiosetevent(GPIO_CC1101_GDO0, false, true, true, cc1101_eventcb);
+            
+                /* Enable clock to ARM PLL, allowing to speed-up to 72 MHz */
+                cc1101_setgdo(cc, CC1101_PIN_GDO2, CC1101_GDO_CLK_XOSC3);
+                
+                cc1101_setchannel(cc, 0);   /* AV Test Hex, receive on that channel */
+                cc1101_receive(cc);          /* Enter RX mode */
+                while(1) 
+                {
+                    fflush(stdout);
+                    sta = cc1101_read(cc, buf, 64);
+                    if (sta > 0) {
+                        printf("Received %d bytes: rssi=%d [dBm], LQI=%d (CRC %s)\n", 
+                            sta, cc1101_calcRSSIdBm(buf[sta-2]), buf[sta-1]&0x7F,
+                            (buf[sta-1]&0x80)?"OK":"BAD");
+                            
+                        cc1101_write(cc, buf, 61);
+                        cc1101_send(cc);
+                        
+                        printf("Packet send back\n");
+                            
+                        cc1101_receive(cc);
+                    }
+                }
+            }
+        }
+    }
+
+    fprintf(stderr, "%s:\tinit\n\tgpio\tA B\n\tpwr\tval\n", argv[0]);
+    
+    struct timespec t_active;
+    clock_gettime(CLOCK_ACTIVETIME, &t_active);
+    
+    fprintf(stderr, "rtc time = %u, active = %u / %u, time / systick = %u / %u\n", 
+        up_rtc_time(), t_active.tv_sec, t_active.tv_nsec,
+        time(NULL), clock_systimer() );
+    return -1;
+}

nuttx/configs/vsn/src/spi.c

@@ -0,0 +1,193 @@
+/************************************************************************************
+ * configs/vsn/src/spi.c
+ * arch/arm/src/board/spi.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *            Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/** \file
+ *  \author Gregory Nutt, Uros Platise
+ *  \brief SPI Slave Selects
+ */
+
+
+#include <nuttx/config.h>
+#include <nuttx/spi.h>
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
+
+#include <arch/board/board.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_internal.h"
+#include "stm32_waste.h"
+#include "vsn.h"
+
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+
+#undef SPI_DEBUG   /* Define to enable debug */
+#undef SPI_VERBOSE /* Define to enable verbose debug */
+
+#ifdef SPI_DEBUG
+#  define spidbg  lldbg
+#  ifdef SPI_VERBOSE
+#    define spivdbg lldbg
+#  else
+#    define spivdbg(x...)
+#  endif
+#else
+#  undef SPI_VERBOSE
+#  define spidbg(x...)
+#  define spivdbg(x...)
+#endif
+
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+
+/** Called to configure SPI chip select GPIO pins for the VSN board.
+ */
+ 
+void weak_function stm32_spiinitialize(void)
+{
+  /* NOTE: Clocking for SPI1 and/or SPI2 and SPI3 was already provided in stm32_rcc.c.
+   *       Configurations of SPI pins is performed in stm32_spi.c.
+   *       Here, we only initialize chip select pins unique to the board architecture.
+   */
+   
+#ifdef CONFIG_STM32_SPI2
+    stm32_configgpio(GPIO_CC1101_CS);
+#endif
+
+#ifdef CONFIG_STM32_SPI3
+    stm32_configgpio(GPIO_FRAM_CS);
+#endif
+}
+
+/** Selects: stm32_spi1/2/3select and stm32_spi1/2/3status
+ *
+ *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
+ *   provided by board-specific logic.  They are implementations of the select
+ *   and status methods of the SPI interface defined by struct spi_ops_s (see
+ *   include/nuttx/spi.h). All other methods (including up_spiinitialize())
+ *   are provided by common STM32 logic.  To use this common SPI logic on your
+ *   board:
+ *
+ *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
+ *      board-specific logic.  These functions will perform chip selection and
+ *      status operations using GPIOs in the way your board is configured.
+ *   3. Add a calls to up_spiinitialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by up_spiinitialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ **/
+
+#ifdef CONFIG_STM32_SPI1
+
+void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return SPI_STATUS_PRESENT;
+}
+
+#endif
+
+#ifdef CONFIG_STM32_SPI2
+
+void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+    spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+    
+    if (devid == SPIDEV_WIRELESS) {
+    
+        stm32_gpiowrite(GPIO_CC1101_CS, !selected);
+
+        /* Wait for MISO to go low, indicates that Quart has stabilized */
+        if (selected) {
+            while( stm32_gpioread(GPIO_SPI2_MISO) ) up_waste();
+        }
+        
+    }
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return SPI_STATUS_PRESENT;
+}
+
+#endif
+
+#ifdef CONFIG_STM32_SPI3
+
+void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  if (devid == SPIDEV_FLASH)
+  {
+    /* Set the GPIO low to select and high to de-select */
+    stm32_gpiowrite(GPIO_FRAM_CS, !selected);
+  }
+}
+
+uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return SPI_STATUS_PRESENT;
+}
+
+#endif
+
+#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */

nuttx/configs/vsn/src/sysclock.c

@@ -0,0 +1,194 @@
+/****************************************************************************
+ * configs/vsn/src/sysclock.c
+ *
+ *   Copyright (C) 2011 Uros Platise. All rights reserved.
+ * 
+ *   Author: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ *  \author Uros Platise
+ *  \brief VSN System Clock Configuration
+ */
+
+#include "vsn.h"
+
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/ 
+
+/** Selects internal HSI Clock, SYSCLK = 36 MHz, HCLK = 36 MHz
+  *  - HSI at 8 MHz, :2 enters DPLL * 9, to get 36 MHz
+  *  - AHB prescaler is set to 1 for maximum performance of all peripherals and FRAM (18 Mbps)
+  *  - Suitable for start-up and lower power operation
+  *  - Flash Wait State = 1, since it is 64-bit prefetch, it satisfies two 32-bit instructions
+  *    (and branch losses a single cycle only, I found this as the best performance vs. frequency)
+  *  - Sleep with peripherals disabled is about 2.5 mA @ 36 MHz, HSI
+  * 
+  * \todo:
+  *   - dynamic clock scalling according to cross-peripheral requirements, AHB prescaler could
+  *     change if all other prescalers increase, to maintain the ratio and to have min. HCLK
+  *     possible; This is of interest when peripherals consume 50% of all power, as for instance
+  *     in sleep mode @ 36 MHz, HSI with all peripherals enabled, i = 7 mA, on 24 Mhz 4.8 mA and
+  *     on 16 MHz 3.2 mA only. 
+  * 
+  * \return Nothing, operation is always successful.
+  */
+void sysclock_select_hsi(void)
+{
+    uint32_t regval;
+
+    // Are we running on HSE?
+    regval = getreg32(STM32_RCC_CR);
+    if (regval & RCC_CR_HSEON) {
+        
+        // \todo: check is if we are running on HSE, we need the step down sequenuce from HSE -> HSI
+        
+        return; // do nothing at this time
+    }
+    
+    // Set FLASH prefetch buffer and 1 wait state
+    regval  = getreg32(STM32_FLASH_ACR);
+    regval &= ~FLASH_ACR_LATENCY_MASK;
+    regval |= (FLASH_ACR_LATENCY_1|FLASH_ACR_PRTFBE);
+    putreg32(regval, STM32_FLASH_ACR);
+     
+    // Set the HCLK source/divider
+    regval = getreg32(STM32_RCC_CFGR);
+    regval &= ~RCC_CFGR_HPRE_MASK;
+    regval |= STM32_RCC_CFGR_HPRE_HSI;
+    putreg32(regval, STM32_RCC_CFGR);
+
+    // Set the PCLK2 divider
+    regval = getreg32(STM32_RCC_CFGR);
+    regval &= ~RCC_CFGR_PPRE2_MASK;
+    regval |= STM32_RCC_CFGR_PPRE2;
+    putreg32(regval, STM32_RCC_CFGR);
+  
+    // Set the PCLK1 divider
+    regval = getreg32(STM32_RCC_CFGR);
+    regval &= ~RCC_CFGR_PPRE1_MASK;
+    regval |= STM32_RCC_CFGR_PPRE1;
+    putreg32(regval, STM32_RCC_CFGR);
+    
+    // Set the TIM1..8 clock multipliers
+#ifdef STM32_TIM27_FREQMUL2  
+#endif
+
+#ifdef STM32_TIM18_FREQMUL2
+#endif
+ 
+    // Set the PLL source = HSI, divider (/2) and multipler (*9)
+    regval = getreg32(STM32_RCC_CFGR);
+    regval &= ~(RCC_CFGR_PLLSRC|RCC_CFGR_PLLXTPRE|RCC_CFGR_PLLMUL_MASK);
+    regval |= (STM32_CFGR_PLLSRC_HSI|STM32_CFGR_PLLMUL_HSI);
+    putreg32(regval, STM32_RCC_CFGR);
+ 
+    // Enable the PLL
+    regval = getreg32(STM32_RCC_CR);
+    regval |= RCC_CR_PLLON;
+    putreg32(regval, STM32_RCC_CR);
+ 
+    // Wait until the PLL is ready
+    while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0);
+ 
+    // Select the system clock source (probably the PLL)
+    regval  = getreg32(STM32_RCC_CFGR);
+    regval &= ~RCC_CFGR_SW_MASK;
+    regval |= STM32_SYSCLK_SW;
+    putreg32(regval, STM32_RCC_CFGR);
+
+    // Wait until the selected source is used as the system clock source
+    while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != STM32_SYSCLK_SWS);
+    
+    // map port PD0 and PD1 on OSC pins
+    regval = getreg32(STM32_AFIO_MAPR);
+    regval |= AFIO_MAPR_PD01_REMAP;
+    putreg32(regval, STM32_AFIO_MAPR);
+}
+
+
+/** Selects external HSE Clock, SYSCLK = 72 MHz, HCLK = 36/72 MHz
+  *  - HSE at 9 MHz, DPLL * 8, to get 72 MHz
+  *  - Suitable for maximum performance and USB 
+  *  - Sleep power consumption at HSE and at 72 MHz is 5.5 mA (3.1 @ 36 MHz)
+  *  - Option AHB prescaler is set to :2 to be compatible with HSI to remain on HCLK = 36 MHz
+  *  - Flash memory running on 72 MHz needs two wait states
+  * 
+  * \return Clock selection status
+  * \retval 0 Successful
+  * \retval -1 External clock is not provided
+  * \retval -2 Could not lock to external clock
+  */
+int sysclock_select_hse(void)
+{
+    uint32_t regval;
+
+    // be sure to release PD0 and PD1 pins from the OSC pins
+    regval = getreg32(STM32_AFIO_MAPR);
+    regval &= ~AFIO_MAPR_PD01_REMAP;
+    putreg32(regval, STM32_AFIO_MAPR);
+
+    // if (is cc1101 9 MHz clock output enabled), otherwise return with -1
+    // I think that clock register provides HSE valid signal to detect that as well.
+    
+    return 0;
+}
+
+
+/****************************************************************************
+ * Interrupts, Callbacks
+ ****************************************************************************/ 
+
+
+/** TODO: Interrupt on lost HSE clock, change it to HSI, ... restarting is 
+  *   more complex as the step requires restart of CC1101 device driver;
+  *   so spawn a task for that... once cc1101 is restarted signal an event
+  *   to restart clock.
+  */
+void sysclock_hse_lost(void)
+{
+}
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/ 
+
+/** Setup system clock, enabled when:
+  *   - CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
+  *  option is set in .config
+  */
+void stm32_board_clockconfig(void)
+{
+    sysclock_select_hsi();
+}

nuttx/configs/vsn/src/usbdev.c

@@ -0,0 +1,123 @@
+/************************************************************************************
+ * configs/svsn/src/usbdev.c
+ * arch/arm/src/board/boot.c
+ *
+ *   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ *   Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *            Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/usb/usbdev.h>
+#include <nuttx/usb/usbdev_trace.h>
+
+#include "up_arch.h"
+#include "stm32_internal.h"
+#include "vsn.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the VSN board.
+ *
+ ************************************************************************************/
+
+void stm32_usbinitialize(void)
+{
+  /* USB Soft Connect Pullup: PB.14 */
+
+#if defined(GPIO_USB_PULLUP)
+  stm32_configgpio(GPIO_USB_PULLUP);
+#endif
+}
+
+/************************************************************************************
+ * Name:  stm32_usbpullup
+ *
+ * Description:
+ *   If USB is supported and the board supports a pullup via GPIO (for USB software
+ *   connect and disconnect), then the board software must provide stm32_pullup.
+ *   See include/nuttx/usb/usbdev.h for additional description of this method.
+ *   Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
+ *   NULL.
+ *
+ ************************************************************************************/
+
+int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+  usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+#if defined(GPIO_USB_PULLUP)
+  stm32_gpiowrite(GPIO_USB_PULLUP, !enable);
+#endif
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  stm32_usbsuspend
+ *
+ * Description:
+ *   Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
+ *   used.  This function is called whenever the USB enters or leaves suspend mode.
+ *   This is an opportunity for the board logic to shutdown clocks, power, etc.
+ *   while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+  ulldbg("resume: %d\n", resume);
+}
+

nuttx/configs/vsn/src/usbmsc.c

@@ -0,0 +1,156 @@
+/****************************************************************************
+ * configs/vsn/src/usbmsc.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *            Uros Platise <uros.platise@isotel.eu>
+ *
+ * Configure and register the STM32 MMC/SD SDIO block driver.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "vsn.h"
+
+#ifdef CONFIG_STM32_SDIO
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_EXAMPLES_USBMSC_DEVMINOR1
+#  define CONFIG_EXAMPLES_USBMSC_DEVMINOR1 0
+#endif
+
+/* SLOT number(s) could depend on the board configuration */
+
+#ifdef CONFIG_ARCH_BOARD_VSN
+#  undef STM32_MMCSDSLOTNO
+#  define STM32_MMCSDSLOTNO 0
+#else
+   /* Add configuration for new STM32 boards here */
+#  error "Unrecognized STM32 board"
+#endif
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_CPP_HAVE_VARARGS
+#  ifdef CONFIG_DEBUG
+#    define message(...) lib_lowprintf(__VA_ARGS__)
+#    define msgflush()
+#  else
+#    define message(...) printf(__VA_ARGS__)
+#    define msgflush() fflush(stdout)
+#  endif
+#else
+#  ifdef CONFIG_DEBUG
+#    define message lib_lowprintf
+#    define msgflush()
+#  else
+#    define message printf
+#    define msgflush() fflush(stdout)
+#  endif
+#endif
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbmsc_archinitialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ ****************************************************************************/
+
+int usbmsc_archinitialize(void)
+{
+  FAR struct sdio_dev_s *sdio;
+  int ret;
+
+  /* First, get an instance of the SDIO interface */
+
+  message("usbmsc_archinitialize: "
+          "Initializing SDIO slot %d\n",
+          STM32_MMCSDSLOTNO);
+
+  sdio = sdio_initialize(STM32_MMCSDSLOTNO);
+  if (!sdio)
+    {
+      message("usbmsc_archinitialize: Failed to initialize SDIO slot %d\n",
+              STM32_MMCSDSLOTNO);
+      return -ENODEV;
+    }
+
+  /* Now bind the SPI interface to the MMC/SD driver */
+
+  message("usbmsc_archinitialize: "
+          "Bind SDIO to the MMC/SD driver, minor=%d\n",
+          CONFIG_EXAMPLES_USBMSC_DEVMINOR1);
+
+  ret = mmcsd_slotinitialize(CONFIG_EXAMPLES_USBMSC_DEVMINOR1, sdio);
+  if (ret != OK)
+    {
+      message("usbmsc_archinitialize: "
+              "Failed to bind SDIO to the MMC/SD driver: %d\n",
+              ret);
+      return ret;
+    }
+  message("usbmsc_archinitialize: "
+          "Successfully bound SDIO to the MMC/SD driver\n");
+  
+  /* Then let's guess and say that there is a card in the slot.  I need to check to
+   * see if the VSN board supports a GPIO to detect if there is a card in
+   * the slot.
+   */
+
+   sdio_mediachange(sdio, true);
+   return OK;
+}
+
+#endif /* CONFIG_STM32_SDIO */

nuttx/configs/vsn/src/vsn.h

@@ -0,0 +1,239 @@
+/************************************************************************************
+ * configs/vsn/src/vsn.h
+ * arch/arm/src/board/vsn.n
+ *
+ *   Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_VSN_SRC_VSN_INTERNAL_H
+#define __CONFIGS_VSN_SRC_VSN_INTERNAL_H
+
+#include <nuttx/config.h>
+#include <arch/board/board.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+#include "stm32.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+
+/************************************************************************************
+ * PIN Definitions
+ ************************************************************************************/
+ 
+ /* Board Peripheral Assignment
+ * 
+ * RS232/Power connector:
+ *  - USART1, is the default bootloader and console
+ * 
+ * Sensor Connector:
+ *  Digital:
+ *  - GPIOs: PB10, PB11 (or even TIM2 CH3 and CH4)
+ *  - USART3
+ *  - I2C2
+ *  Analog:
+ *  - ADC1
+ *  Supporting Analog Circuitry (not seen outside)
+ *  - RefTap (TIM3_CH3)
+ *  - Power PWM Out (TIM8_CH1 / TIM3_CH1)
+ *  - Filtered Out (TIM3_CH4)
+ *    (TIM8 could run at lower frequency, while TIM3 must run at highest possible)
+ *  - Gain selection muxed with SDcard I/Os.
+ * 
+ * Radio connector:
+ *  - UART3 / UART4
+ *  - SPI2
+ *  - I2C1 (remapped pins vs. Expansion connector)
+ *  - CAN
+ *  - TIM4 CH[3:4]
+ * 
+ * Expansion connector:
+ *  - WakeUp Pin
+ *  - System Wide Reset
+ *  - SPI1 is wired to expansion port
+ *  - I2C1
+ *  - USART2 [Rx, Tx, CTS, RTS]
+ *  - DAC [0:1]
+ *  - ADC2 on pins [0:7]
+ *  - TIM2 Channels [1:4]
+ *  - TIM5 Channels [1:4]
+ * 
+ * Onboard Components:
+ *  - SPI3 has direct connection with FRAM
+ *  - SDCard, conencts the microSD and shares the control lines with Sensor Interface
+ *    to select Amplifier Gain
+ *  - ADC3 is used also for power management (can be shared with ADC1 on sensor connector
+ *    if not used)
+ */
+
+/* LED */
+
+#define GPIO_LED		(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN2 |GPIO_OUTPUT_CLEAR)
+                         
+/* BUTTON - Note that after a good second button causes hardware reset */
+
+#define GPIO_PUSHBUTTON	(GPIO_INPUT |GPIO_CNF_INFLOAT  |GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5 )
+
+/* Power Management Pins */
+
+#define GPIO_PVS		(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN7 |GPIO_OUTPUT_CLEAR)
+#define GPIO_PST		(GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN13)
+#define GPIO_SCTC		(GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8 )
+#define GPIO_PCLR		(GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN1 )	// by default this pin is OSCOUT, requires REMAP
+#define GPIO_XPWR		(GPIO_INPUT |GPIO_CNF_INFLOAT  |GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4 )
+
+/* FRAM (alt pins are not listed here and are a part of SPI) */
+
+#define GPIO_FRAM_CS	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15|GPIO_OUTPUT_SET)
+
+/* Sensor Interface */
+
+#define GPIO_GP1_HIZ	(GPIO_INPUT |GPIO_CNF_INFLOAT  |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_GP1_PUP	(GPIO_INPUT |GPIO_CNF_INPULLUP |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_GP1_PDN	(GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10)
+#define GPIO_GP1_LOW	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN10|GPIO_OUTPUT_CLEAR)
+#define GPIO_GP1_HIGH	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN10|GPIO_OUTPUT_SET)
+
+#define GPIO_GP2_HIZ	(GPIO_INPUT |GPIO_CNF_INFLOAT  |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_GP2_PUP	(GPIO_INPUT |GPIO_CNF_INPULLUP |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_GP2_PDN	(GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+#define GPIO_GP2_LOW	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN11|GPIO_OUTPUT_CLEAR)
+#define GPIO_GP2_HIGH	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN11|GPIO_OUTPUT_SET)
+
+#define GPIO_OPA_INPUT	(GPIO_INPUT |GPIO_CNF_ANALOGIN |GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0 )
+#define GPIO_OPA_ENABLE	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN1 |GPIO_OUTPUT_CLEAR)
+#define GPIO_OPA_REFAIN	(GPIO_INPUT |GPIO_CNF_ANALOGIN |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0 )
+#define GPIO_OPA_REFPWM	(GPIO_ALT   |GPIO_CNF_AFPP     |GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0 )
+
+#define GPIO_OUT_PWRON  (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN6 |GPIO_OUTPUT_CLEAR)
+#define GPIO_OUT_PWROFF	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN6 |GPIO_OUTPUT_SET)
+#define GPIO_OUT_PWRPWM	(GPIO_ALT   |GPIO_CNF_AFPP     |GPIO_MODE_10MHz|GPIO_PORTC|GPIO_PIN6 )
+#define GPIO_OUT_PWRPWM_TIM8_CH     1   /* TIM8.CH1 */
+
+#define GPIO_OUT_HIZ	(GPIO_INPUT |GPIO_CNF_INFLOAT  |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1 )
+#define GPIO_OUT_PUP	(GPIO_INPUT |GPIO_CNF_INPULLUP |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1 )
+#define GPIO_OUT_PDN	(GPIO_INPUT |GPIO_CNF_INPULLDWN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1 )
+#define GPIO_OUT_LOW	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN1 |GPIO_OUTPUT_CLEAR)
+#define GPIO_OUT_HIGH	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN1 |GPIO_OUTPUT_SET)
+#define GPIO_OUT_AIN	(GPIO_INPUT |GPIO_CNF_ANALOGIN |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1 )
+#define GPIO_OUT_PWM	(GPIO_ALT   |GPIO_CNF_AFPP     |GPIO_MODE_10MHz|GPIO_PORTB|GPIO_PIN1 )
+#define GPIO_OUT_PWM_TIM3_CH        4   /* TIM3.CH4 */ 
+
+#define GPIO_PGIA_A0_H  (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN8 |GPIO_OUTPUT_SET)
+#define GPIO_PGIA_A0_L  (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN8 |GPIO_OUTPUT_CLEAR)
+#define GPIO_PGIA_A1_L  (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN12|GPIO_OUTPUT_CLEAR)
+#define GPIO_PGIA_A1_H  (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN12|GPIO_OUTPUT_SET)
+#define GPIO_PGIA_A2_H  (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTD|GPIO_PIN2 |GPIO_OUTPUT_SET)
+#define GPIO_PGIA_A2_L  (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTD|GPIO_PIN2 |GPIO_OUTPUT_CLEAR)
+#define GPIO_PGIA_AEN   (GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN1 |GPIO_OUTPUT_CLEAR)
+
+
+/* Radio Connector */
+
+#define GPIO_CC1101_CS	(GPIO_OUTPUT|GPIO_CNF_OUTPP    |GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12|GPIO_OUTPUT_SET)
+#define GPIO_CC1101_GDO0 (GPIO_INPUT|GPIO_CNF_INFLOAT  |GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN9 )
+#define GPIO_CC1101_GDO2 (GPIO_INPUT|GPIO_CNF_INFLOAT  |GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN0 )
+
+
+/* Expansion Connector */
+
+
+/************************************************************************************
+ * Debugging
+ ************************************************************************************/
+
+#ifdef CONFIG_CPP_HAVE_VARARGS
+#  ifdef CONFIG_DEBUG
+#    define message(...) lib_lowprintf(__VA_ARGS__)
+#  else
+#    define message(...) printf(__VA_ARGS__)
+#  endif
+#else
+#  ifdef CONFIG_DEBUG
+#    define message lib_lowprintf
+#  else
+#    define message printf
+#  endif
+#endif
+
+
+/************************************************************************************
+ * Public data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the VSN board.
+ *
+ ************************************************************************************/
+
+extern void weak_function stm32_spiinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ *   Called to setup USB-related GPIO pins for the VSN board.
+ *
+ ************************************************************************************/
+
+extern void weak_function stm32_usbinitialize(void);
+
+/************************************************************************************
+ * Init Power Module and set board system voltage
+ ************************************************************************************/
+
+extern void board_power_init(void);
+
+/************************************************************************************
+ * Name: sysclock_select_hsi
+ *
+ * Description:
+ *   Selects internal HSI Clock, SYSCLK = 36 MHz, HCLK = 36 MHz.
+ *
+ ************************************************************************************/
+
+extern void sysclock_select_hsi(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_VSN_SRC_VSN_INTERNAL_H */
+