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patacongo
2012-09-17 18:18:44 +00:00
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nuttx/configs/ea3131/src/Makefile
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############################################################################
# configs/ea3131/src/Makefile
#
# Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
CFLAGS += -I$(TOPDIR)/sched
ASRCS =
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = up_boot.c up_clkinit.c
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += up_buttons.c
endif
ifeq ($(CONFIG_LPC31_EXTSDRAM),y)
CSRCS += up_mem.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += up_leds.c
endif
ifeq ($(CONFIG_LPC31_SPI),y)
CSRCS += up_spi.c
endif
ifeq ($(CONFIG_NSH_ARCHINIT),y)
CSRCS += up_nsh.c
endif
ifeq ($(CONFIG_PAGING),y)
CSRCS += up_fillpage.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += up_usbmsc.c
endif
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
ifeq ($(WINTOOL),y)
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/arm}"
else
CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/arm
endif
all: libboard$(LIBEXT)
$(AOBJS): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)
$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
libboard$(LIBEXT): $(OBJS)
@( for obj in $(OBJS) ; do \
$(call ARCHIVE, $@, $${obj}); \
done ; )
.depend: Makefile $(SRCS)
@$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
@touch $@
depend: .depend
clean:
@rm -f libboard$(LIBEXT) *~ .*.swp
$(call CLEAN)
distclean: clean
@rm -f Make.dep .depend
-include Make.dep
nuttx/configs/ea3131/src/ea3131_internal.h
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/************************************************************************************
* configs/ea3131/src/ea3131_internal.h
* arch/arm/src/board/ea3131_internal.n
*
* Copyright (C) 2009-2010,2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H
#define __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
#include "lpc31_ioconfig.h"
/************************************************************************************
* Definitions
************************************************************************************/
/* EA3131L GPIOs ********************************************************************/
/* LEDs -- interface through an I2C GPIO expander */
/* BUTTONS -- NOTE that some have EXTI interrupts configured */
/* SPI Chip Selects */
/* SPI NOR flash is the only device on SPI. SPI_CS_OUT0 is its chip select */
#define SPINOR_CS IOCONFIG_SPI_CSOUT0
/* USB Soft Connect Pullup -- NONE */
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public data
************************************************************************************/
#ifndef __ASSEMBLY__
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: lpc31_meminitialize
*
* Description:
* Initialize external memory resources (sram, sdram, nand, nor, etc.)
*
************************************************************************************/
#ifdef CONFIG_LPC31_EXTSDRAM
extern void lpc31_meminitialize(void);
#endif
/************************************************************************************
* Name: lpc31_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the EA3131 board.
*
************************************************************************************/
extern void weak_function lpc31_spiinitialize(void);
/************************************************************************************
* Name: lpc31_usbinitialize
*
* Description:
* Called to setup USB-related GPIO pins for the EA3131 board.
*
************************************************************************************/
extern void weak_function lpc31_usbinitialize(void);
/************************************************************************************
* Name: lpc31_pginitialize
*
* Description:
* Set up mass storage device to support on demand paging.
*
************************************************************************************/
#ifdef CONFIG_PAGING
extern void weak_function lpc31_pginitialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H */
nuttx/configs/ea3131/src/up_boot.c
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/************************************************************************************
* configs/ea3131/src/up_boot.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2009,2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "lpc31_internal.h"
#include "ea3131_internal.h"
/************************************************************************************
* Definitions
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: lpc31_boardinitialize
*
* Description:
* All LPC31XX architectures must provide the following entry point. This entry
* point is called early in the intitialization -- after all memory has been
* configured and mapped but before any devices have been initialized.
*
************************************************************************************/
void lpc31_boardinitialize(void)
{
/* Initialize configured, external memory resources */
#ifdef CONFIG_LPC31_EXTSDRAM
lpc31_meminitialize();
#endif
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* lpc31_spiinitialize() has been brought into the link.
*/
#if defined(CONFIG_LPC31_SPI)
if (lpc31_spiinitialize)
{
lpc31_spiinitialize();
}
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function lpc31_usbinitialize() has been brought
* into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC31_USB)
if (lpc31_usbinitialize)
{
lpc31_usbinitialize();
}
#endif
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
up_ledinit();
#endif
/* Set up mass storage device to support on demand paging */
#if defined(CONFIG_PAGING)
if (lpc31_pginitialize)
{
lpc31_pginitialize();
}
#endif
}
nuttx/configs/ea3131/src/up_buttons.c
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/****************************************************************************
* configs/ea3131/src/up_leds.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/board/board.h>
#include "ea3131_internal.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_buttoninit
****************************************************************************/
void up_buttoninit(void)
{
}
/****************************************************************************
* Name: up_buttons
****************************************************************************/
uint8_t up_buttons(void)
{
return 0;
}
#endif /* CONFIG_ARCH_BUTTONS */
nuttx/configs/ea3131/src/up_clkinit.c
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/****************************************************************************
* configs/ea3131/src/up_clkinit.c
* arch/arm/src/board/up_clkinit.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* References:
* - NXP UM10314 LPC3130/31 User manual Rev. 1.01 — 9 September 2009
* - NXP lpc313x.cdl.drivers.zip example driver code
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "lpc31_cgu.h"
#include "lpc31_cgudrvr.h"
/****************************************************************************
* Definitions
****************************************************************************/
/* Sub-domain Clock Bitsets *************************************************/
/* The following bitsets group clocks into bitsets associated with each
* domain and fractional divider subdomain.
*
* Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6. Clocks not
* defined in the clock sets will be sourced with SYS_BASE_CLK.
*/
/* Domain 0, Fractional divider 0: */
#define CGU_CLKSET_DOMAIN0_DIV0 \
(_D0B(CLKID_APB0CLK)|_D0B(CLKID_APB1CLK)|_D0B(CLKID_APB2CLK)|\
_D0B(CLKID_APB3CLK)|_D0B(CLKID_APB4CLK)|_D0B(CLKID_AHB2INTCCLK)|\
_D0B(CLKID_AHB0CLK)|_D0B(CLKID_DMAPCLK)|_D0B(CLKID_DMACLKGATED)|\
_D0B(CLKID_NANDFLASHS0CLK)|_D0B(CLKID_NANDFLASHPCLK)|\
_D0B(CLKID_ARM926BUSIFCLK)|_D0B(CLKID_SDMMCHCLK)|_D0B(CLKID_USBOTGAHBCLK)|\
_D0B(CLKID_ISRAM0CLK)|_D0B(CLKID_ISRAM1CLK)|_D0B(CLKID_ISROMCLK)|\
_D0B(CLKID_MPMCCFGCLK)|_D0B(CLKID_MPMCCFGCLK2)|_D0B(CLKID_INTCCLK))
/* Domain 0, Fractional divider 1: */
#define CGU_CLKSET_DOMAIN0_DIV1 \
(_D0B(CLKID_ARM926CORECLK))
/* Domain 0, Fractional divider 2: */
#define CGU_CLKSET_DOMAIN0_DIV2 \
(_D0B(CLKID_NANDFLASHAESCLK)|_D0B(CLKID_NANDFLASHNANDCLK))
/* Domain 0, Fractional divider 3: */
#define CGU_CLKSET_DOMAIN0_DIV3 \
(_D0B(CLKID_NANDFLASHECCCLK))
/* Domain 0, Fractional divider 4: */
#define CGU_CLKSET_DOMAIN0_DIV4 \
(_D0B(CLKID_SDMMCCCLKIN))
/* Domain 0, Fractional divider 5: */
#define CGU_CLKSET_DOMAIN0_DIV5 \
(_D0B(CLKID_CLOCKOUT))
/* Domain 0, Fractional divider 6: */
#define CGU_CLKSET_DOMAIN0_DIV6 \
(_D0B(CLKID_EBICLK))
/* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8. Clocks
* not defined in the clock sets will be sourced with AHB_APB0_BASE_CLK.
*/
/* Domain 1, Fractional divider 7: */
#define CGU_CLKSET_DOMAIN1_DIV7 \
(_D1B(CLKID_ADCCLK))
/* Domain 1, Fractional divider 8: */
#define CGU_CLKSET_DOMAIN1_DIV8 \
(_D1B(CLKID_AHB2APB0PCLK)|_D1B(CLKID_EVENTROUTERPCLK)|\
_D1B(CLKID_ADCPCLK)|_D1B(CLKID_WDOGPCLK)|_D1B(CLKID_IOCONFPCLK)|\
_D1B(CLKID_CGUPCLK)|_D1B(CLKID_SYSCREGPCLK)|_D1B(CLKID_OTPPCLK)|\
_D1B(CLKID_RNGPCLK))
/* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10. Clocks
* not defined in the clock sets will be sourced with AHB_APB1_BASE_CLK.
*/
/* Domain 2, Fractional divider 9: */
#define CGU_CLKSET_DOMAIN2_DIV9 \
(_D2B(CLKID_AHB2APB1PCLK)|_D2B(CLKID_TIMER0PCLK)|_D2B(CLKID_TIMER1PCLK)|\
_D2B(CLKID_TIMER2PCLK)|_D2B(CLKID_TIMER3PCLK)|_D2B(CLKID_PWMPCLK)|\
_D2B(CLKID_PWMPCLKREGS)|_D2B(CLKID_I2C0PCLK)|_D2B(CLKID_I2C1PCLK))
/* Domain 2, Fractional divider 10: */
#define CGU_CLKSET_DOMAIN2_DIV10 \
(_D2B(CLKID_PWMCLK))
/* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13. Clocks
* not defined in the clock sets will be sourced with AHB_APB2_BASE_CLK.
*/
/* Domain 3, Fractional divider 11: */
#define CGU_CLKSET_DOMAIN3_DIV11 \
( _D3B(CLKID_AHB2APB2PCLK)|_D3B(CLKID_PCMPCLK)|_D3B(CLKID_PCMAPBPCLK)|\
_D3B(CLKID_UARTAPBCLK)|_D3B(CLKID_LCDPCLK)|_D3B(CLKID_SPIPCLK)|\
_D3B(CLKID_SPIPCLKGATED))
/* Domain 3, Fractional divider 12: */
#define CGU_CLKSET_DOMAIN3_DIV12 \
(_D3B(CLKID_LCDCLK))
/* Domain 3, Fractional divider 13: */
#define CGU_CLKSET_DOMAIN3_DIV13 \
(0)
/* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14. Clocks
* not defined in the clock sets will be sourced with AHB_APB3_BASE_CLK.
*/
#define CGU_CLKSET_DOMAIN4_DIV14 \
(_D4B(CLKID_AHB2APB3PCLK)|_D4B(CLKID_I2SCFGPCLK)|_D4B(CLKID_EDGEDETPCLK)|\
_D4B(CLKID_I2STXFIFO0PCLK)|_D4B(CLKID_I2STXIF0PCLK)|_D4B(CLKID_I2STXFIFO1PCLK)|\
_D4B(CLKID_I2STXIF1PCLK)|_D4B(CLKID_I2SRXFIFO0PCLK)|_D4B(CLKID_I2SRXIF0PCLK)|\
_D4B(CLKID_I2SRXFIFO1PCLK)|_D4B(CLKID_I2SRXIF1PCLK))
/* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15. Clocks not
* defined in the clock sets will be sourced with AHB_APB3_BASE_CLK.
*/
#define CGU_CLKSET_DOMAIN5_DIV15 \
(_D5B(CLKID_PCMCLKIP))
/* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16. Clocks mpt
* defined in the clock sets will be sourced with UART_BASE_CLK.
*/
#define CGU_CLKSET_DOMAIN6_DIV16 \
(0)
/* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22. Clocks
* not defined in the clock sets will be sourced with CLK1024FS_BASE_CLK.
*/
/* Domain 7, Fractional divider 17: */
#define CGU_CLKSET_DOMAIN7_DIV17 \
( _D7B(CLKID_I2SEDGEDETECTCLK)|_D7B(CLKID_I2STXWS0)|_D7B(CLKID_I2STXWS1)|\
_D7B(CLKID_I2SRXWS0)|_D7B(CLKID_I2SRXWS1))
/* Domain 7, Fractional divider 18: */
#define CGU_CLKSET_DOMAIN7_DIV18 \
( _D7B(CLKID_I2STXBCK0N)|_D7B(CLKID_I2STXBCK1N))
/* Domain 7, Fractional divider 19: */
#define CGU_CLKSET_DOMAIN7_DIV19 \
( _D7B(CLKID_I2STXCLK0)|_D7B(CLKID_CLK256FS))
/* Domain 7, Fractional divider 20: */
#define CGU_CLKSET_DOMAIN7_DIV20 \
( _D7B(CLKID_I2SRXBCK0N)|_D7B(CLKID_I2SRXBCK1N))
/* Domain 7, Fractional divider 21: */
#define CGU_CLKSET_DOMAIN7_DIV21 \
(0)
/* Domain 7, Fractional divider 22: */
#define CGU_CLKSET_DOMAIN7_DIV22 \
(0)
/* Domain 8 (DOMAINID_BCK0, clock 87, and domain 9 (DOMAINID_BCK1), clock 88,
* are directly connected
*/
/* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23. Clocks
* not defined in the clock sets will be sourced with SPI_CLK_BASE_CLK.
*/
#define CGU_CLKSET_DOMAIN10_DIV23 \
( _D10B(CLKID_SPICLK)|_D10B(CLKID_SPICLKGATED))
/* Domain 11 (DOMAINID_SYSCLKO, clock 91, is directly connected */
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/* Default clock configuration for the EA3131 board. Every board must
* provide an implementation of g_boardclks. This rather complex structure
* is used by the boot-up logic to configure initial lpc313x clocking.
*
* FFAST: 12MHz
* MASTER PLL Freq: 180MHz;
* AUDIOPLL Freq: 1024Fs, Fs = 44.1kHz
*
* Domain Input Subdomain Divider Ratio
* ------------------------ ----------------- ----------------- -------------
* 0 - DOMAIN_SYS MASTER PLL(HPLL1) DOMAIN0_DIV0 1/2
* DOMAIN0_DIV1 1
* DOMAIN0_DIV2 1/2
* DOMAIN0_DIV3 1/4
* DOMAIN0_DIV4 1/4
* DOMAIN0_DIV5 1/2
* DOMAIN0_DIV6 1/2
*
* 1 - DOMAIN_AHB0APB0 FFAST DOMAIN1_DIV7 1/38
* DOMAIN1_DIV8 1/2
*
* 2 - DOMAIN_AHB0APB1 FFAST DOMAIN2_DIV9 1/2
* DOMAIN2_DIV10 1/2
*
* 3 - DOMAIN_AHB0APB2 MASTER PLL(HPLL1) DOMAIN3_DIV11 1/2
* DOMAIN3_DIV12 1/40
* DOMAIN3_DIV13 1 (not used)
*
* 4 - DOMAIN_AHB0APB3 FFAST DOMAIN4_DIV14 1/2
*
* 5 - DOMAIN_PCM MASTER PLL(HPLL1) DOMAIN5_DIV15 1/2
*
* 6 - DOMAIN_UART FFAST DOMAIN6_DIV16 1
*
* 7 - DOMAIN_CLCK1024FS AUDIO PLL(HPLL0) DOMAIN7_DIV17 1/256
* DOMAIN7_DIV18 1/4
* DOMAIN7_DIV19 1
* DOMAIN7_DIV20 1/4
* DOMAIN7_DIV21 1/32
* DOMAIN7_DIV22 1/2
*
* 8 - DOMAIN_I2SRXBCK0 I2SRX_BCK0 - -
*
* 9 - DOMAIN_I2SRXBCK1 I2SRX_BCK1 - -
*
* 10 - DOMAIN_SPI MASTER PLL(HPLL1) DOMAIN10_DIV23 1/2
*
* 11 - DOMAIN_SYSCLKO FFAST - -
*/
const struct lpc31_clkinit_s g_boardclks =
{
/* Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6 */
{
CGU_FREQIN_HPPLL1,
{
{{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV0},
{{0, 0, 0}, CGU_CLKSET_DOMAIN0_DIV1},
{{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV2},
{{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV3},
{{1, 1, 4}, CGU_CLKSET_DOMAIN0_DIV4},
{{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV5},
{{1, 1, 2}, CGU_CLKSET_DOMAIN0_DIV6}
}
},
/* Domain 1 (DOMAINID_AHB0APB0), Clocks 30-39, Fraction dividers 7-8 */
{
CGU_FREQIN_FFAST,
{
{{1, 1, 38}, CGU_CLKSET_DOMAIN1_DIV7},
{{1, 1, 2}, CGU_CLKSET_DOMAIN1_DIV8}
}
},
/* Domain 2 (DOMAINID_AHB0APB1), Clocks 40-49, Fraction dividers 9-10 */
{
CGU_FREQIN_FFAST,
{
{{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV9},
{{1, 1, 2}, CGU_CLKSET_DOMAIN2_DIV10}
}
},
/* Domain 3 (DOMAINID_AHB0APB2), Clocks 50-57, Fraction dividers 11-13 */
{
CGU_FREQIN_HPPLL1,
{
{{1, 1, 2}, CGU_CLKSET_DOMAIN3_DIV11},
{{1, 1, 40}, CGU_CLKSET_DOMAIN3_DIV12},
{{0, 0, 0}, CGU_CLKSET_DOMAIN3_DIV13}
}
},
/* Domain 4 (DOMAINID_AHB0APB3), Clocks 58-70, Fraction divider 14 */
{
CGU_FREQIN_FFAST,
{
{{1, 1, 2}, CGU_CLKSET_DOMAIN4_DIV14}
}
},
/* Domain 5 (DOMAINID_PCM), Clock 71, Fraction divider 15 */
{
CGU_FREQIN_HPPLL1,
{
{{1, 1, 2}, CGU_CLKSET_DOMAIN5_DIV15}
}
},
/* Domain 6 (DOMAINID_UART), Clock 72, Fraction divider 16 */
{
CGU_FREQIN_FFAST,
{
{{0, 0, 0}, CGU_CLKSET_DOMAIN6_DIV16}
}
},
/* Domain 7 (DOMAINID_CLK1024FS), Clocks 73-86, Fraction dividers 17-22 */
{
CGU_FREQIN_HPPLL0,
{
{{1, 1, 256}, CGU_CLKSET_DOMAIN7_DIV17},
{{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV18},
{{0, 0, 0}, CGU_CLKSET_DOMAIN7_DIV19},
{{1, 1, 4}, CGU_CLKSET_DOMAIN7_DIV20},
{{1, 1, 32}, CGU_CLKSET_DOMAIN7_DIV21},
{{1, 1, 2}, CGU_CLKSET_DOMAIN7_DIV22}
}
},
/* Domain 8 (DOMAINID_BCK0, clock 87 */
{
CGU_FREQIN_I2SRXBCK0
},
/* Domain 9 (DOMAINID_BCK1, clock 88 */
{
CGU_FREQIN_I2SRXBCK1
},
/* Domain 10 (DOMAINID_SPI), Clocks 89-90, Fraction divider 23 */
{
CGU_FREQIN_HPPLL1,
{
{{1, 1, 2}, CGU_CLKSET_DOMAIN10_DIV23}
}
},
/* Domain 11 (DOMAINID_SYSCLKO, clock 91 */
{
CGU_FREQIN_FFAST
},
/* Dynamic fractional divider configuration (7) */
#if 0 /* Dynamic fractional divider initialization not implemented */
{
{
CGU_DYNSEL_ALLBITS, {1, 1, 64}
},
{
CGU_DYNSEL_ALLBITS, {0, 0, 0}
},
{
CGU_DYNSEL_ALLBITS, {1, 1, 3}
},
{
CGU_DYNSEL_ALLBITS, {1, 1, 6}
},
{
CGU_DYNSEL_ALLBITS, {1, 1, 6}
},
{
CGU_DYNSEL_ALLBITS, {1, 1, 6}
},
{
CGU_DYNSEL_ALLBITS, {1, 1, 3}
}
}
#endif
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_ledinit
****************************************************************************/
nuttx/configs/ea3131/src/up_fillpage.c
+525
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@@ -0,0 +1,525 @@
/****************************************************************************
* configs/ea3131/src/up_fillpage.c
* arch/arm/src/board/up_fillpage.c
*
* Copyright (C) 2010,2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/sched.h>
#include <nuttx/page.h>
#ifdef CONFIG_PAGING
#ifdef CONFIG_PAGING_BINPATH
# include <sys/stat.h>
# include <sys/types.h>
# include <stdbool.h>
# include <unistd.h>
# include <fcntl.h>
# ifdef CONFIG_PAGING_SDSLOT
# include <stdio.h>
# include <sys/mount.h>
# include <nuttx/sdio.h>
# include <nuttx/mmcsd.h>
# include "lpc31_internal.h"
# endif
#endif
#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
# include <sys/ioctl.h>
# include <nuttx/fs/ioctl.h>
# include <nuttx/spi.h>
# include <nuttx/mtd.h>
#endif
/****************************************************************************
* Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* SD SLOT number might depend on the board configuration */
#ifdef CONFIG_ARCH_BOARD_EA3131
# define HAVE_SD 1
# define HAVE_SPINOR 1
# if defined(CONFIG_PAGING_SDSLOT) && CONFIG_PAGING_SDSLOT != 0
# error "Only one SD slot"
# undef CONFIG_PAGING_SDSLOT
# endif
#else
/* Add configuration for new LPC31XX boards here */
# error "Unrecognized LPC31XX board"
# undef CONFIG_PAGING_SDSLOT
# undef HAVE_SD
# undef HAVE_SPINOR
#endif
/* Sanity check: We can only perform paging using a single source device */
#if defined(CONFIG_PAGING_M25PX) && defined(CONFIG_PAGING_AT45DB)
# error "Both CONFIG_PAGING_M25PX and CONFIG_PAGING_AT45DB are defined"
# undef CONFIG_PAGING_M25PX
#endif
#if defined(CONFIG_PAGING_BINPATH) && defined(CONFIG_PAGING_M25PX)
# error "Both CONFIG_PAGING_BINPATH and CONFIG_PAGING_M25PX are defined"
# undef CONFIG_PAGING_BINPATH
#endif
#if defined(CONFIG_PAGING_BINPATH) && defined(CONFIG_PAGING_AT45DB)
# error "Both CONFIG_PAGING_BINPATH and CONFIG_PAGING_AT45DB are defined"
# undef CONFIG_PAGING_BINPATH
#endif
/* Are we accessing the page source data through a file path? */
#ifdef CONFIG_PAGING_BINPATH
/* Can't support SD if the board does not support SD (duh) */
# if defined(CONFIG_PAGING_SDSLOT) && !defined(HAVE_SD)
# error "This board does not support SD"
# undef CONFIG_PAGING_SDSLOT
# endif
/* Can't support SD if mountpoints are disabled or if SDIO support
* is not enabled.
*/
# if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31_MCI)
# ifdef CONFIG_PAGING_SDSLOT
# error "Mountpoints and/or MCI disabled"
# endif
# undef CONFIG_PAGING_SDSLOT
# undef HAVE_SD
# endif
/* A mountpoint for the FAT file system must be provided */
# if !defined(CONFIG_PAGING_MOUNTPT) && defined(CONFIG_PAGING_SDSLOT)
# error "No CONFIG_PAGING_MOUNTPT provided"
# undef CONFIG_PAGING_SDSLOT
# undef HAVE_SD
# endif
/* If no minor number is provided, default to zero */
# ifndef CONFIG_PAGING_MINOR
# define CONFIG_PAGING_MINOR 0
# endif
#endif /* CONFIG_PAGING_BINPATH */
/* Are we accessing the page source data through the M25P* MTD device? */
#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
/* Verify that SPI support is enabld */
#ifndef CONFIG_LPC31_SPI
# error "SPI support is not enabled"
#endif
/* Make sure that some value is defined for the offset into the FLASH
* of the NuttX binary image.
*/
# ifndef CONFIG_PAGING_BINOFFSET
# define CONFIG_PAGING_BINOFFSET 0
# endif
/* Make sure that some value is defined for the SPI port number */
# ifndef CONFIG_PAGING_SPIPORT
# define CONFIG_PAGING_SPIPORT 0
# endif
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/* State structure needed to support paging from a file */
#ifdef CONFIG_PAGING_BINPATH
struct pg_source_s
{
bool initialized; /* TRUE: we are initialized */
int fd; /* File descriptor of the nuttx.bin file */
};
#endif
/* State structured needd to support paging through the M25P* MTD interface. */
#if defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
struct pg_source_s
{
/* If interrupts or DMA are used, then we will have to defer initialization */
bool initialized; /* TRUE: we are initialized */
/* This is the M25P* device state structure */
FAR struct mtd_dev_s *mtd;
/* This the the device geometry */
#ifdef CONFIG_DEBUG
FAR struct mtd_geometry_s geo;
#endif
};
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#if defined(CONFIG_PAGING_BINPATH) || defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
static struct pg_source_s g_pgsrc;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: lpc31_initsrc()
*
* Description:
* Initialize the source device that will support paging.
* If BINPATH is defined, then it is the full path to a file on a mounted file
* system. In this case initialization will be deferred until the first
* time that up_fillpage() is called.
*
****************************************************************************/
#if defined(CONFIG_PAGING_BINPATH)
static inline void lpc31_initsrc(void)
{
#ifdef CONFIG_PAGING_SDSLOT
FAR struct sdio_dev_s *sdio;
int ret;
#endif
/* Are we already initialized? */
if (!g_pgsrc.initialized)
{
#ifdef CONFIG_PAGING_SDSLOT
char devname[16];
#endif
pgllvdbg("Initializing %s\n", CONFIG_PAGING_BINPATH);
/* No, do we need to mount an SD device? */
#ifdef CONFIG_PAGING_SDSLOT
/* Yes.. First, get an instance of the SDIO interface */
sdio = sdio_initialize(CONFIG_PAGING_SDSLOT);
DEBUGASSERT(sdio != NULL);
/* Then bind the SDIO interface to the SD driver */
ret = mmcsd_slotinitialize(CONFIG_PAGING_MINOR, sdio);
DEBUGASSERT(ret == OK);
/* Then let's guess and say that there is a card in the slot.
* (We are basically jodido anyway if there is no card in the slot).
*/
sdio_mediachange(sdio, true);
/* Now mount the file system */
snprintf(devname, 16, "/dev/mmcsd%d", CONFIG_PAGING_MINOR);
ret = mount(devname, CONFIG_PAGING_MOUNTPT, "vfat", MS_RDONLY, NULL);
DEBUGASSERT(ret == OK);
#endif /* CONFIG_PAGING_SDSLOT */
/* Open the selected path for read-only access */
g_pgsrc.fd = open(CONFIG_PAGING_BINPATH, O_RDONLY);
DEBUGASSERT(g_pgsrc.fd >= 0);
/* Then we are initialized */
g_pgsrc.initialized = true;
}
}
#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
static inline void lpc31_initsrc(void)
{
FAR struct spi_dev_s *spi;
#ifdef CONFIG_DEBUG
uint32_t capacity;
int ret;
#endif
/* Are we already initialized? */
if (!g_pgsrc.initialized)
{
/* No... the initialize now */
pgllvdbg("Initializing\n");
/* First get an instance of the SPI device interface */
spi = up_spiinitialize(CONFIG_PAGING_SPIPORT);
DEBUGASSERT(spi != NULL);
/* Then bind the SPI interface to the MTD driver */
#ifdef CONFIG_PAGING_M25PX
g_pgsrc.mtd = m25p_initialize(spi);
#else
g_pgsrc.mtd = at45db_initialize(spi);
#endif
DEBUGASSERT(g_pgsrc.mtd != NULL);
/* Verify that we can use the device */
#ifdef CONFIG_DEBUG
/* Get the device geometry. (casting to uintptr_t first eliminates
* complaints on some architectures where the sizeof long is different
* from the size of a pointer).
*/
ret = MTD_IOCTL(g_pgsrc.mtd, MTDIOC_GEOMETRY, (unsigned long)&g_pgsrc.geo);
DEBUGASSERT(ret >= 0);
capacity = g_pgsrc.geo.erasesize*g_pgsrc.geo.neraseblocks;
pgllvdbg("capacity: %d\n", capacity);
DEBUGASSERT(capacity >= (CONFIG_PAGING_BINOFFSET + PG_TEXT_VSIZE));
#endif
/* We are now initialized */
g_pgsrc.initialized = true;
}
}
#else
# define lpc31_initsrc()
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_fillpage()
*
* Description:
* After a page is allocated and mapped by up_allocpage(), the actual
* filling of the page with data from the non-volatile, must be performed
* by a separate call to the architecture-specific function, up_fillpage().
* This function is non-blocking, it will start an asynchronous page fill.
* The common paging logic will provide a callback function, pg_callback,
* that will be called when the page fill is finished (or an error occurs).
* This callback is assumed to occur from an interrupt level when the
* device driver completes the fill operation.
*
* NOTE 1: Allocating and filling a page is a two step process. up_allocpage()
* allocates the page, and up_fillpage() fills it with data from some non-
* volatile storage device. This distinction is made because up_allocpage()
* can probably be implemented in board-independent logic whereas up_fillpage()
* probably must be implemented as board-specific logic.
*
* NOTE 2: The initial mapping of vpage will be read-able, write-able,
* but non-cacheable. No special actions will be required of
* up_fillpage() in order to write into this allocated page. If the
* virtual address maps to a text region, however, this function should
* remap the region so that is is read/execute only. It should be made
* cache-able in any case.
* Input Parameters:
* tcb - A reference to the task control block of the task that needs to
* have a page fill. Architecture-specific logic can retrieve page
* fault information from the architecture-specific context
* information in this TCB to perform the fill.
* pg_callbck - The function to be called when the page fill is complete.
*
* Returned Value:
* This function will return zero (OK) if the page fill was successfully
* started (the result of the page fill is passed to the callback function
* as the result argument). A negated errno value may be returned if an
* error occurs. All errors, however, are fatal.
*
* NOTE: -EBUSY has a special meaning. It is used internally to mean that
* the callback function has not executed. Therefore, -EBUSY should
* never be provided in the result argument of pg_callback.
*
* Assumptions:
* - This function is called from the normal tasking context (but
* interrupts siabled). The implementation must take whatever actions
* are necessary to assure that the operation is safe within this context.
* - Upon return, the caller will sleep waiting for the page fill callback
* to occur. The callback function will perform the wakeup.
*
****************************************************************************/
#ifdef CONFIG_PAGING_BLOCKINGFILL
/* Version 1: Supports blocking fill operations */
int up_fillpage(FAR _TCB *tcb, FAR void *vpage)
{
#if defined(CONFIG_PAGING_BINPATH)
ssize_t nbytes;
off_t offset;
off_t pos;
#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
ssize_t nbytes;
off_t offset;
#endif
pglldbg("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
/* If BINPATH is defined, then it is the full path to a file on a mounted file
* system. In this case initialization will be deferred until the first
* time that up_fillpage() is called. Are we initialized?
*/
#if defined(CONFIG_PAGING_BINPATH)
/* Perform initialization of the paging source device (if necessary) */
lpc31_initsrc();
/* Create an offset into the binary image that corresponds to the
* virtual address. File offset 0 corresponds to PG_LOCKED_VBASE.
*/
offset = (off_t)tcb->xcp.far - PG_LOCKED_VBASE;
/* Seek to that position */
pos = lseek(g_pgsrc.fd, offset, SEEK_SET);
DEBUGASSERT(pos != (off_t)-1);
/* And read the page data from that offset */
nbytes = read(g_pgsrc.fd, vpage, PAGESIZE);
DEBUGASSERT(nbytes == PAGESIZE);
return OK;
#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB) /* !CONFIG_PAGING_BINPATH */
/* Perform initialization of the paging source device (if necessary) */
lpc31_initsrc();
/* Create an offset into the binary image that corresponds to the
* virtual address. File offset 0 corresponds to PG_LOCKED_VBASE.
*/
offset = (off_t)tcb->xcp.far - PG_LOCKED_VBASE + CONFIG_PAGING_BINOFFSET;
/* Read the page at the correct offset into the SPI FLASH device */
nbytes = MTD_READ(g_pgsrc.mtd, offset, PAGESIZE, (FAR uint8_t *)vpage);
DEBUGASSERT(nbytes == PAGESIZE);
return OK;
#else /* !CONFIG_PAGING_BINPATH && !CONFIG_PAGING_M25PX && !CONFIG_PAGING_AT45DB */
# warning "Not implemented"
return -ENOSYS;
#endif /* !CONFIG_PAGING_BINPATH && !CONFIG_PAGING_M25PX && !CONFIG_PAGING_AT45DB */
}
#else /* CONFIG_PAGING_BLOCKINGFILL */
/* Version 2: Supports non-blocking, asynchronous fill operations */
int up_fillpage(FAR _TCB *tcb, FAR void *vpage, up_pgcallback_t pg_callback)
{
pglldbg("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
#if defined(CONFIG_PAGING_BINPATH)
# error "File system-based paging must always be implemented with blocking calls"
#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
# error "SPI FLASH paging must always be implemented with blocking calls"
#else
# warning "Not implemented"
#endif
return -ENOSYS;
}
#endif /* CONFIG_PAGING_BLOCKINGFILL */
/************************************************************************************
* Name: lpc31_pginitialize
*
* Description:
* Set up mass storage device to support on demand paging.
*
************************************************************************************/
void weak_function lpc31_pginitialize(void)
{
/* This initialization does nothing in this example setup. But this function is
* where you might, for example:
*
* - Initialize and configure a mass storage device to support on-demand paging.
* This might be, perhaps an SD card or NAND memory. An SPI FLASH would probably
* already have been configured by lpc31_spiinitialize(void);
* - Set up resources to support up_fillpage() operation. For example, perhaps the
* the text image is stored in a named binary file. In this case, the virtual
* text addresses might map to offsets into that file.
* - Do whatever else is necessary to make up_fillpage() ready for the first time
* that it is called.
*
* In reality, however, this function is not very useful: This function is called
* from a low level (before os_start() is even called), it may not be possible to
* perform file system operations or even to get debug output yet. Therefore,
* to keep life simple, initialization will be deferred in all cases until the first
* time that up_fillpage() is called.
*/
}
#endif /* CONFIG_PAGING */
nuttx/configs/ea3131/src/up_leds.c
+111
View File
@@ -0,0 +1,111 @@
/****************************************************************************
* configs/ea3131/src/up_leds.c
* arch/arm/src/board/up_leds.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "lpc31_internal.h"
/****************************************************************************
* Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG with
* CONFIG_DEBUG_VERBOSE too)
*/
#undef LED_DEBUG /* Define to enable debug */
#ifdef LED_DEBUG
# define leddbg lldbg
# define ledvdbg llvdbg
#else
# define leddbg(x...)
# define ledvdbg(x...)
#endif
/* The following definitions map the encoded LED setting to GPIO settings */
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_ledinit
****************************************************************************/
#ifdef CONFIG_ARCH_LEDS
void up_ledinit(void)
{
}
/****************************************************************************
* Name: up_ledon
****************************************************************************/
void up_ledon(int led)
{
}
/****************************************************************************
* Name: up_ledoff
****************************************************************************/
void up_ledoff(int led)
{
}
#endif /* CONFIG_ARCH_LEDS */
nuttx/configs/ea3131/src/up_mem.c
+359
View File
@@ -0,0 +1,359 @@
/****************************************************************************
* configs/ea3131/src/up_mem.c
* arch/arm/src/board/up_mem.c
*
* Copyright (C) 2009-2010,2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* References:
* - NXP UM10314 LPC3130/31 User manual Rev. 1.01 — 9 September 2009
* - NXP lpc313x.cdl.drivers.zip example driver code
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "lpc31_syscreg.h"
#include "lpc31_cgudrvr.h"
#include "lpc31_mpmc.h"
#include "ea3131_internal.h"
#ifdef CONFIG_LPC31_EXTSDRAM
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The MPMC delay based on trace lengths between SDRAM and the chip and on
* the delay strategy used for SDRAM.
*/
#define EA3131_MPMC_DELAY 0x824
/*Delay constants in nanosecondss for MT48LC32M16LF SDRAM on board */
#define EA3131_SDRAM_TRP (20)
#define EA3131_SDRAM_TRFC (66)
#define EA3131_SDRAM_TRAS (44)
#define EA3131_SDRAM_TREX (75)
#define EA3131_SDRAM_TARP 4
#define EA3131_SDRAM_TWR (75)
#define EA3131_SDRAM_TRC (66)
#define EA3131_SDRAM_TRRD (15)
#define EA3131_SDRAM_TMRD (20)
#define EA3131_SDRAM_TXSR (75)
#define EA3131_SDRAM_TDAL (50)
#define EA3131_SDRAM_REFRESH (100)
#define EA3131_SDRAM_OPERREFRESH (7812)
/* Macro used to convert the above values (in nanoseconds) into units of
* the HCLK.
*/
#define NS2HCLKS(ns,hclk2,mask) \
((uint32_t)(((uint64_t)ns *(uint64_t)hclk2) / 1000000000ull) & mask)
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: lpc31_sdraminitialize
*
* Description:
* Configure SDRAM on the EA3131 board
*
* Micron Initialization Sequence from their data sheet for the Micron
* MT48LC32M16A2 32M x 16 SDRAM chip:
*
* "SDRAMs must be powered up and initialized in a predefined manner.
* Operational procedures other than those specified may result in
* undefined operation. Once power is applied to VDD and VDDQ
* (simultaneously) and the clock is stable (stable clock is defined as
* a signal cycling within timing constraints specified for the clock
* pin), the SDRAM requires a 100µs delay prior to issuing any command
* other than a COMMAND INHIBIT or NOP.
*
* "Starting at some point during this 100µs period and continuing at least
* through the end of this period, COMMAND INHIBIT or NOP commands should
* be applied. Once the 100µs delay has been satisfied with at least one
* COMMAND INHIBIT or NOP command having been applied, a PRECHARGE command
* should be applied. All banks must then be precharged, thereby placing
* the device in the all banks idle state.
*
* "Once in the idle state, two AUTO REFRESH cycles must be performed. After
* the AUTO REFRESH cycles are complete, the SDRAM is ready for mode
* register programming.
*
* "Because the mode register will power up in an unknown state, it should
* be loaded prior to applying any operational command."
*
* The JEDEC recommendation for initializing SDRAM is:
*
* APPLY POWER (Vdd/Vddq equally, and CLK is stable)
* Wait 200uS
* PRECHARGE all
* 8 AUTO REFRESH COMMANDS
* LOAD MODE REGISTER
* SDRAM is ready for operation
*
* The Micron SDRAM parts will work fine with the JEDEC sequence, but also
* allow for a quicker init sequence of:
*
* APPLY POWER (Vdd/Vddq equally, and CLK is stable)
* Wait at least 100uS (during which time start applying and
* continue applying NOP or COMMAND INHIBIT)
* PRECHARGE all
* 2 AUTO REFRESH COMMANDS (min requirement, more than 2 is also ok)
* LOAD MODE REGISTER
* SDRAM is ready for operation
*
****************************************************************************/
static void lpc31_sdraminitialize(void)
{
uint32_t tmp;
uint32_t regval;
/* These run-time calculations can be reduced dramatically if hclk is
* replaced with an apriori value.
*/
#ifdef CONFIG_LPC31_SDRAMHCLK
# define HCLK CONFIG_LPC31_SDRAMHCLK
#else
uint32_t hclk = lpc31_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS);
# define HCLK hclk
#endif
/* Check RTL for divide by 2 possible. If so change then enable the followng logic */
#if 0
uint32_t hclk2 = hclk;
if (((getreg32(LPC31_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0)
{
hclk2 >>= 1;
}
# define HCLK2 hclk2
#else
# define HCLK2 hclk
#endif
up_udelay(100);
/* Set command delay startergy */
putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC31_MPMC_DYNREADCONFIG);
/* Configure device config register nSDCE0 for proper width SDRAM */
putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
LPC31_MPMC_DYNCONFIG0);
putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK),
LPC31_MPMC_DYNRASCAS0);
/* Min 20ns program 1 so that at least 2 HCLKs are used */
putreg32(NS2HCLKS(EA3131_SDRAM_TRP, HCLK2, MPMC_DYNTRP_MASK),
LPC31_MPMC_DYNTRP);
putreg32(NS2HCLKS(EA3131_SDRAM_TRAS, HCLK2, MPMC_DYNTRAS_MASK),
LPC31_MPMC_DYNTRAS);
putreg32(NS2HCLKS(EA3131_SDRAM_TREX, HCLK2, MPMC_DYNTSREX_MASK),
LPC31_MPMC_DYNTSREX);
putreg32(EA3131_SDRAM_TARP,
LPC31_MPMC_DYNTAPR);
putreg32(NS2HCLKS(EA3131_SDRAM_TDAL, HCLK2, MPMC_DYNTDAL_MASK),
LPC31_MPMC_DYNTDAL);
putreg32(NS2HCLKS(EA3131_SDRAM_TWR, HCLK2, MPMC_DYNTWR_MASK),
LPC31_MPMC_DYNTWR);
putreg32(NS2HCLKS(EA3131_SDRAM_TRC, HCLK2, MPMC_DYNTRC_MASK),
LPC31_MPMC_DYNTRC);
putreg32(NS2HCLKS(EA3131_SDRAM_TRFC, HCLK2, MPMC_DYNTRFC_MASK),
LPC31_MPMC_DYNTRFC);
putreg32(NS2HCLKS(EA3131_SDRAM_TXSR, HCLK2, MPMC_DYNTXSR_MASK),
LPC31_MPMC_DYNTXSR);
putreg32(NS2HCLKS(EA3131_SDRAM_TRRD, HCLK2, MPMC_DYNTRRD_MASK),
LPC31_MPMC_DYNTRRD);
putreg32(NS2HCLKS(EA3131_SDRAM_TMRD, HCLK2, MPMC_DYNTMRD_MASK),
LPC31_MPMC_DYNTMRD);
up_udelay(100);
/* Issue continuous NOP commands */
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INOP),
LPC31_MPMC_DYNCONTROL);
/* Load ~200us delay value to timer1 */
up_udelay(200);
/* Issue a "pre-charge all" command */
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IPALL),
LPC31_MPMC_DYNCONTROL);
/* Minimum refresh pulse interval (tRFC) for MT48LC32M16A2=80nsec,
* 100nsec provides more than adequate interval.
*/
putreg32(NS2HCLKS(EA3131_SDRAM_REFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK),
LPC31_MPMC_DYNREFRESH);
/* Load ~250us delay value to timer1 */
up_udelay(250);
/* Recommended refresh interval for normal operation of the Micron
* MT48LC16LFFG = 7.8125usec (128KHz rate). ((HCLK / 128000) - 1) =
* refresh counter interval rate, (subtract one for safety margin).
*/
putreg32(NS2HCLKS(EA3131_SDRAM_OPERREFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK),
LPC31_MPMC_DYNREFRESH);
/* Select mode register update mode */
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IMODE),
LPC31_MPMC_DYNCONTROL);
/* Program the SDRAM internal mode registers on bank nSDCE0 and reconfigure
* the SDRAM chips. Bus speeds up to 90MHz requires use of a CAS latency = 2.
* To get correct value on address bus CAS cycle, requires a shift by 13 for
* 16bit mode
*/
tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
LPC31_MPMC_DYNCONFIG0);
putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK),
LPC31_MPMC_DYNRASCAS0);
/* Select normal operating mode */
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INORMAL),
LPC31_MPMC_DYNCONTROL);
/* Enable buffers */
regval = getreg32(LPC31_MPMC_DYNCONFIG0);
regval |= MPMC_DYNCONFIG0_B;
putreg32(regval, LPC31_MPMC_DYNCONFIG0);
putreg32((MPMC_DYNCONTROL_INORMAL|MPMC_DYNCONTROL_CS),
LPC31_MPMC_DYNCONTROL);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lpc31_meminitialize
*
* Description:
* Initialize external memory resources (sram, sdram, nand, nor, etc.)
*
****************************************************************************/
void lpc31_meminitialize(void)
{
/* Configure the LCD pins in external bus interface (EBI/MPMC) memory mode.
*
* LCD_CSB -> MPMC_NSTCS_0
* LCD_DB_1 -> MPMC_NSTCS_1
* LCD_DB_0 -> MPMC_CLKOUT
* LCD_E_RD -> MPMC_CKE
* LCD_RS -> MPMC_NDYCS
* LCD_RW_WR -> MPMC_DQM_1
* LCD_DB_2 -> EBI_A_2
* LCD_DB_3 -> EBI_A_3 l
* LCD_DB_4 -> EBI_A_4 l
* LCD_DB_5 -> EBI_A_5 l
* LCD_DB_6 -> EBI_A_6
* LCD_DB_7 -> EBI_A_7
* LCD_DB_8 -> EBI_A_8
* LCD_DB_9 -> EBI_A_9
* LCD_DB_10 -> EBI_A_10
* LCD_DB_11 -> EBI_A_11
* LCD_DB_12 -> EBI_A_12
* LCD_DB_13 -> EBI_A_13
* LCD_DB_14 -> EBI_A_14
* LCD_DB_15 -> EBI_A_15
*/
putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC31_SYSCREG_MUX_LCDEBISEL);
/* Enable EBI clock */
lpc31_enableclock(CLKID_EBICLK);
/* Enable MPMC controller clocks */
lpc31_enableclock(CLKID_MPMCCFGCLK);
lpc31_enableclock(CLKID_MPMCCFGCLK2);
lpc31_enableclock(CLKID_MPMCCFGCLK3);
/* Enable the external memory controller */
putreg32(MPMC_CONTROL_E, LPC31_MPMC_CONTROL);
/* Force HCLK to MPMC_CLK to 1:1 ratio, little-endian mode */
putreg32(0, LPC31_MPMC_CONFIG);
/* Set MPMC delay based on trace lengths between SDRAM and the chip
* and on the delay strategy used for SDRAM.
*/
putreg32(EA3131_MPMC_DELAY, LPC31_SYSCREG_MPMC_DELAYMODES);
/* Configure Micron MT48LC32M16A2 SDRAM on the EA3131 board */
lpc31_sdraminitialize();
}
#endif /* CONFIG_LPC31_EXTSDRAM */
nuttx/configs/ea3131/src/up_nsh.c
+165
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@@ -0,0 +1,165 @@
/****************************************************************************
* config/ea3131/src/up_nsh.c
* arch/arm/src/board/up_nsh.c
*
* Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#ifdef CONFIG_LPC31_MCI
# include <nuttx/sdio.h>
# include <nuttx/mmcsd.h>
#endif
#include "lpc31_internal.h"
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* PORT and SLOT number probably depend on the board configuration */
#ifdef CONFIG_ARCH_BOARD_EA3131
# define NSH_HAVEUSBDEV 1
# define NSH_HAVEMMCSD 1
# if defined(CONFIG_NSH_MMCSDSLOTNO) && CONFIG_NSH_MMCSDSLOTNO != 0
# error "Only one MMC/SD slot"
# undef CONFIG_NSH_MMCSDSLOTNO
# endif
# ifndef CONFIG_NSH_MMCSDSLOTNO
# define CONFIG_NSH_MMCSDSLOTNO 0
# endif
#else
/* Add configuration for new LPC31XX boards here */
# error "Unrecognized LPC31XX board"
# undef NSH_HAVEUSBDEV
# undef NSH_HAVEMMCSD
#endif
/* Can't support USB features if USB is not enabled */
#ifndef CONFIG_USBDEV
# undef NSH_HAVEUSBDEV
#endif
/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support
* is not enabled.
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31_MCI)
# undef NSH_HAVEMMCSD
#endif
#ifndef CONFIG_NSH_MMCSDMINOR
# define CONFIG_NSH_MMCSDMINOR 0
#endif
/* Debug ********************************************************************/
#ifdef CONFIG_CPP_HAVE_VARARGS
# ifdef CONFIG_DEBUG
# define message(...) lib_lowprintf(__VA_ARGS__)
# else
# define message(...) printf(__VA_ARGS__)
# endif
#else
# ifdef CONFIG_DEBUG
# define message lib_lowprintf
# else
# define message printf
# endif
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: nsh_archinitialize
*
* Description:
* Perform architecture specific initialization
*
****************************************************************************/
int nsh_archinitialize(void)
{
#ifdef NSH_HAVEMMCSD
FAR struct sdio_dev_s *sdio;
int ret;
/* First, get an instance of the SDIO interface */
message("nsh_archinitialize: Initializing SDIO slot %d\n",
CONFIG_NSH_MMCSDSLOTNO);
sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO);
if (!sdio)
{
message("nsh_archinitialize: Failed to initialize SDIO slot %d\n",
CONFIG_NSH_MMCSDSLOTNO);
return -ENODEV;
}
/* Now bind the SPI interface to the MMC/SD driver */
message("nsh_archinitialize: Bind SDIO to the MMC/SD driver, minor=%d\n",
CONFIG_NSH_MMCSDMINOR);
ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio);
if (ret != OK)
{
message("nsh_archinitialize: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
return ret;
}
message("nsh_archinitialize: Successfully bound SDIO to the MMC/SD driver\n");
/* Then let's guess and say that there is a card in the slot. I need to check to
* see if the LPC313X10E-EVAL board supports a GPIO to detect if there is a card in
* the slot.
*/
sdio_mediachange(sdio, true);
#endif
return OK;
}
nuttx/configs/ea3131/src/up_spi.c
+142
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@@ -0,0 +1,142 @@
/************************************************************************************
* configs/ea3131/src/up_spi.c
* arch/arm/src/board/up_spi.c
*
* Copyright (C) 2009-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "chip.h"
#include "lpc31_internal.h"
#include "ea3131_internal.h"
#ifdef CONFIG_LPC31_SPI
#if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc31_spi.c
* in arch/arm/src/lpc31xx */
/************************************************************************************
* Definitions
************************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG too) */
#undef SPI_DEBUG /* Define to enable debug */
#undef SPI_VERBOSE /* Define to enable verbose debug */
#ifdef SPI_DEBUG
# define spidbg lldbg
# ifdef SPI_VERBOSE
# define spivdbg lldbg
# else
# define spivdbg(x...)
# endif
#else
# undef SPI_VERBOSE
# define spidbg(x...)
# define spivdbg(x...)
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: lpc31_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the EA3131 board.
*
************************************************************************************/
void weak_function lpc31_spiinitialize(void)
{
/* NOTE: Clocking for SPI has already been provided. Pin configuration is performed
* on-the-fly, so no additional setup is required.
*/
}
/************************************************************************************
* Name: lpc31_spiselect and lpc31_spistatus
*
* Description:
* The external functions, lpc31_spiselect and lpc31_spistatus must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi.h). All other methods (including up_spiinitialize())
* are provided by common LPC31XX logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in lpc31_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide lpc31_spiselect() and lpc31_spistatus() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to up_spiinitialize() in your low level application
* initialization logic
* 4. The handle returned by up_spiinitialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
************************************************************************************/
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
return SPI_STATUS_PRESENT;
}
#endif /* 0 */
#endif /* CONFIG_LPC31_SPI */
nuttx/configs/ea3131/src/up_usbmsc.c
+126
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@@ -0,0 +1,126 @@
/****************************************************************************
* configs/ea3131/src/up_usbmsc.c
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Configure and register the SAM3U MMC/SD SDIO block driver.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <stdlib.h>
#include <nuttx/fs/fs.h>
#include <nuttx/fs/mkfatfs.h>
#include <nuttx/ramdisk.h>
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_EXAMPLES_USBMSC_DEVMINOR1
# define CONFIG_EXAMPLES_USBMSC_DEVMINOR1 0
#endif
#ifndef CONFIG_EXAMPLES_USBMSC_DEVPATH1
# define CONFIG_EXAMPLES_USBMSC_DEVPATH1 "/dev/ram"
#endif
static const char g_source[] = CONFIG_EXAMPLES_USBMSC_DEVPATH1;
static struct fat_format_s g_fmt = FAT_FORMAT_INITIALIZER;
#define USBMSC_NSECTORS 64
#define USBMSC_SECTORSIZE 512
#define BUFFER_SIZE (USBMSC_NSECTORS*USBMSC_SECTORSIZE)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: usbmsc_archinitialize
*
* Description:
* Perform architecture specific initialization
*
****************************************************************************/
int usbmsc_archinitialize(void)
{
uint8_t *pbuffer;
int ret;
pbuffer = (uint8_t *) malloc (BUFFER_SIZE);
if (!pbuffer)
{
lib_lowprintf ("usbmsc_archinitialize: Failed to allocate ramdisk of size %d\n",
BUFFER_SIZE);
return -ENOMEM;
}
/* Register a RAMDISK device to manage this RAM image */
ret = ramdisk_register(CONFIG_EXAMPLES_USBMSC_DEVMINOR1,
pbuffer,
USBMSC_NSECTORS,
USBMSC_SECTORSIZE,
true);
if (ret < 0)
{
printf("create_ramdisk: Failed to register ramdisk at %s: %d\n",
g_source, -ret);
free(pbuffer);
return ret;
}
/* Create a FAT filesystem on the ramdisk */
ret = mkfatfs(g_source, &g_fmt);
if (ret < 0)
{
printf("create_ramdisk: Failed to create FAT filesystem on ramdisk at %s\n",
g_source);
/* free(pbuffer); -- RAM disk is registered */
return ret;
}
return 0;
}