mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
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Resync new repository with old repo r5166
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5153 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
@@ -0,0 +1,450 @@
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/***********************************************************************
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* builtins.h
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* Definitions of built-in function calls.
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*
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* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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||||
*
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||||
***********************************************************************/
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#ifndef __BUILTINS_H
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#define __BUILTINS_H
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/***********************************************************************
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* Included Files
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***********************************************************************/
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#include <stdint.h>
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/***********************************************************************
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* Pre-processor Definitions
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***********************************************************************/
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#define MAX_BUILTIN_ARGS 3
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#define ILLEGAL_BUILTIN_INIT \
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{ NULL, 0, 0, { 0 }}
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/* SYSIO built-ins ****************y*************************************/
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||||
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||||
/* boolean _xeof(fileno); */
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#define xEOF_INIT \
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{ "_xeof", sBOOLEAN_SIZE, 1, { sINT_SIZE }}
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||||
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||||
/* boolean _xeoln(fileno); */
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#define xEOLN_INIT \
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{ "_xeoln", sBOOLEAN_SIZE, 1, { sINT_SIZE }}
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||||
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||||
/* void _xreset(int fileno); */
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#define xRESET_INIT \
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{ "_xreset", 0, 1, { sINT_SIZE }}
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||||
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||||
/* void _xrewrite(int fileno); */
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#define xREWRITE_INIT \
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{ "_xrewrite", 0, 1, { sINT_SIZE }}
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||||
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||||
/* void _xreadln(int fileno); */
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#define xREADLN_INIT \
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{ "_xreadln", 0, 1, { sINT_SIZE }}
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#define xREAD_PAGE_INIT ILLEGAL_BUILTIN_INIT
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/* void _xread_binary(int fileno, char *buffer, int buffersize); */
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#define xREAD_BINARY_INIT \
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{ "_xread_binary", 0, 3, { sINT_SIZE, sPTR_SIZE, sINT_SIZE }}
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||||
/* void _xread_int(int fileno, int *value); */
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#define xREAD_INT_INIT \
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{ "_xread_int", 0, 2, { sINT_SIZE, sPTR_SIZE }}
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||||
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||||
/* void _xread_char(int fileno, char *value); */
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#define xREAD_CHAR_INIT \
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{ "_xread_char", 0, 2, { sINT_SIZE, sPTR_SIZE }}
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||||
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/* void _xread_string(int fileno, char *string, int stringsize); */
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#define xREAD_STRING_INIT \
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{ "_xread_string", 0, 3, { sINT_SIZE, sPTR_SIZE, sINT_SIZE }}
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||||
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/* void _xread_real(int fileno, real *value); */
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#define xREAD_REAL_INIT \
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{ "_xread_real", 0, 2, { sINT_SIZE, sPTR_SIZE }}
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||||
/* void _xwriteln(int fileno); */
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#define xWRITELN_INIT \
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{ "_xwriteln", 0, 1, { sINT_SIZE }}
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||||
/* void _xwrite_page(int fileno); */
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#define xWRITE_PAGE_INIT \
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{ "_xwrite_page", 0, 1, { sINT_SIZE }}
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/* void _write_binary(int fileno, char *buffer, int buffersize); */
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#define xWRITE_BINARY_INIT \
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{ "_xwrite_binary", 0, 3, { sINT_SIZE, sPTR_SIZE, sINT_SIZE }}
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||||
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/* void _write_int(int fileno, int value); */
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#define xWRITE_INT_INIT \
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{ "_xwrite_int", 0, 2, { sINT_SIZE, sINT_SIZE }}
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||||
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/* void _write_char(int fileno, int value); */
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#define xWRITE_CHAR_INIT \
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{ "_xwrite_char", 0, 2, { sINT_SIZE, sINT_SIZE }}
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/* void _write_string(int fileno, char *string, int stringsize); */
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#define xWRITE_STRING_INIT \
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{ "_xwrite_string", 0, 3, { sINT_SIZE, sPTR_SIZE, sINT_SIZE }}
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/* void _write_real(int fileno, real value); */
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#define xWRITE_REAL_INIT \
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{ "_xwrite_real", 0, 2, { sINT_SIZE, sREAL_SIZE }}
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||||
/* Runtime library built-ins *******************************************/
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/* string _lbgetenv(string *name); */
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#define lbGETENV_INIT \
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{ "_lbgetenv", sRSTRING_SIZE, 1, { sRSTRING_SIZE }}
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/* void _lbstr2str(string src, string dest); */
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#define lbSTR2STR_INIT \
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{ "_lbstgr2str", 0, 2, { sRSTRING_SIZE, sRSTRING_SIZE }}
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/* void _lbcstr2str(string src, string dest); */
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#define lbCSTR2STR_INIT \
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{ "_lbcstr2str", 0, 2, { sRSTRING_SIZE, sRSTRING_SIZE }}
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/* void _libstr2rstr(string src, string dest); */
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#define lbSTR2RSTR_INIT \
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{ "_lbstr2rstr", 0, 2, { sRSTRING_SIZE, sRSTRING_SIZE }}
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/* void _lbcstr2str(string src, string dest); */
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#define lbCSTR2RSTR_INIT \
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{ "_lbcstr2rstr", 0, 2, { sRSTRING_SIZE, sRSTRING_SIZE }}
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/* void _lbval(const string s, int *v, int *code); */
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#define lbVAL_INIT \
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{ "_lbval", 0, 2, { sRSTRING_SIZE, sPTR_SIZE, sPTR_SIZE }}
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||||
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||||
/* string _lbmkstk(void); */
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#define lbMKSTK_INIT \
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{ "_lbmkstk", sRSTRING_SIZE, 0, { 0 }}
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||||
/* string mkstkstr(string name); */
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#define lbMKSTKSTR_INIT \
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{ "_lbmkstkstr", sRSTRING_SIZE, 1, { sRSTRING_SIZE }}
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||||
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||||
/* string _lbmkstkc(int c); */
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#define lbMKSTKC_INIT \
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{ "_lbmkstkc", sRSTRING_SIZE, 1, { sINT_SIZE }}
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||||
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/* string _lbstgrcat(string name, int c); */
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#define lbSTRCAT_INIT \
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{ "_lbstrcat", sRSTRING_SIZE, 2, { sRSTRING_SIZE, sINT_SIZE }}
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||||
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||||
/* string _lbstrcatc(string name, int c); */
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#define lbSTRCATC_INIT \
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{ "_lbstrcatc", sRSTRING_SIZE, 2, { sRSTRING_SIZE, sINT_SIZE }}
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||||
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||||
/* int _lbstrcmp(string name1, string name2); */
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#define lbSTRCMP_INIT \
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{ "_lbstrcmp", sINT_SIZE, 2, { sRSTRING_SIZE, sRSTRING_SIZE }}
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||||
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||||
/* Floating point library built-ins ************************************/
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/* real _fpfloat(int v); */
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#define fpFLOAT_INIT \
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{ "_fpfloat", sREAL_SIZE, 1, { sINT_SIZE }}
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/* int _fptrunc(real v); */
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#define fpTRUNC_INIT \
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{ "_fptrunc", sINT_SIZE, 1, { sREAL_SIZE }}
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/* int _fpround(real v); */
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#define fpROUND_INIT \
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{ "_fpround", sINT_SIZE, 1, { sREAL_SIZE }}
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/* real _fpadd_rr(real a, real b); */
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#define fpADD_RR_INIT \
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{ "_fpadd_rr", sREAL_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
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/* real _fpadd_ri(int a, real b); */
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#define fpADD_RI_INIT \
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{ "_fpadd_ri", sREAL_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
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/* real _fpadd_ir(real a, int b); */
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#define fpADD_IR_INIT \
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{ "_fpadd_ir", sREAL_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
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/* real _fpadd_ii(int a, int b); */
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#define fpADD_II_INIT \
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{ "_fpadd_ii", sREAL_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
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/* real _fpsub_rr(real a, real b); */
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#define fpSUB_RR_INIT \
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{ "_fpsub_rr", sREAL_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
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/* real _fpsub_ri(int a, real b); */
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#define fpSUB_RI_INIT \
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{ "_fpsub_ri", sREAL_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
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/* real _fpsub_ir(real a, int b); */
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#define fpSUB_IR_INIT \
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{ "_fpsub_ir", sREAL_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
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/* real _fpsub_ii(int a, int b); */
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#define fpSUB_II_INIT \
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{ "_fpsub_ii", sREAL_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
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/* real _fpmul_rr(real a, real b); */
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#define fpMUL_RR_INIT \
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{ "_fpmul_rr", sREAL_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
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/* real _fpmul_ri(int a, real b); */
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#define fpMUL_RI_INIT \
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{ "_fpmul_ri", sREAL_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
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/* real _fpmul_ir(real a, int b); */
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#define fpMUL_IR_INIT \
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{ "_fpmul_ir",sREAL_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
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/* real _fpmul_ii(int a, int b); */
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#define fpMUL_II_INIT \
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{ "_fpmul_ii", sREAL_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
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/* real _fpdiv_rr(real a, real b); */
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#define fpDIV_RR_INIT \
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{ "_fpdiv_rr", sREAL_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
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/* real _fpdiv_ri(int a, real b); */
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#define fpDIV_RI_INIT \
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{ "_fpdiv_ri",sREAL_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
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/* real _fpdiv_ir(real a, int b); */
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#define fpDIV_IR_INIT \
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{ "_fpdiv_ir",sREAL_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
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||||
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/* real _fpdiv_ii(int a, int b); */
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#define fpDIV_II_INIT \
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{ "_fpdiv_ii",sREAL_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
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/* real _fpmod_rr(real a, real b); */
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#define fpMOD_RR_INIT \
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{ "_fpmod_rr", sREAL_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
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||||
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/* real _fpmod_ri(int a, real b); */
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#define fpMOD_RI_INIT \
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{ "_fpmod_ri", sREAL_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
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/* real _fpmod_ir(real a, int b); */
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#define fpMOD_IR_INIT \
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{ "_fpmod_ir", sREAL_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
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||||
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||||
/* real _fpmod_ii(int a, int b); */
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#define fpMOD_II_INIT \
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{ "_fpmod_ii", sREAL_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
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/* boolean _fpequ_rr(real a, real b); */
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#define fpEQU_RR_INIT \
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{ "_fpequ_rr", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
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/* boolean _fpequ_ri(int a, real b); */
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#define fpEQU_RI_INIT \
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{ "_fpequ_ri", sBOOLEAN_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
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/* boolean _fpequ_ir(real a, int b); */
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#define fpEQU_IR_INIT \
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{ "_fpequ_ir", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
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||||
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||||
/* boolean _fpequ_ii(int a, int b); */
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#define fpEQU_II_INIT \
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{ "_fpequ_ii", sBOOLEAN_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
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/* boolean _fpneq_rr(real a, real b); */
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#define fpNEQ_RR_INIT \
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{ "_fpneq_rr", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
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||||
/* boolean _fpneq_ri(int a, real b); */
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#define fpNEQ_RI_INIT \
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{ "_fpneq_ri", sBOOLEAN_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
|
||||
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||||
/* boolean _fpneq_ir(real a, int b); */
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#define fpNEQ_IR_INIT \
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{ "_fpneq_ir", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fpneq_ii(int a, int b); */
|
||||
#define fpNEQ_II_INIT \
|
||||
{ "_fpneq_ii", sBOOLEAN_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fplt_rr(real a, real b); */
|
||||
#define fpLT_RR_INIT \
|
||||
{ "_fplt_rr", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fplt_ri(int a, real b); */
|
||||
#define fpLT_RI_INIT \
|
||||
{ "_fplt_ri", sBOOLEAN_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fplt_ir(real a, int b); */
|
||||
#define fpLT_IR_INIT \
|
||||
{ "_fplt_ir", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fplt_ii(int a, int b); */
|
||||
#define fpLT_II_INIT \
|
||||
{ "_fplt_ii", sBOOLEAN_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fpgte_rr(real a, real b); */
|
||||
#define fpGTE_RR_INIT \
|
||||
{ "_fpgte_rr", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fpgte_ri(int a, real b); */
|
||||
#define fpGTE_RI_INIT \
|
||||
{ "_fpgte_ri", sBOOLEAN_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fpgte_ir(real a, int b); */
|
||||
#define fpGTE_IR_INIT \
|
||||
{ "_fpgte_ir", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fpgte_ii(int a, int b); */
|
||||
#define fpGTE_II_INIT \
|
||||
{ "_fpgte_ii", sBOOLEAN_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fpgt_rr(real a, real b); */
|
||||
#define fpGT_RR_INIT \
|
||||
{ "_fpgt_rr", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fpgt_ri(int a, real b); */
|
||||
#define fpGT_RI_INIT \
|
||||
{ "_fpgt_ri", sBOOLEAN_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fpgt_ir(real a, int b); */
|
||||
#define fpGT_IR_INIT \
|
||||
{ "_fpgt_ir", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fpgt_ii(int a, int b); */
|
||||
#define fpGT_II_INIT \
|
||||
{ "_fpgt_ii", sBOOLEAN_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fplte_rr(real a, real b); */
|
||||
#define fpLTE_RR_INIT \
|
||||
{ "_fplte_rr", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fplte_ri(int a, real b); */
|
||||
#define fpLTE_RI_INIT \
|
||||
{ "_fplte_ri", sBOOLEAN_SIZE, 2, { sINT_SIZE, sREAL_SIZE }}
|
||||
|
||||
/* boolean _fplte_ir(real a, int b); */
|
||||
#define fpLTE_IR_INIT \
|
||||
{ "_fplte_ir", sBOOLEAN_SIZE, 2, { sREAL_SIZE, sINT_SIZE }}
|
||||
|
||||
/* boolean _fplte_ii(int a, int b); */
|
||||
#define fpLTE_II_INIT \
|
||||
{ "_fplte_ii", sBOOLEAN_SIZE, 2, { sINT_SIZE, sINT_SIZE }}
|
||||
|
||||
/* real _fpneg_r(real v); */
|
||||
#define fpNEG_R_INIT \
|
||||
{ "_fpneg_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpneg_i(int v); */
|
||||
#define fpNEG_I_INIT \
|
||||
{ "_fpneg_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpabs_r(real v); */
|
||||
#define fpABS_R_INIT \
|
||||
{ "_fpabs_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpabs_i(int v); */
|
||||
#define fpABS_I_INIT \
|
||||
{ "_fpabs_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpsqr_r(real v); */
|
||||
#define fpSQR_R_INIT \
|
||||
{ "_fpsqr_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpsqr_i(int v); */
|
||||
#define fpSQR_I_INIT \
|
||||
{ "_fpsqr_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpsqrt_r(real v); */
|
||||
#define fpSQRT_R_INIT \
|
||||
{ "_fpsqrt_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpsqrt_i(int v); */
|
||||
#define fpSQRT_I_INIT \
|
||||
{ "_fpsqrt_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpsin_r(real v); */
|
||||
#define fpSIN_R_INIT \
|
||||
{ "_fpsin_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpsin_i(int v); */
|
||||
#define fpSIN_I_INIT \
|
||||
{ "_fpsin_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpcos_r(real v); */
|
||||
#define fpCOS_R_INIT \
|
||||
{ "_fpcos_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpcos_i(int v); */
|
||||
#define fpCOS_I_INIT \
|
||||
{ "_fpcos_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpatan_r(real v); */
|
||||
#define fpATAN_R_INIT \
|
||||
{ "_fpatan_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpatan_i(int v); */
|
||||
#define fpATAN_I_INIT \
|
||||
{ "_fpatan_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpln_r(real v); */
|
||||
#define fpLN_R_INIT \
|
||||
{ "_fpln_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpln_i(int v); */
|
||||
#define fpLN_I_INIT \
|
||||
{ "_fpln_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/* real _fpexp_r(real v); */
|
||||
#define fpEXP_R_INIT \
|
||||
{ "_fpexpr_r", sREAL_SIZE, 1, { sREAL_SIZE }}
|
||||
|
||||
/* real _fpexp_i(int v); */
|
||||
#define fpEXP_I_INIT \
|
||||
{ "_fpexpr_i", sREAL_SIZE, 1, { sINT_SIZE }}
|
||||
|
||||
/***********************************************************************
|
||||
* Public Types
|
||||
***********************************************************************/
|
||||
|
||||
struct regm_builtin_s
|
||||
{
|
||||
const char *szName;
|
||||
uint32_t wRetSize;
|
||||
uint32_t nParms;
|
||||
uint32_t wArgSize[MAX_BUILTIN_ARGS];
|
||||
};
|
||||
|
||||
#endif /* __BUILTINS_H */
|
||||
@@ -0,0 +1,160 @@
|
||||
/****************************************************************************
|
||||
* pexec.h
|
||||
*
|
||||
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __PEXEC_H
|
||||
#define __PEXEC_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define BPERI 2
|
||||
#define ITOBSTACK(i) ((i) << 1)
|
||||
#define BTOISTACK(i) ((i) >> 1)
|
||||
#define ROUNDBTOI(i) (((i) + 1) >> 1)
|
||||
|
||||
/****************************************************************************
|
||||
* Type Definitions
|
||||
****************************************************************************/
|
||||
|
||||
typedef uint32_t ustack_t; /* Stack values are 16-bits in length */
|
||||
typedef int32_t sstack_t;
|
||||
typedef uint32_t paddr_t; /* Addresses are 16-bits in length */
|
||||
typedef uint16_t level_t; /* Limits to MAXUINT16 levels */
|
||||
|
||||
union stack_u
|
||||
{
|
||||
ustack_t *i;
|
||||
uint8_t *b;
|
||||
};
|
||||
typedef union stack_u stackType;
|
||||
|
||||
/* This structure describes the parameters needed to initialize the p-code
|
||||
* interpreter.
|
||||
*/
|
||||
|
||||
struct pexec_attr_s
|
||||
{
|
||||
/* Instruction space (I-Space) */
|
||||
|
||||
FAR uint8_t *ispace; /* Allocated I-Space containing p-code data */
|
||||
paddr_t entry; /* Entry point */
|
||||
paddr_t maxpc; /* Last valid p-code address */
|
||||
|
||||
/* Read-only data block */
|
||||
|
||||
FAR uint8_t *rodata; /* Address of read-only data block */
|
||||
paddr_t rosize; /* Size of read-only data block */
|
||||
|
||||
/* Allocate for variable storage */
|
||||
|
||||
paddr_t varsize; /* Variable storage size */
|
||||
paddr_t strsize; /* String storage size */
|
||||
};
|
||||
|
||||
/* This structure defines the current state of the p-code interpreter */
|
||||
|
||||
struct pexec_s
|
||||
{
|
||||
/* This is the emulated P-Machine stack (D-Space) */
|
||||
|
||||
stackType dstack;
|
||||
|
||||
/* This is the emulated P-Machine instruction space (I-Space) */
|
||||
|
||||
FAR uint8_t *ispace;
|
||||
|
||||
/* Address of last valid P-Code */
|
||||
|
||||
paddr_t maxpc;
|
||||
|
||||
/* These are the emulated P-Machine registers:
|
||||
*
|
||||
* spb: Base of the stack
|
||||
* sp: The Pascal stack pointer
|
||||
* lsp: Level stack pointer
|
||||
* csp: The current top of the stack used to manage string
|
||||
* storage
|
||||
* fp: Base Register of the current stack frame. Holds the address
|
||||
* of the base of the stack frame of the current block.
|
||||
* fop: Pointer to section containing read-only data
|
||||
* pc: Holds the current p-code location
|
||||
*/
|
||||
|
||||
paddr_t spb; /* Pascal stack base */
|
||||
paddr_t sp; /* Pascal stack pointer */
|
||||
paddr_t lsp; /* Level stack pointer */
|
||||
paddr_t csp; /* Character stack pointer */
|
||||
paddr_t fp; /* Base of the current frame */
|
||||
paddr_t rop; /* Read-only data pointer */
|
||||
paddr_t pc; /* Program counter */
|
||||
|
||||
/* Info needed to perform a simulated reset */
|
||||
|
||||
paddr_t strsize; /* String stack size */
|
||||
paddr_t rosize; /* Read-only stack size */
|
||||
paddr_t entry; /* Entry point */
|
||||
paddr_t stacksize; /* (debug only) */
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C" {
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
EXTERN FAR struct pexec_s *pload(const char *filename, paddr_t varsize, paddr_t strsize);
|
||||
EXTERN FAR struct pexec_s *pexec_init(struct pexec_attr_s *attr);
|
||||
EXTERN int pexec(FAR struct pexec_s *st);
|
||||
EXTERN void pexec_reset(struct pexec_s *st);
|
||||
EXTERN void pexec_release(struct pexec_s *st);
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PEXEC_H */
|
||||
@@ -0,0 +1,426 @@
|
||||
/****************************************************************************
|
||||
* pinsn32.h
|
||||
* 32-bit P-code operation code definitions
|
||||
*
|
||||
* Copyright (C) 2008 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __PINSN32_H
|
||||
#define __PINSN32_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* 32-bit op-code bit definitions
|
||||
*
|
||||
* Machine model:
|
||||
*
|
||||
* SPB 32-bit Pascal stack base address
|
||||
* SP 32-bit Pascal stack pointer
|
||||
* LSP 32-bit Level stack pointer
|
||||
* CSB 32-bit Character stack base address
|
||||
* CSP 32-bit Character stack pointer
|
||||
* DS 32-bit Data size register (for multiple reg transfers)
|
||||
* PC 32-bit Program Counter
|
||||
* CC Condition code register
|
||||
* --- Volatile general purpose registers
|
||||
* --- Static general purpose registers
|
||||
*
|
||||
* Condition codes: Z(ero), N(egative)
|
||||
*
|
||||
* +=====+=====+
|
||||
* | Z | N |
|
||||
* +=====+=====+=====+
|
||||
* | EQ | 1 | - |
|
||||
* | NEQ | 0 | - |
|
||||
* | LT | - | 1 |
|
||||
* | GTE | - | 0 |
|
||||
* | GT | 0 | 0 |
|
||||
* | LTE | 1 | 1 |
|
||||
* +=====+=====+=====+
|
||||
*
|
||||
* Opcode Encoding Summary:
|
||||
*
|
||||
* 0rxx xxxx 1rxxx xxxx
|
||||
* xr00 0000 NOP LD uoffs4
|
||||
* xr00 0001 NEG LDH uoffs3
|
||||
* xr00 0010 ABS LDB uoffs
|
||||
* xr00 0011 INC LDM uoffs4
|
||||
* xr00 0100 DEC ST uoffs4
|
||||
* xr00 0101 NOT STH uoffs2
|
||||
* xr00 0110 ADD STB uoffs
|
||||
* xr00 0111 SUB STM uoffs4
|
||||
* xr00 1000 MUL LDX uoffs4
|
||||
* xr00 1001 DIV LDXH uoffs2
|
||||
* xr00 1010 MOD LDXB uoffs
|
||||
* xr00 1011 SLL LDXM uoffs4
|
||||
* xr00 1100 SRL STX uoffs4
|
||||
* xr00 1101 SRA STXH uoffs2
|
||||
* xr00 1110 OR STXB uoffs
|
||||
* xr00 1111 AND STXM uoffs
|
||||
*
|
||||
* xr01 0000 EQUZ JEQUZ ilbl
|
||||
* xr01 0001 NEQZ JNEQZ ilbl
|
||||
* xr01 0010 LTZ JLTZ ilbl
|
||||
* xr01 0011 GTEZ JGTEZ ilbl
|
||||
* xr01 0100 GTZ JGTZ ilbl
|
||||
* xr01 0101 LTEZ JLTEZ ilbl
|
||||
* xr01 0110 --- JMP ilbl
|
||||
* xr01 0111 --- PUSH nn
|
||||
* xr01 1000 EQU JEQU ilbl
|
||||
* xr01 1001 NEQ JNEQ ilbl
|
||||
* xr01 1010 LT JLT ilbl
|
||||
* xr01 1011 GTE JGTE ilbl
|
||||
* xr01 1100 GT JGT ilbl
|
||||
* xr01 1101 LTE JLTE ilbl
|
||||
* xr01 1110 --- ---
|
||||
* xr01 1111 BIT INDS nn
|
||||
*
|
||||
* xr10 0000 LDI LDS offs4
|
||||
* xr10 0001 LDIH LDSH offs3
|
||||
* xr10 0010 LDIB LDSB offs
|
||||
* xr10 0011 LDIM LDSM offs4
|
||||
* xr10 0100 STI STS offs4
|
||||
* xr10 0101 STIH STSH offs2
|
||||
* xr10 0110 STIB STSB offs
|
||||
* xr10 0111 STIM STSM offs4
|
||||
* xr10 1000 DUP LDSX offs4
|
||||
* xr10 1001 --- LDSXH offs2
|
||||
* xr10 1010 PUSHS LDSXB offs
|
||||
* xr10 1011 POPS LDSXM offs4
|
||||
* xr10 1100 --- STSX offs4
|
||||
* xr10 1101 --- STSXH offs2
|
||||
* xr10 1110 --- STSXB offs
|
||||
* xr10 1111 RET STSXM offs
|
||||
*
|
||||
* xr11 0000 --- LA uoffs
|
||||
* xr11 0001 --- LAS offs
|
||||
* xr11 0010 --- LAC dlbl
|
||||
* xr11 0011 --- ---
|
||||
* xr11 0100 --- LAX uoffs
|
||||
* xr11 0101 --- LASX offs
|
||||
* xr11 0110 --- SLSP level
|
||||
* xr11 0111 --- SDC uu
|
||||
* xr11 1000 --- ---
|
||||
* xr11 1001 --- PCAL ilbl
|
||||
* xr11 1010 --- SYSIO fn,sop
|
||||
* xr11 1011 --- LIB lop
|
||||
* xr11 1100 --- FLOAT fop
|
||||
* xr11 1101 --- *LABEL ilbl
|
||||
* xr11 1110 --- *INCLUDE fn
|
||||
* xr11 1111 END *LINE lineno
|
||||
*
|
||||
* KEY:
|
||||
* r = Reserved bit (must be zero)
|
||||
* fn = 8-bit file number
|
||||
* lvl = 8-bit static nexting level
|
||||
* sop = 17-bit sysio operation
|
||||
* lineno = 17-bit line number
|
||||
* nn = 32-bit constant value (signed)
|
||||
* uu = 32-bit constant value (unsigned)
|
||||
* fop = 32-bit floating point operation
|
||||
* lop = 32-bit library call identifier
|
||||
* ilbl = 32-bit Instruction space label number
|
||||
* dlbl = 32-stack data label
|
||||
* offs4 = 32-bit word offset with respect to LSP (signed)
|
||||
* offs2 = 32-bit halfword offset with respect to LSP (signed)
|
||||
* offs = 32-bit byte offset with respect to LSP (signed)
|
||||
* uoffs4 = 32-bit word offset with respect to SPB (unsigned)
|
||||
* uoffs2 = 32-bit halfword offset with respect to SPB (unsigned)
|
||||
* uoffs = 32-bit byte offset with respect to SPB (unsigned)
|
||||
* c = string follows pseudo-operation
|
||||
* * = Indicates pseudo-operations (these are removed
|
||||
* after final fixup of the object file).
|
||||
*/
|
||||
|
||||
#define o32 (0x80)
|
||||
|
||||
#define GETOP(o) ((o)->op)
|
||||
#define PUTOP(o,v) do { (o)->op = (v); } while (0)
|
||||
|
||||
#define GETARG(o) ((o)->arg)
|
||||
#define PUTARG(o,a) do { (o)->arg = (a); } while (0)
|
||||
|
||||
#define ARGONES 0xffffffff
|
||||
|
||||
/* The opcode binary is stored in big endian order (so that the opcode
|
||||
* always comes first). The following definitions simplify ordering
|
||||
* of byte accesses.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ENDIAN_BIG
|
||||
# define opB1 0
|
||||
# define opB2 1
|
||||
# define opB3 2
|
||||
# define opB4 3
|
||||
#else
|
||||
# define opB1 3
|
||||
# define opB2 2
|
||||
# define opB3 1
|
||||
# define opB4 0
|
||||
#endif
|
||||
|
||||
/** 1-BYTE OPCODES WITH NO ARGUMENTS (other than stack arguments) ***********/
|
||||
|
||||
/* Program control (No stack arguments) */
|
||||
|
||||
#define oNOP (0x00)
|
||||
|
||||
/* Arithmetic & logical & and integer conversions (One 32-bit stack
|
||||
* argument)
|
||||
*/
|
||||
|
||||
#define oNEG (0x01)
|
||||
#define oABS (0x02)
|
||||
#define oINC (0x03)
|
||||
#define oDEC (0x04)
|
||||
#define oNOT (0x05)
|
||||
#define oADD (0x06)
|
||||
#define oSUB (0x07)
|
||||
#define oMUL (0x08)
|
||||
#define oDIV (0x09)
|
||||
#define oMOD (0x0a)
|
||||
#define oSLL (0x0b)
|
||||
#define oSRL (0x0c)
|
||||
#define oSRA (0x0d)
|
||||
#define oOR (0x0e)
|
||||
#define oAND (0x0f)
|
||||
|
||||
/* Comparisons (One 32-bit stack argument) */
|
||||
|
||||
#define oEQUZ (0x10)
|
||||
#define oNEQZ (0x11)
|
||||
#define oLTZ (0x12)
|
||||
#define oGTEZ (0x13)
|
||||
#define oGTZ (0x14)
|
||||
#define oLTEZ (0x15)
|
||||
|
||||
/* Comparisons (Two 32-bit stack arguments) */
|
||||
|
||||
#define oEQU (0x18)
|
||||
#define oNEQ (0x19)
|
||||
#define oLT (0x1a)
|
||||
#define oGTE (0x1b)
|
||||
#define oGT (0x1c)
|
||||
#define oLTE (0x1d)
|
||||
#define oBIT (0x1f)
|
||||
|
||||
/* Load Immediate */
|
||||
|
||||
#define oLDI (0x20) /* (One 32-bit stack argument) */
|
||||
#define oLDIH (0x21) /* (One 32-bit stack argument) */
|
||||
#define oLDIB (0x22) /* (One 32-bit stack argument) */
|
||||
#define oLDIM (0x23) /* (Two 32-bit stack argument) */
|
||||
|
||||
/* Store Immediate */
|
||||
|
||||
#define oSTI (0x24) /* (Two 32-bit stack argument) */
|
||||
#define oSTIH (0x25) /* (Two 32-bit stack argument) */
|
||||
#define oSTIB (0x26) /* (Two 32-bit stack argument) */
|
||||
#define oSTIM (0x27) /* (Two+n 32-bit stack argument) */
|
||||
|
||||
/* Data stack */
|
||||
|
||||
#define oDUP (0x28) /* (One 32-bit stack argument) */
|
||||
#define oDUPH (0x29) /* (One 32-bit stack argument) */
|
||||
#define oPUSHS (0x2a) /* No stack arguments */
|
||||
#define oPOPS (0x2b) /* (One 32-bit stack argument) */
|
||||
|
||||
/* Program control (No stack arguments)
|
||||
* Behavior:
|
||||
* Pop return address
|
||||
* Pop saved base register (BR)
|
||||
* Discard saved base address
|
||||
* Set program counter (PC) to return address
|
||||
*/
|
||||
|
||||
#define oRET (0x2f)
|
||||
|
||||
/* System Functions (No stack arguments) */
|
||||
|
||||
#define oEND (0x3f)
|
||||
|
||||
/** 4-BYTE OPCODES INCLUDING ONE 32-BIT ARGUMENT ****************************/
|
||||
|
||||
/* Load: arg = unsigned base offset */
|
||||
|
||||
#define oLD (o32|0x00) /* No stack arguments */
|
||||
#define oLDH (o32|0x01) /* No stack arguments */
|
||||
#define oLDB (o32|0x02) /* No stack arguments */
|
||||
#define oLDM (o32|0x03) /* One 32-bit stack argument */
|
||||
|
||||
/* Store: arg = unsigned base offset */
|
||||
|
||||
#define oST (o32|0x04) /* One 32-bit stack argument */
|
||||
#define oSTH (o32|0x05) /* One 32-bit stack argument */
|
||||
#define oSTB (o32|0x06) /* One 32-bit stack argument */
|
||||
#define oSTM (o32|0x07) /* One+n 32-bit stack argument */
|
||||
|
||||
/* Load Indexed: arg = unsigned base offset */
|
||||
|
||||
#define oLDX (o32|0x08) /* One 32-bit stack argument */
|
||||
#define oLDXH (o32|0x09) /* One 32-bit stack argument */
|
||||
#define oLDXB (o32|0x0a) /* One 32-bit stack argument */
|
||||
#define oLDXM (o32|0x0b) /* Two 32-bit stack argument */
|
||||
|
||||
/* Store Indexed: arg = unsigned base offset */
|
||||
|
||||
#define oSTX (o32|0x0c) /* Two 32-bit stack argument */
|
||||
#define oSTXH (o32|0x0d) /* Two 32-bit stack argument */
|
||||
#define oSTXB (o32|0x0e) /* Two 32-bit stack argument */
|
||||
#define oSTXM (o32|0x0f) /* Two+n 32-bit stack argument */
|
||||
|
||||
/* Program control: arg = unsigned label (One 32-bit stack argument) */
|
||||
|
||||
#define oJEQUZ (o32|0x10)
|
||||
#define oJNEQZ (o32|0x11)
|
||||
#define oJLTZ (o32|0x12)
|
||||
#define oJGTEZ (o32|0x13)
|
||||
#define oJGTZ (o32|0x14)
|
||||
#define oJLTEZ (o32|0x15)
|
||||
|
||||
/* Program control: arg = unsigned label (no stack arguments) */
|
||||
|
||||
#define oJMP (o32|0x16)
|
||||
|
||||
/* Data stack: arg = 32 bit signed data (no stack arguments) */
|
||||
|
||||
#define oPUSH (o32|0x17)
|
||||
|
||||
/* Program control: arg = unsigned label (One 32-bit stack argument) */
|
||||
|
||||
#define oJEQU (o32|0x18)
|
||||
#define oJNEQ (o32|0x19)
|
||||
#define oJLT (o32|0x1a)
|
||||
#define oJGTE (o32|0x1b)
|
||||
#define oJGT (o32|0x1c)
|
||||
#define oJLTE (o32|0x1d)
|
||||
|
||||
/* Data stack: arg = 32 bit signed data (no stack arguments) */
|
||||
|
||||
#define oINDS (o32|0x1f)
|
||||
|
||||
/* Load: Uses LSP; arg = signed frame offset */
|
||||
|
||||
#define oLDS (o32|0x20) /* No stack arguments */
|
||||
#define oLDSH (o32|0x21) /* No stack arguments */
|
||||
#define oLDSB (o32|0x22) /* No stack arguments */
|
||||
#define oLDSM (o32|0x23) /* One 32-bit stack argument */
|
||||
|
||||
/* Store: Uses LSP; arg = signed frame offset */
|
||||
|
||||
#define oSTS (o32|0x24) /* One 32-bit stack argument */
|
||||
#define oSTSH (o32|0x25) /* One 32-bit stack argument */
|
||||
#define oSTSB (o32|0x26) /* One 32-bit stack argument */
|
||||
#define oSTSM (o32|0x27) /* One+n 32-bit stack argument */
|
||||
|
||||
/* Load Indexed: Uses LSP; arg = signed frame offset */
|
||||
|
||||
#define oLDSX (o32|0x28) /* One 32-bit stack argument */
|
||||
#define oLDSXH (o32|0x29) /* One 32-bit stack argument */
|
||||
#define oLDSXB (o32|0x2a) /* One 32-bit stack argument */
|
||||
#define oLDSXM (o32|0x2b) /* Two 32-bit stack argument */
|
||||
|
||||
/* Store Indexed: Uses LSP; arg = signed frame offset */
|
||||
|
||||
#define oSTSX (o32|0x2c) /* Two 32-bit stack argument */
|
||||
#define oSTSXH (o32|0x2d) /* Two 32-bit stack argument */
|
||||
#define oSTSXB (o32|0x2e) /* Two 32-bit stack argument */
|
||||
#define oSTSXM (o32|0x2f) /* Two+n 32-bit stack argument */
|
||||
|
||||
/* Load address relative to stack base: arg = unsigned offset */
|
||||
|
||||
#define oLA (o32|0x30)
|
||||
|
||||
/* Load address: Uses SLP, arg = signed frame offset */
|
||||
|
||||
#define oLAS (o32|0x31) /* No stack arguments */
|
||||
|
||||
/* Load absolute stack address: arg = RODATA offset (No stack arguments) */
|
||||
|
||||
#define oLAC (o32|0x32)
|
||||
|
||||
/* Load address relative to stack base: arg = unsigned offset, TOS=index */
|
||||
|
||||
#define oLAX (o32|0x34)
|
||||
|
||||
/* Load address indexed: Uses SLP, arg = signed frame offset */
|
||||
|
||||
#define oLASX (o32|0x35) /* No stack arguments */
|
||||
|
||||
/* Set LSP: arg = new level that evaluates to LSP value */
|
||||
|
||||
#define oSLSP (o32|0x36)
|
||||
|
||||
/* Set DS: arg = new byte count in DS register */
|
||||
|
||||
#define oSDC (o32|0x37)
|
||||
|
||||
/* Program Control: Uses LSP; arg = unsigned label
|
||||
* (No stack arguments)
|
||||
* Behavior:
|
||||
* Push base address of level
|
||||
* Push base register (BR) value
|
||||
* Set new base register value (BR) as top of stack
|
||||
* Push return address
|
||||
* Set program counter (PC) for address associated with label
|
||||
*/
|
||||
|
||||
#define oPCAL (o32|0x39)
|
||||
|
||||
/* System calls: arg = file number | sub-function code */
|
||||
|
||||
#define oSYSIO (o32|0x3a)
|
||||
|
||||
/* System functions: arg = 32-bit library call identifier */
|
||||
|
||||
#define oLIB (o32|0x3b)
|
||||
|
||||
/* Floating point operations: arg = FP op-code */
|
||||
|
||||
#define oFLOAT (o32|0x3c)
|
||||
|
||||
/* Program control: arg = unsigned label (no stack arguments) */
|
||||
|
||||
#define oLABEL (o32|0x3d)
|
||||
|
||||
/* Pseudo-operations: arg = file number OR line number */
|
||||
|
||||
#define oINCLUDE (o32|0x3e)
|
||||
#define oLINE (o32|0x3f)
|
||||
|
||||
#endif /* __PINSN32_H */
|
||||
@@ -0,0 +1,226 @@
|
||||
/***********************************************************************
|
||||
* rinsn32.h
|
||||
* 32-bit register module instruction definitions
|
||||
*
|
||||
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
***********************************************************************/
|
||||
|
||||
#ifndef __RINSN32_H
|
||||
#define __RINSN32_H
|
||||
|
||||
/***********************************************************************
|
||||
* Included Files
|
||||
***********************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/***********************************************************************
|
||||
* Pre-processor Definitions
|
||||
***********************************************************************/
|
||||
|
||||
/* 32-bit op-code bit definitions
|
||||
*
|
||||
* Machine model:
|
||||
*
|
||||
* SPB 32-bit Pascal stack base address
|
||||
* SP 32-bit Pascal stack pointer
|
||||
* LSP 32-bit level stack pointer
|
||||
* CSB 32-bit character stack base address
|
||||
* PC 32-bit program counter
|
||||
* ZRO 32-bit register containing zero (like MIPS)
|
||||
* Rn 32-bit general purpose registers
|
||||
*
|
||||
* Parameters passed in registers up to a limit. Parameters
|
||||
* beyond the limit are passed on the stack. Return values
|
||||
* are provided in these same registers.
|
||||
*
|
||||
* Instruction forms
|
||||
*
|
||||
* FORM 1: <op> <roperand1>, <operand2>
|
||||
* FORM 2: <op> <rdest>, <operand2>
|
||||
* FORM 3: <op> <rdest>, <roperand1>, <operand2>
|
||||
* <rsrc>, <roperand1>, <operand2>
|
||||
* FORM 4: <op> <pc-offset>
|
||||
*
|
||||
* Where
|
||||
* <op> operation code
|
||||
* [cc] optional conditional execution
|
||||
* [S] optional set condition code
|
||||
* <rdest> register holding the result
|
||||
* <rsrc> register holding data to be stored.
|
||||
* <roperand1> register holding the first operand
|
||||
* <operand2> One of <roperand2> or <immediate>
|
||||
* <roperand2> register holding the second operand
|
||||
* <immediate> Immediate constant data (short).
|
||||
* <pc-offset> Word offset from current PC
|
||||
*
|
||||
* NOTE: This instruction set is inspired by the ARM instruction
|
||||
* set, but is intended to be a general register model. It does
|
||||
* not exploit certain ARM-isms such as "flexible" operands, conditional
|
||||
* execution, post-incrementing, pre-incrementing, pc-relative addressing,
|
||||
* optional register writeback, or ldm/stm with register sets, etc.
|
||||
*/
|
||||
|
||||
#define FORM1(o) (((o) & 0xe0) == 0x00)
|
||||
#define FORM1R(o) (((o) & 0xf0) == 0x00)
|
||||
#define FORM1I(o) (((o) & 0xf0) == 0x10)
|
||||
#define FORM1O(o) ((o) & 0x0f)
|
||||
|
||||
#define FORM2(o) (((o) & 0xe0) == 0x20)
|
||||
#define FORM2R(o) (((o) & 0xf0) == 0x20)
|
||||
#define FORM2I(o) (((o) & 0xf0) == 0x30)
|
||||
#define FORM2O(o) ((o) & 0x0f)
|
||||
|
||||
#define FORM3(o) (((o) & 0x80) == 0x80)
|
||||
#define FORM3R(o) (((o) & 0xc0) == 0x80)
|
||||
#define FORM3I(o) (((o) & 0xc0) == 0xc0)
|
||||
#define FORM3O(o) ((o) & 0x3f)
|
||||
|
||||
#define FORM4(o) (((o) & 0xc0) == 0x40)
|
||||
#define FORM3O(o) ((o) & 0x3f)
|
||||
|
||||
struct rinsn_u
|
||||
{
|
||||
uint8_t opcode;
|
||||
union {
|
||||
struct {
|
||||
uint32_t rop1;
|
||||
uint32_t rop2;
|
||||
} r1;
|
||||
struct {
|
||||
uint32_t rop1;
|
||||
uint32_t im2;
|
||||
} i1;
|
||||
struct {
|
||||
uint32_t rdest;
|
||||
uint32_t rop;
|
||||
} r2;
|
||||
struct {
|
||||
uint32_t rdest;
|
||||
uint32_t im;
|
||||
} i2;
|
||||
struct {
|
||||
uint32_t rdest;
|
||||
uint32_t rop1;
|
||||
uint32_t rop2;
|
||||
} r3;
|
||||
struct {
|
||||
uint32_t rdest;
|
||||
uint32_t rop1;
|
||||
uint32_t im2;
|
||||
} i3;
|
||||
struct {
|
||||
uint32_t offset;
|
||||
} i4;
|
||||
} f;
|
||||
};
|
||||
typedef struct rinsn_u RINSN32;
|
||||
|
||||
/* FORM 1: Comparisons */
|
||||
|
||||
#define rCMP (0x00) /* Form 1: set <cc> after <roperand1> - <roperand2> */
|
||||
#define rCMPI (0x10) /* Form 1: set <cc> after <roperand1> - <immediate> */
|
||||
#define rCMN (0x01) /* Form 1: set <cc> after <roperand1> + <roperand2> */
|
||||
#define rCMNI (0x11) /* Form 1: set <cc> after <roperand1> + <immediate> */
|
||||
|
||||
/* FORM 2: Data movement */
|
||||
|
||||
#define rMOV (0x20) /* Form 1: <rdest> = <roperand2> */
|
||||
#define rMOVI (0x30) /* Form 1: <rdist> = <immediate> */
|
||||
#define rMVN (0x21) /* Form 1: <rdest> = ~<roperand2> */
|
||||
#define rMVNI (0x31) /* Form 1: <rdist> = ~<immediate> */
|
||||
|
||||
/* FORM 4: Program control */
|
||||
|
||||
#define rB (0x40) /* PC += <pcoffset> << 2 */
|
||||
#define rBEQ (0x41) /* if <cc>->EQ, PC += <pcoffset> << 2 */
|
||||
#define rBNE (0x42) /* if <cc>->NEQ, PC += <pcoffset> << 2 */
|
||||
#define rBLT (0x43) /* if <cc>->LT, PC += <pcoffset> << 2 */
|
||||
#define rBGTE (0x44) /* if <cc>->GTE, PC += <pcoffset> << 2 */
|
||||
#define rBGT (0x45) /* if <cc>->GT, PC += <pcoffset> << 2 */
|
||||
#define rBLTE (0x46) /* if <cc>->KTE, PC += <pcoffset> << 2 */
|
||||
#define rBL (0x47) /* LR=next PC, PC += <pcoffset> << 2 */
|
||||
|
||||
/* FORM 3: Arithmetic and logical operations */
|
||||
|
||||
#define rADD (0x80) /* Form 3: <rdest> = <roperand1> + <roperand2> */
|
||||
#define rADDI (0xc0) /* Form 3: <rdest> = <roperand1> + <immediate> */
|
||||
#define rSUB (0x81) /* Form 3: <rdest> = <roperand1> - <roperand2> */
|
||||
#define rSUBI (0xc1) /* Form 3: <rdest> = <roperand1> - <immediate> */
|
||||
#define rRSB (0x82) /* Form 3: <rdest> = -<roperand1> + <roperand2> */
|
||||
#define rRSBI (0xc2) /* Form 3: <rdest> = -<roperand2> + <immediate> */
|
||||
#define rMUL (0x83) /* Form 3: <rdest> = <roperand1> * <roperand2> */
|
||||
#define rMULI (0xc3) /* Form 3: <rdest> = <roperand1> * <immediate> */
|
||||
#define rDIV (0x84) /* Form 3: <rdest> = <roperand1> / <roperand2> */
|
||||
#define rDIVI (0xc4) /* Form 3: <rdest> = <roperand1> / <immediate> */
|
||||
#define rMOD (0x85) /* Form 3: <rdest> = <roperand1> % <roperand2> */
|
||||
#define rMODI (0xc5) /* Form 3: <rdest> = <roperand1> % <immediate> */
|
||||
#define rSLL (0x86) /* Form 3: <rdest> = <roperand1> << <roperand2> */
|
||||
#define rSLLI (0xc6) /* Form 3: <rdest> = <roperand1> << <immediate> */
|
||||
#define rSRL (0x87) /* Form 3: <rdest> = <roperand1> >> <roperand2> */
|
||||
#define rSRLI (0xc7) /* Form 3: <rdest> = <roperand1> >> <immediate> */
|
||||
#define rSRA (0x88) /* Form 3: <rdest> = <roperand1> >> <roperand2> */
|
||||
#define rSRAI (0xc8) /* Form 3: <rdest> = <roperand1> >> <immediate> */
|
||||
#define rOR (0x89) /* Form 3: <rdest> = <roperand1> | <roperand2> */
|
||||
#define rORI (0xc9) /* Form 3: <rdest> = <roperand1> | <immediate> */
|
||||
#define rAND (0x8a) /* Form 3: <rdest> = <roperand1> & <roperand2> */
|
||||
#define rANDI (0xca) /* Form 3: <rdest> = <roperand1> & <immediate> */
|
||||
#define rXOR (0x8b) /* Form 3: <rdest> = <roperand1> xor <roperand2> */
|
||||
#define rXORI (0xcb) /* Form 3: <rdest> = <roperand1> xor <immediate> */
|
||||
#define rANDN (0x8c) /* Form 3: <rdest> = <roperand1> & ~<roperand2> */
|
||||
#define rANDNI (0xcc) /* Form 3: <rdest> = <roperand1> & ~<immediate> */
|
||||
|
||||
/* FORM 3: Loads and stores */
|
||||
|
||||
#define rLD (0x90) /* Form 3: <rdest> = (<roperand1> + <roperand2>) */
|
||||
#define rLDI (0xd0) /* Form 3: <rdest> = (<roperand1> + (<immediate> << 2)) */
|
||||
#define rLDH (0x91) /* Form 3: <rdest> = (<roperand1> + <roperand2>) */
|
||||
#define rLDIH (0xd1) /* Form 3: <rdest> = (<roperand1> + (<immediate> << 1)) */
|
||||
#define rLDB (0x92) /* Form 3: <rdest> = (<roperand1> + <roperand2>) */
|
||||
#define rLDIB (0xd2) /* Form 3: <rdest> = (<roperand1> + <immediate>) */
|
||||
|
||||
#define rLDM (0xd3) /* Form 3: Load <immediate> registers. Source
|
||||
* address is roperand1, first dest register is
|
||||
* <rdest>, register count is <immediate> */
|
||||
|
||||
#define rST (0x94) /* Form 3: (<roperand1> + <roperand2>) = <rsrc> */
|
||||
#define rSTI (0xd4) /* Form 3: (<roperand1> + (<immediate> << 2)) = <rsrc> */
|
||||
#define rSTH (0x95) /* Form 3: (<roperand1> + <roperand2>) = <rsrc> */
|
||||
#define rSTIH (0xd5) /* Form 3: (<roperand1> + (<immediate> << 1)) = <rsrc> */
|
||||
#define rSTB (0x96) /* Form 3: (<roperand1> + <roperand2>) = <rsrc> */
|
||||
#define rSTIB (0xd6) /* Form 3: (<roperand1> + <immediate>) = <rsrc> */
|
||||
|
||||
#define rSTM (0xd7) /* Form 3: Store <immediate> registers. Destination
|
||||
* address is roperand1, first source register is
|
||||
* <rsrc>, register count is <immediate> */
|
||||
|
||||
#endif /* __RINSN32_H */
|
||||
Reference in New Issue
Block a user