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synced 2026-10-03 15:38:52 +08:00
Fix an issue with the pwm_servo driver when using one of the STM32 advanced timers.
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@@ -88,6 +88,7 @@
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#define rCCR4(_tmr) REG(_tmr, STM32_GTIM_CCR4_OFFSET)
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#define rCCR4(_tmr) REG(_tmr, STM32_GTIM_CCR4_OFFSET)
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#define rDCR(_tmr) REG(_tmr, STM32_GTIM_DCR_OFFSET)
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#define rDCR(_tmr) REG(_tmr, STM32_GTIM_DCR_OFFSET)
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#define rDMAR(_tmr) REG(_tmr, STM32_GTIM_DMAR_OFFSET)
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#define rDMAR(_tmr) REG(_tmr, STM32_GTIM_DMAR_OFFSET)
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#define rBDTR(_tmr) REG(_tmr, STM32_ATIM_BDTR_OFFSET)
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static void pwm_timer_init(unsigned timer);
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static void pwm_timer_init(unsigned timer);
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static void pwm_timer_set_rate(unsigned timer, unsigned rate);
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static void pwm_timer_set_rate(unsigned timer, unsigned rate);
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@@ -110,6 +111,11 @@ pwm_timer_init(unsigned timer)
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rCCER(timer) = 0;
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rCCER(timer) = 0;
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rDCR(timer) = 0;
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rDCR(timer) = 0;
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if ((pwm_timers[timer].base == STM32_TIM1_BASE) || (pwm_timers[timer].base == STM32_TIM8_BASE)) {
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/* master output enable = on */
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rBDTR(timer) = ATIM_BDTR_MOE;
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}
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/* configure the timer to free-run at 1MHz */
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/* configure the timer to free-run at 1MHz */
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rPSC(timer) = (pwm_timers[timer].clock_freq / 1000000) - 1;
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rPSC(timer) = (pwm_timers[timer].clock_freq / 1000000) - 1;
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