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https://gitee.com/mirrors_PX4/PX4-Autopilot.git
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Add LPC43 Event Monitor, EEPROM, FLASH header files
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4898 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
@@ -119,6 +119,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# undef LPC43_ETHERNET /* No Ethernet controller */
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# undef LPC43_USB0 /* No USB0 (Host, Device, OTG) */
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@@ -143,6 +144,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# undef LPC43_ETHERNET /* No Ethernet controller */
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# undef LPC43_USB0 /* No USB0 (Host, Device, OTG) */
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@@ -168,6 +170,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# undef LPC43_ETHERNET /* No Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -193,6 +196,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# undef LPC43_ETHERNET /* No Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -217,6 +221,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -241,6 +246,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -265,6 +271,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -289,6 +296,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# undef LPC43_NLCD /* No LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -313,6 +321,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# define LPC43_NLCD (1) /* One LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -337,6 +346,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# define LPC43_NLCD (1) /* One LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -361,6 +371,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
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# define LPC43_NLCD (1) /* One LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -385,6 +396,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
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# define LPC43_NLCD (1) /* Has LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -409,6 +421,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
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# define LPC43_NLCD (1) /* Has LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -433,6 +446,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
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# define LPC43_NLCD (1) /* Has LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -457,6 +471,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
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# define LPC43_NLCD (1) /* Has LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -481,6 +496,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
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# define LPC43_NLCD (1) /* Has LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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@@ -505,6 +521,7 @@
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# define LPC43_AHBSRAM_BANK0_SIZE (64*1024) /* 64Kb AHB SRAM */
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# define LPC43_AHBSRAM_BANK1_SIZE (0)
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# define LPC43_AHBSRAM_BANK2_SIZE (0)
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# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
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# define LPC43_NLCD (1) /* Has LCD controller */
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# define LPC43_ETHERNET (1) /* One Ethernet controller */
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# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
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