From 4fdfe0208147a612de81df5353f715355afc54c5 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Tue, 28 Mar 2023 11:29:39 -0700 Subject: [PATCH] nxp_imxrt1170-evk:Work twords FMURT1170 --- .../imxrt1170-evk/nuttx-config/include/board.h | 7 +++++-- boards/nxp/imxrt1170-evk/src/board_config.h | 16 ++++++++++------ 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/boards/nxp/imxrt1170-evk/nuttx-config/include/board.h b/boards/nxp/imxrt1170-evk/nuttx-config/include/board.h index d049176ad8..81754ce8a6 100644 --- a/boards/nxp/imxrt1170-evk/nuttx-config/include/board.h +++ b/boards/nxp/imxrt1170-evk/nuttx-config/include/board.h @@ -254,11 +254,13 @@ * CAN3 is routed to transceiver. */ +#define FLEXCAN_IOMUX (IOMUX_PULL_UP | IOMUX_SLEW_FAST) -#define GPIO_FLEXCAN3_RX (GPIO_FLEXCAN3_RX_1) /* GPIO_AD_B0_11 */ -#define GPIO_FLEXCAN3_TX (GPIO_FLEXCAN3_TX_3) /* GPIO_EMC_36 */ +#define GPIO_FLEXCAN3_TX (GPIO_FLEXCAN3_TX_1 | FLEXCAN_IOMUX) /* GPIO_LPSR_00 */ +#define GPIO_FLEXCAN3_RX (GPIO_FLEXCAN3_RX_1 | FLEXCAN_IOMUX) /* GPIO_LPSR_01 */ /* LPSPI */ + #define GPIO_LPSPI6_SCK (GPIO_LPSPI6_SCK_1|IOMUX_LPSPI_DEFAULT) #define GPIO_LPSPI6_MISO (GPIO_LPSPI6_SDI_1|IOMUX_LPSPI_DEFAULT) #define GPIO_LPSPI6_MOSI (GPIO_LPSPI6_SDO_1|IOMUX_LPSPI_DEFAULT) @@ -268,6 +270,7 @@ #define GPIO_LPSPI1_MOSI (GPIO_LPSPI1_SDO_1|IOMUX_LPSPI_DEFAULT) /* LPI2Cs */ + #define GPIO_LPI2C5_SDA_RESET (GPIO_PORT6 | GPIO_PIN4 | GPIO_OUTPUT | GPIO_OUTPUT_ONE) /* GPIO_LPSR_04 GPIO1_IO17 */ #define GPIO_LPI2C5_SCL_RESET (GPIO_PORT6 | GPIO_PIN5 | GPIO_OUTPUT | GPIO_OUTPUT_ONE) /* GPIO_LPSR_05 GPIO1_IO16 */ diff --git a/boards/nxp/imxrt1170-evk/src/board_config.h b/boards/nxp/imxrt1170-evk/src/board_config.h index 79e129f5c3..651db73eb8 100644 --- a/boards/nxp/imxrt1170-evk/src/board_config.h +++ b/boards/nxp/imxrt1170-evk/src/board_config.h @@ -126,6 +126,9 @@ /* Define the SPI4 Data Ready and Control signals */ +/* Define the SPI Data Ready and Control signals */ +#define DRDY_IOMUX (IOMUX_PULL_UP) + #define GPIO_SPI4_DRDY7_EXTERNAL1 /* GPIO_EMC_35 GPIO3_IO21*/ (GPIO_PORT3 | GPIO_PIN21 | GPIO_INPUT | DRDY_IOMUX) #define GPIO_nSPI4_RESET_EXTERNAL1 /* GPIO_B1_00 GPIO2_IO16 */ (GPIO_PORT2 | GPIO_PIN16 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | OUT_IOMUX) #define GPIO_SPI4_SYNC_EXTERNAL1 /* GPIO_EMC_05 GPIO4_IO5 */(GPIO_PORT4 | GPIO_PIN5 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | OUT_IOMUX) @@ -192,12 +195,13 @@ #define HW_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_NONE | IOMUX_SLEW_FAST) -#define GPIO_HW_VER_REV_DRIVE /* GPIO_AD_B0_01 GPIO1_IO01 */ (GPIO_PORT1 | GPIO_PIN1 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | HW_IOMUX) -#define GPIO_HW_REV_SENSE /* GPIO_AD_B1_08 GPIO1 Pin 24 */ ADC1_GPIO(13, 24) -#define GPIO_HW_VER_SENSE /* GPIO_AD_B1_04 GPIO1 Pin 20 */ ADC1_GPIO(9, 20) -#define HW_INFO_INIT_PREFIX "V5" -#define V500 HW_VER_REV(0x0,0x0) // FMUV5, Rev 0 -#define V540 HW_VER_REV(0x4,0x0) // mini no can 2,3, Rev 0 +#define GPIO_HW_VER_REV_DRIVE /* GPIO_GPIO_EMC_B1_26 GPIO1_IO26 */ (GPIO_PORT1 | GPIO_PIN26 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | HW_IOMUX) +#define GPIO_HW_REV_SENSE /* GPIO_AD_22 GPIO9 Pin 21 */ ADC1_GPIO(4, 21) +#define GPIO_HW_VER_SENSE /* GPIO_AD_23 GPIO9 Pin 22 */ ADC1_GPIO(5, 22) +#define HW_INFO_INIT_PREFIX "1170EVK" +#define EVK1170_00 HW_VER_REV(0x0,0x0) // Not supported + +#define UAVCAN_NUM_IFACES_RUNTIME 1 /* CAN Silence *