switch the modules implementing the block structure to px4_poll such that in posix_sitl simulation the poll works as expected, blocks the module and doesn't overload the CPU

This commit is contained in:
MaEtUgR
2016-03-09 09:38:32 +01:00
parent 613ec40d86
commit 4f29c7c4db
4 changed files with 6 additions and 4 deletions
+1 -1
View File
@@ -3,7 +3,7 @@
void BlockSegwayController::update()
{
// wait for a sensor update, check for exit condition every 100 ms
if (poll(&_attPoll, 1, 100) < 0) { return; } // poll error
if (px4_poll(&_attPoll, 1, 100) < 0) { return; } // poll error
uint64_t newTimeStamp = hrt_absolute_time();
float dt = (newTimeStamp - _timeStamp) / 1.0e6f;