From 4d846c12088a00d870c9fd6ed63d910a413694fb Mon Sep 17 00:00:00 2001
From: Daniel Agar <daniel@agar.ca>
Date: Mon, 13 Feb 2023 21:12:10 -0500
Subject: [PATCH] merge

---
 .../imu/invensense/icm42688p/ICM42688P.cpp     |  6 +++---
 .../InvenSense_ICM42688P_registers.hpp         | 18 +++++++++++++-----
 2 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/src/drivers/imu/invensense/icm42688p/ICM42688P.cpp b/src/drivers/imu/invensense/icm42688p/ICM42688P.cpp
index 50996c4311..faaa41785b 100644
--- a/src/drivers/imu/invensense/icm42688p/ICM42688P.cpp
+++ b/src/drivers/imu/invensense/icm42688p/ICM42688P.cpp
@@ -364,15 +364,15 @@ void ICM42688P::ConfigureFIFOWatermark(uint8_t samples)
 	for (auto &r : _register_bank0_cfg) {
 		switch (r.reg) {
 		case Register::BANK_0::FIFO_CONFIG2:
-			// FIFO_WM[7:0]  FIFO_CONFIG2
+			// FIFO_CONFIG2 7:0 FIFO_WM[7:0]
 			r.set_bits = fifo_watermark_threshold & 0xFF;
 			r.clear_bits = ~r.set_bits;
 			break;
 
 		case Register::BANK_0::FIFO_CONFIG3:
-			// FIFO_WM[11:8] FIFO_CONFIG3
+			// FIFO_CONFIG3 3:0 FIFO_WM[11:8]
 			r.set_bits = (fifo_watermark_threshold >> 8) & 0x0F;
-			r.clear_bits = ~r.set_bits;
+			r.clear_bits = ~r.set_bits & 0x0F;
 			break;
 
 		default:
diff --git a/src/drivers/imu/invensense/icm42688p/InvenSense_ICM42688P_registers.hpp b/src/drivers/imu/invensense/icm42688p/InvenSense_ICM42688P_registers.hpp
index 3f8770f746..f456690080 100644
--- a/src/drivers/imu/invensense/icm42688p/InvenSense_ICM42688P_registers.hpp
+++ b/src/drivers/imu/invensense/icm42688p/InvenSense_ICM42688P_registers.hpp
@@ -299,10 +299,12 @@ enum GYRO_CONFIG_STATIC2_BIT : uint8_t {
 	GYRO_NF_DIS  = Bit0, // 1: Disable Notch Filter
 };
 
-// PIN9_FUNCTION
-enum PIN9_FUNCTION_BIT : uint8_t {
-	FSYNC_PIN9 = Bit1,
-	CLKIN = Bit2,
+// GYRO_CONFIG_STATIC3
+enum GYRO_CONFIG_STATIC3_BIT : uint8_t {
+	// 5:0 GYRO_AAF_DELT
+	//  585 Hz = 13 (0b00'1101)
+	GYRO_AAF_DELT_585HZ_SET   = Bit3 | Bit2 | Bit0,
+	GYRO_AAF_DELT_585HZ_CLEAR = Bit5 | Bit4 | Bit1,
 };
 
 // GYRO_CONFIG_STATIC4
@@ -341,7 +343,13 @@ enum INTF_CONFIG5_BIT : uint8_t {
 
 // ACCEL_CONFIG_STATIC2
 enum ACCEL_CONFIG_STATIC2_BIT : uint8_t {
-	ACCEL_AAF_DIS = Bit0,
+	// 6:1 ACCEL_AAF_DELT
+	//  585 Hz = 13 (0b00'1101)
+	ACCEL_AAF_DELT_585HZ_SET   = Bit4 | Bit3 | Bit1,
+	ACCEL_AAF_DELT_585HZ_CLEAR = Bit6 | Bit5 | Bit2,
+
+	// 0 ACCEL_AAF_DIS
+	ACCEL_AAF_DIS              = Bit0, // 0: Enable accelerometer anti-aliasing filter (default)
 };
 
 // ACCEL_CONFIG_STATIC3