mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-11-04 02:41:36 +08:00
Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
@@ -60,6 +60,10 @@
|
||||
# include <arch/armv7-m/irq_lazyfpu.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
||||
# include <arch/chip/chip.h>
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
@@ -130,64 +134,6 @@ struct xcptcontext
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/* Disable IRQs */
|
||||
|
||||
static inline void irqdisable(void) inline_function;
|
||||
static inline void irqdisable(void)
|
||||
{
|
||||
__asm__ __volatile__ ("\tcpsid i\n");
|
||||
}
|
||||
|
||||
/* Save the current primask state & disable IRQs */
|
||||
|
||||
static inline irqstate_t irqsave(void) inline_function;
|
||||
static inline irqstate_t irqsave(void)
|
||||
{
|
||||
unsigned short primask;
|
||||
|
||||
/* Return the current value of primask register and set
|
||||
* bit 0 of the primask register to disable interrupts
|
||||
*/
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"\tmrs %0, primask\n"
|
||||
"\tcpsid i\n"
|
||||
: "=r" (primask)
|
||||
:
|
||||
: "memory");
|
||||
|
||||
return primask;
|
||||
}
|
||||
|
||||
/* Enable IRQs */
|
||||
|
||||
static inline void irqenable(void) inline_function;
|
||||
static inline void irqenable(void)
|
||||
{
|
||||
__asm__ __volatile__ ("\tcpsie i\n");
|
||||
}
|
||||
|
||||
/* Restore saved primask state */
|
||||
|
||||
static inline void irqrestore(irqstate_t primask) inline_function;
|
||||
static inline void irqrestore(irqstate_t primask)
|
||||
{
|
||||
/* If bit 0 of the primask is 0, then we need to restore
|
||||
* interupts.
|
||||
*/
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"\ttst %0, #1\n"
|
||||
"\tbne 1f\n"
|
||||
"\tcpsie i\n"
|
||||
"1:\n"
|
||||
:
|
||||
: "r" (primask)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
/* Get/set the primask register */
|
||||
|
||||
static inline uint8_t getprimask(void) inline_function;
|
||||
@@ -243,6 +189,85 @@ static inline void setbasepri(uint32_t basepri)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
/* Disable IRQs */
|
||||
|
||||
static inline void irqdisable(void) inline_function;
|
||||
static inline void irqdisable(void)
|
||||
{
|
||||
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
||||
setbasepri(NVIC_SYSH_DISABLE_PRIORITY);
|
||||
#else
|
||||
__asm__ __volatile__ ("\tcpsid i\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Save the current primask state & disable IRQs */
|
||||
|
||||
static inline irqstate_t irqsave(void) inline_function;
|
||||
static inline irqstate_t irqsave(void)
|
||||
{
|
||||
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
||||
|
||||
uint8_t basepri = getbasepri();
|
||||
setbasepri(NVIC_SYSH_DISABLE_PRIORITY);
|
||||
return basepri;
|
||||
|
||||
#else
|
||||
|
||||
unsigned short primask;
|
||||
|
||||
/* Return the current value of primask register and set
|
||||
* bit 0 of the primask register to disable interrupts
|
||||
*/
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"\tmrs %0, primask\n"
|
||||
"\tcpsid i\n"
|
||||
: "=r" (primask)
|
||||
:
|
||||
: "memory");
|
||||
|
||||
return primask;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Enable IRQs */
|
||||
|
||||
static inline void irqenable(void) inline_function;
|
||||
static inline void irqenable(void)
|
||||
{
|
||||
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
||||
setbasepri(NVIC_SYSH_PRIORITY_MIN);
|
||||
#else
|
||||
__asm__ __volatile__ ("\tcpsie i\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Restore saved primask state */
|
||||
|
||||
static inline void irqrestore(irqstate_t flags) inline_function;
|
||||
static inline void irqrestore(irqstate_t flags)
|
||||
{
|
||||
#ifdef CONFIG_ARMV7M_USEBASEPRI
|
||||
setbasepri(flags);
|
||||
#else
|
||||
/* If bit 0 of the primask is 0, then we need to restore
|
||||
* interupts.
|
||||
*/
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"\ttst %0, #1\n"
|
||||
"\tbne 1f\n"
|
||||
"\tcpsie i\n"
|
||||
"1:\n"
|
||||
:
|
||||
: "r" (flags)
|
||||
: "memory");
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Get/set IPSR */
|
||||
|
||||
static inline uint32_t getipsr(void) inline_function;
|
||||
|
||||
@@ -0,0 +1,850 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/include/kinetis/chip.h
|
||||
*
|
||||
* Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_CHIP_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_CHIP_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Get customizations for each supported chip */
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
|
||||
# define KINETIS_SRAM_SIZE (16*1024) /* 16Kb */
|
||||
# undef KINETIS_MPU /* No memory protection unit */
|
||||
# undef KINETIS_EXTBUS /* No external bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# undef KINETIS_NENET /* No Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# undef KINETIS_NSDHC /* No SD host controller */
|
||||
# undef KINETIS_NTOUCHIF /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 2 /* Two I2C modules */
|
||||
# undef KINETIS_NISO7816 /* No UART with ISO-786 */
|
||||
# define KINETIS_NUART 6 /* Six UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# if defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# else
|
||||
# undef KINETIS_NCAN /* No CAN in 64-pin chips */
|
||||
# endif
|
||||
# define KINETIS_NI2S 1 /* One I2S module */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 25x8/29x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 2 /* Two Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
|
||||
# define KINETIS_SRAM_SIZE (32*1024) /* 32Kb */
|
||||
# undef KINETIS_MPU /* No memory protection unit */
|
||||
# undef KINETIS_EXTBUS /* No external bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# undef KINETIS_NENET /* No Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# undef KINETIS_NSDHC /* No SD host controller */
|
||||
# undef KINETIS_NTOUCHIF /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 2 /* Two I2C modules */
|
||||
# undef KINETIS_NISO7816 /* No UART with ISO-786 */
|
||||
# define KINETIS_NUART 6 /* Six UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S module */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 2 /* Two Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
|
||||
# define KINETIS_SRAM_SIZE (32*1024) /* 64Kb */
|
||||
# undef KINETIS_MPU /* No memory protection unit */
|
||||
# undef KINETIS_EXTBUS /* No external bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# undef KINETIS_NENET /* No Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# undef KINETIS_NSDHC /* No SD host controller */
|
||||
# undef KINETIS_NTOUCHIF /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 2 /* Two I2C modules */
|
||||
# undef KINETIS_NISO7816 /* No UART with ISO-786 */
|
||||
# define KINETIS_NUART 6 /* Six UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S module */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 2 /* Two Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_SRAM_SIZE (32*1024) /* 32Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# undef KINETIS_NENET /* No Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* One SD host controller */
|
||||
# undef KINETIS_NTOUCHIF /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 2 /* Two I2C modules */
|
||||
# undef KINETIS_NISO7816 /* No UART with ISO-786 */
|
||||
# define KINETIS_NUART 6 /* Six UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S module */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 40x8/44x4)*/
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 2 /* Two Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 32Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# undef KINETIS_NENET /* No Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* One SD host controller */
|
||||
# undef KINETIS_NTOUCHIF /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 2 /* Two I2C modules */
|
||||
# undef KINETIS_NISO7816 /* No UART with ISO-786 */
|
||||
# define KINETIS_NUART 6 /* Six UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S module */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 40x8/44x4)*/
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 2 /* Two Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
|
||||
# undef KINETIS_FLEXMEM_SIZE /* No FlexMemory */
|
||||
# define KINETIS_SRAM_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# undef KINETIS_NENET /* No Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* One SD host controller */
|
||||
# undef KINETIS_NTOUCHIF /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 2 /* Two I2C modules */
|
||||
# undef KINETIS_NISO7816 /* No UART with ISO-786 */
|
||||
# define KINETIS_NUART 6 /* Six UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S module */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 40x8/44x4)*/
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 2 /* Two Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 4 /* Four additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# define KINETIS_NADC12 1 /* One 12-channel ADC (ADC0)*/
|
||||
# define KINETIS_NADC13 1 /* No 13-channel ADC (ADC1) */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 1 /* One 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 32Kb */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 4 /* Four additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# define KINETIS_NADC12 1 /* One 12-channel ADC (ADC0)*/
|
||||
# define KINETIS_NADC13 1 /* No 13-channel ADC (ADC1) */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 1 /* One 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 4 /* Four additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# define KINETIS_NADC12 1 /* One 12-channel ADC (ADC0)*/
|
||||
# define KINETIS_NADC13 1 /* No 13-channel ADC (ADC1) */
|
||||
# undef KINETIS_NADC15 /* No 15-channel ADC */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 1 /* One 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 4 /* Four additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# define KINETIS_NADC12 1 /* One 12-channel ADC (ADC0)*/
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC1) */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 1 /* One 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 4 /* Four additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# define KINETIS_NADC12 1 /* One 12-channel ADC (ADC0)*/
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC1) */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 1 /* One 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 4 /* Four additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# define KINETIS_NADC12 1 /* One 12-channel ADC (ADC0)*/
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC1) */
|
||||
# undef KINETIS_NADC18 /* No 18-channel ADC */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 1 /* One 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 5 /* Five additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC0) */
|
||||
# define KINETIS_NADC18 1 /* One 18-channel ADC (ADC1) */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Twp 12-bit DACs */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 5 /* Five additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC0) */
|
||||
# define KINETIS_NADC18 1 /* One 18-channel ADC (ADC1) */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Twp 12-bit DACs */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 5 /* Five additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC0) */
|
||||
# define KINETIS_NADC18 1 /* One 18-channel ADC (ADC1) */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Twp 12-bit DACs */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 5 /* Five additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC0) */
|
||||
# define KINETIS_NADC18 1 /* One 18-channel ADC (ADC1) */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Twp 12-bit DACs */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 5 /* Five additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC0) */
|
||||
# define KINETIS_NADC18 1 /* One 18-channel ADC (ADC1) */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Twp 12-bit DACs */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
# define KINETIS_SRAM_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBHOST 1 /* One USB host controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NTOUCHIF 1 /* Xtrinsic touch sensing interface */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NISO7816 1 /* One UART with ISO-786 */
|
||||
# define KINETIS_NUART 5 /* Five additional UARTs */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 2 /* Two CAN controllers */
|
||||
# define KINETIS_NI2S 2 /* Two I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 4 /* Four 16-bit ADC */
|
||||
# undef KINETIS_NADC12 /* No 12-channel ADC */
|
||||
# undef KINETIS_NADC13 /* No 13-channel ADC */
|
||||
# define KINETIS_NADC15 1 /* One 15-channel ADC (ADC0) */
|
||||
# define KINETIS_NADC18 1 /* One 18-channel ADC (ADC1) */
|
||||
# define KINETIS_NPGA 4 /* Four Programmable Gain Amplifiers */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# undef KINETIS_NDAC6 /* No 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Twp 12-bit DACs */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# undef KINETIS_NTIMERS12 /* No 12 channel timers */
|
||||
# define KINETIS_NTIMERS20 4 /* Four 20 channel timers */
|
||||
# define KINETIS_NTIMERS12 3 /* Three 12 channel timers */
|
||||
# undef KINETIS_NTIMERS20 /* No 20 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# undef KINETIS_NRNG /* No random number generator */
|
||||
# undef KINETIS_NMMCAU /* No hardware encryption */
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#else
|
||||
# error "Unsupported Kinetis chip"
|
||||
#endif
|
||||
|
||||
/* NVIC priority levels *************************************************************/
|
||||
/* Each priority field holds a priority value, 0-15. The lower the value, the greater
|
||||
* the priority of the corresponding interrupt. The processor implements only
|
||||
* bits[7:4] of each field, bits[3:0] read as zero and ignore writes.
|
||||
*/
|
||||
|
||||
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is minimum priority */
|
||||
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
|
||||
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
|
||||
#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Steps between supported priority values */
|
||||
|
||||
#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
|
||||
#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_CHIP_H */
|
||||
@@ -108,6 +108,20 @@
|
||||
# error "Capabilities not specified for this Stellaris chip"
|
||||
#endif
|
||||
|
||||
/* The LM3S69xx only supports 8 priority levels. The hardware priority mechanism
|
||||
* will only look at the upper N bits of the 8-bit priority level (where N is 3 for
|
||||
* the Stellaris family), so any prioritization must be performed in those bits.
|
||||
* The default priority level is set to the middle value
|
||||
*/
|
||||
|
||||
#define NVIC_SYSH_PRIORITY_MIN 0xe0 /* Bits [5:7] set in minimum priority */
|
||||
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
|
||||
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
|
||||
#define NVIC_SYSH_PRIORITY_STEP 0x20 /* Three bits of interrupt priority used */
|
||||
|
||||
#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
|
||||
#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
@@ -43,6 +43,26 @@
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/irq.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define LM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define LM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
#define LM_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
|
||||
#define LM_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
|
||||
#define LM_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
|
||||
#define LM_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
|
||||
#define LM_IRQ_SVCALL (11) /* Vector 11: SVC call */
|
||||
#define LM_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
|
||||
/* Vector 13: Reserved */
|
||||
#define LM_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
|
||||
#define LM_IRQ_SYSTICK (15) /* Vector 15: System tick */
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_LM3S)
|
||||
# include <arch/lm/lm3s_irq.h>
|
||||
#elif defined(CONFIG_ARCH_CHIP_LM4F)
|
||||
@@ -51,10 +71,6 @@
|
||||
# error "Unsupported Stellaris IRQ file"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* GPIO IRQs -- Note that support for individual GPIO ports can
|
||||
* be disabled in order to reduce the size of the implemenation.
|
||||
*/
|
||||
|
||||
@@ -51,22 +51,6 @@
|
||||
* to handle mapping tables.
|
||||
*/
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define LM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define LM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
#define LM_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
|
||||
#define LM_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
|
||||
#define LM_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
|
||||
#define LM_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
|
||||
#define LM_IRQ_SVCALL (11) /* Vector 11: SVC call */
|
||||
#define LM_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
|
||||
/* Vector 13: Reserved */
|
||||
#define LM_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
|
||||
#define LM_IRQ_SYSTICK (15) /* Vector 15: System tick */
|
||||
|
||||
/* External interrupts (vectors >= 16) */
|
||||
|
||||
#define LM_IRQ_INTERRUPTS (16) /* Vector number of the first external interrupt */
|
||||
|
||||
@@ -362,6 +362,20 @@
|
||||
# error "Unsupported LPC17xx chip"
|
||||
#endif
|
||||
|
||||
/* NVIC priority levels *************************************************************/
|
||||
/* Each priority field holds a priority value, 0-31. The lower the value, the greater
|
||||
* the priority of the corresponding interrupt. The processor implements only
|
||||
* bits[7:3] of each field, bits[2:0] read as zero and ignore writes.
|
||||
*/
|
||||
|
||||
#define NVIC_SYSH_PRIORITY_MIN 0xf8 /* All bits[7:3] set is minimum priority */
|
||||
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
|
||||
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
|
||||
#define NVIC_SYSH_PRIORITY_STEP 0x08 /* Five bits of interrupt priority used */
|
||||
|
||||
#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
|
||||
#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/include/lpc43xx/chip.h
|
||||
*
|
||||
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -542,6 +542,35 @@
|
||||
# error "Unsupported LPC43xx chip"
|
||||
#endif
|
||||
|
||||
/* NVIC priority levels *************************************************************/
|
||||
/* Each priority field holds a priority value, 0-31. The lower the value, the greater
|
||||
* the priority of the corresponding interrupt.
|
||||
*
|
||||
* The Cortex-M4 core supports up to 53 interrupts an 8 prgrammable interrupt
|
||||
* priority levels; The Cortex-M0 core supports up to 32 interrupts with 4
|
||||
* programmable interrupt priorities.
|
||||
*/
|
||||
|
||||
#define LPC43M4_SYSH_PRIORITY_MIN 0xe0 /* All bits[7:5] set is minimum priority */
|
||||
#define LPC43M4_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
|
||||
#define LPC43M4_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
|
||||
#define LPC43M4_SYSH_PRIORITY_STEP 0x10 /* Steps between priorities */
|
||||
|
||||
#define LPC43M0_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:6] set is minimum priority */
|
||||
#define LPC43M0_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
|
||||
#define LPC43M0_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
|
||||
#define LPC43M0_SYSH_PRIORITY_STEP 0x20 /* Steps between priorities */
|
||||
|
||||
/* Only the Cortex-M4 is supported by Nuttx */
|
||||
|
||||
#define NVIC_SYSH_PRIORITY_MIN LPC43M4_SYSH_PRIORITY_MIN
|
||||
#define NVIC_SYSH_PRIORITY_DEFAULT LPC43M4_SYSH_PRIORITY_DEFAULT
|
||||
#define NVIC_SYSH_PRIORITY_MAX LPC43M4_SYSH_PRIORITY_MAX
|
||||
#define NVIC_SYSH_PRIORITY_STEP LPC43M4_SYSH_PRIORITY_INCR
|
||||
|
||||
#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
|
||||
#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
@@ -0,0 +1,95 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/include/sam3u/chip.h
|
||||
*
|
||||
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_SAM3U_CHIP_H
|
||||
#define __ARCH_ARM_INCLUDE_SAM3U_CHIP_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Get customizations for each supported chip */
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_AT91SAM3U4E
|
||||
/* Internal memory */
|
||||
|
||||
# define CONFIG_SAM3U_SRAM0_SIZE 0x00008000 /* 32Kb */
|
||||
# define CONFIG_SAM3U_SRAM1_SIZE 0x00004000 /* 16Kb */
|
||||
# define CONFIG_SAM3U_NFCSRAM_SIZE 0x00001000 /* 4Kb */
|
||||
|
||||
/* DMA */
|
||||
|
||||
# define CONFIG_SAM3U_NDMACHAN 4 /* 4 DMA Channels */
|
||||
|
||||
/* Memory card interface */
|
||||
|
||||
# define CONFIG_SAM3U_MCI2 1
|
||||
#else
|
||||
# error "Unknown SAM3U chip type"
|
||||
#endif
|
||||
|
||||
/* NVIC priority levels *************************************************************/
|
||||
/* Each priority field holds a priority value, 0-15. The lower the value, the greater
|
||||
* the priority of the corresponding interrupt. The processor implements only
|
||||
* bits[7:4] of each field, bits[3:0] read as zero and ignore writes.
|
||||
*/
|
||||
|
||||
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is minimum priority */
|
||||
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
|
||||
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
|
||||
#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */
|
||||
|
||||
#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
|
||||
#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_SAM3U_CHIP_H */
|
||||
@@ -692,5 +692,15 @@
|
||||
# error "Unsupported STM32 chip"
|
||||
#endif
|
||||
|
||||
/* NVIC priority levels *************************************************************/
|
||||
|
||||
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */
|
||||
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
|
||||
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
|
||||
#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */
|
||||
|
||||
#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
|
||||
#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_STM32_CHIP_H */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user