From 40898ba237da29b5596770171bd434075d09ed05 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beat=20K=C3=BCng?= Date: Wed, 29 Jan 2020 14:23:48 +0100 Subject: [PATCH] px4/fmu-v5x: use hw description methods for timer configuration --- boards/px4/fmu-v5x/src/CMakeLists.txt | 2 +- boards/px4/fmu-v5x/src/board_config.h | 77 +------- boards/px4/fmu-v5x/src/init.c | 8 +- boards/px4/fmu-v5x/src/timer_config.c | 247 ------------------------ boards/px4/fmu-v5x/src/timer_config.cpp | 79 ++++++++ 5 files changed, 85 insertions(+), 328 deletions(-) delete mode 100644 boards/px4/fmu-v5x/src/timer_config.c create mode 100644 boards/px4/fmu-v5x/src/timer_config.cpp diff --git a/boards/px4/fmu-v5x/src/CMakeLists.txt b/boards/px4/fmu-v5x/src/CMakeLists.txt index 1c58a593cc..f1244df578 100644 --- a/boards/px4/fmu-v5x/src/CMakeLists.txt +++ b/boards/px4/fmu-v5x/src/CMakeLists.txt @@ -38,7 +38,7 @@ add_library(drivers_board manifest.c sdio.c spi.cpp - timer_config.c + timer_config.cpp usb.c ) add_dependencies(drivers_board arch_board_hw_info) diff --git a/boards/px4/fmu-v5x/src/board_config.h b/boards/px4/fmu-v5x/src/board_config.h index 4ecd40a96f..5d95f90fb7 100644 --- a/boards/px4/fmu-v5x/src/board_config.h +++ b/boards/px4/fmu-v5x/src/board_config.h @@ -367,74 +367,12 @@ # define BOARD_INDICATE_ARMED_STATE(on_armed) px4_arch_configgpio((on_armed) ? GPIO_nARMED : GPIO_nARMED_INIT) #endif /* PWM - * - * 8 PWM outputs are configured. - * - * Pins: - * - * FMU_CH1 : PE14 : TIM1_CH4 - * FMU_CH2 : PA10 : TIM1_CH3 - * FMU_CH3 : PE11 : TIM1_CH2 - * FMU_CH4 : PA8 : TIM1_CH1 - * FMU_CH5 : PD13 : TIM4_CH2 - * FMU_CH6 : PD14 : TIM4_CH3 - * FMU_CH7 : PH6 : TIM12_CH1 - * FMU_CH8 : PH9 : TIM12_CH2 - * */ -#define GPIO_TIM12_CH2OUT /* PH9 T12C2 FMU8 */ GPIO_TIM12_CH2OUT_2 -#define GPIO_TIM12_CH1OUT /* PH6 T12C1 FMU7 */ GPIO_TIM12_CH1OUT_2 -#define GPIO_TIM4_CH3OUT /* PD14 T4C3 FMU6 */ GPIO_TIM4_CH3OUT_2 -#define GPIO_TIM4_CH2OUT /* PD13 T4C2 FMU5 */ GPIO_TIM4_CH2OUT_2 -#define GPIO_TIM1_CH1OUT /* PA8 T1C1 FMU4 */ GPIO_TIM1_CH1OUT_1 -#define GPIO_TIM1_CH2OUT /* PE11 T1C2 FMU3 */ GPIO_TIM1_CH2OUT_2 -#define GPIO_TIM1_CH3OUT /* PA10 T1C3 FMU2 */ GPIO_TIM1_CH3OUT_1 -#define GPIO_TIM1_CH4OUT /* PE14 T1C4 FMU1 */ GPIO_TIM1_CH4OUT_2 - #define DIRECT_PWM_OUTPUT_CHANNELS 8 - -#define GPIO_TIM12_CH2IN /* PH9 T12C2 FMU8 */ GPIO_TIM12_CH2IN_2 -#define GPIO_TIM12_CH1IN /* PH6 T12C1 FMU7 */ GPIO_TIM12_CH1IN_2 -#define GPIO_TIM4_CH3IN /* PD14 T4C3 FMU6 */ GPIO_TIM4_CH3IN_2 -#define GPIO_TIM4_CH2IN /* PD13 T4C2 FMU5 */ GPIO_TIM4_CH2IN_2 -#define GPIO_TIM1_CH1IN /* PA8 T1C1 FMU4 */ GPIO_TIM1_CH1IN_1 -#define GPIO_TIM1_CH2IN /* PE11 T1C2 FMU3 */ GPIO_TIM1_CH2IN_2 -#define GPIO_TIM1_CH3IN /* PA10 T1C3 FMU2 */ GPIO_TIM1_CH3IN_1 -#define GPIO_TIM1_CH4IN /* PE14 T1C4 FMU1 */ GPIO_TIM1_CH4IN_2 - #define DIRECT_INPUT_TIMER_CHANNELS 8 #define BOARD_DSHOT_MOTOR_ASSIGNMENT {3, 2, 1, 0, 4, 5, 6, 7}; - -/* User GPIOs - * - * GPIO0-5 are the PWM servo outputs. - */ - -#define _MK_GPIO_INPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLUP)) - -#define GPIO_GPIO7_INPUT /* PH9 T12C2 FMU8 */ _MK_GPIO_INPUT(GPIO_TIM12_CH2IN) -#define GPIO_GPIO6_INPUT /* PH6 T12C1 FMU7 */ _MK_GPIO_INPUT(GPIO_TIM12_CH1IN) -#define GPIO_GPIO5_INPUT /* PD14 T4C3 FMU6 */ _MK_GPIO_INPUT(GPIO_TIM4_CH3IN) -#define GPIO_GPIO4_INPUT /* PD13 T4C2 FMU5 */ _MK_GPIO_INPUT(GPIO_TIM4_CH2IN) -#define GPIO_GPIO3_INPUT /* PA8 T1C1 FMU4 */ _MK_GPIO_INPUT(GPIO_TIM1_CH1IN) -#define GPIO_GPIO2_INPUT /* PE11 T1C2 FMU3 */ _MK_GPIO_INPUT(GPIO_TIM1_CH2IN) -#define GPIO_GPIO1_INPUT /* PA10 T1C3 FMU2 */ _MK_GPIO_INPUT(GPIO_TIM1_CH3IN) -#define GPIO_GPIO0_INPUT /* PE14 T1C4 FMU1 */ _MK_GPIO_INPUT(GPIO_TIM1_CH4IN) - -#define _MK_GPIO_OUTPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR)) - -#define GPIO_GPIO7_OUTPUT /* PH9 T12C2 FMU8 */ _MK_GPIO_OUTPUT(GPIO_TIM12_CH2OUT) -#define GPIO_GPIO6_OUTPUT /* PH6 T12C1 FMU7 */ _MK_GPIO_OUTPUT(GPIO_TIM12_CH1OUT) -#define GPIO_GPIO5_OUTPUT /* PD14 T4C3 FMU6 */ _MK_GPIO_OUTPUT(GPIO_TIM4_CH3OUT) -#define GPIO_GPIO4_OUTPUT /* PD13 T4C2 FMU5 */ _MK_GPIO_OUTPUT(GPIO_TIM4_CH2OUT) -#define GPIO_GPIO3_OUTPUT /* PA8 T1C1 FMU4 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH1OUT) -#define GPIO_GPIO2_OUTPUT /* PE11 T1C2 FMU3 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH2OUT) -#define GPIO_GPIO1_OUTPUT /* PA10 T1C3 FMU2 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH3OUT) -#define GPIO_GPIO0_OUTPUT /* PE14 T1C4 FMU1 */ _MK_GPIO_OUTPUT(GPIO_TIM1_CH4OUT) - - /* Power supply control and monitoring GPIOs */ #define GPIO_nPOWER_IN_A /* PG1 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTG|GPIO_PIN1) @@ -522,7 +460,7 @@ /* PWM input driver. Use FMU AUX5 pins attached to timer4 channel 2 */ #define PWMIN_TIMER 4 #define PWMIN_TIMER_CHANNEL /* T4C2 */ 2 -#define GPIO_PWM_IN /* PD13 */ GPIO_TIM4_CH2IN +#define GPIO_PWM_IN /* PD13 */ GPIO_TIM4_CH2IN_2 /* Safety Switch is HW version dependent on having an PX4IO * So we init to a benign state with the _INIT definition @@ -616,19 +554,6 @@ #define BOARD_HAS_ON_RESET 1 -/* The list of GPIO that will be initialized */ - -#define PX4_GPIO_PWM_INIT_LIST { \ - GPIO_GPIO7_INPUT, \ - GPIO_GPIO6_INPUT, \ - GPIO_GPIO5_INPUT, \ - GPIO_GPIO4_INPUT, \ - GPIO_GPIO3_INPUT, \ - GPIO_GPIO2_INPUT, \ - GPIO_GPIO1_INPUT, \ - GPIO_GPIO0_INPUT, \ - } - #define PX4_GPIO_INIT_LIST { \ PX4_ADC_GPIO, \ GPIO_HW_VER_REV_DRIVE, \ diff --git a/boards/px4/fmu-v5x/src/init.c b/boards/px4/fmu-v5x/src/init.c index bea75e2fd8..7963ead249 100644 --- a/boards/px4/fmu-v5x/src/init.c +++ b/boards/px4/fmu-v5x/src/init.c @@ -68,6 +68,7 @@ #include #include #include +#include #include #include #include @@ -142,10 +143,9 @@ __EXPORT void board_peripheral_reset(int ms) ************************************************************************************/ __EXPORT void board_on_reset(int status) { - /* configure the GPIO pins to outputs and keep them low */ - - const uint32_t gpio[] = PX4_GPIO_PWM_INIT_LIST; - px4_gpio_init(gpio, arraySize(gpio)); + for (int i = 0; i < DIRECT_PWM_OUTPUT_CHANNELS; ++i) { + px4_arch_configgpio(PX4_MAKE_GPIO_INPUT(io_timer_channel_get_as_pwm_input(i))); + } if (status >= 0) { up_mdelay(6); diff --git a/boards/px4/fmu-v5x/src/timer_config.c b/boards/px4/fmu-v5x/src/timer_config.c deleted file mode 100644 index d572931a8f..0000000000 --- a/boards/px4/fmu-v5x/src/timer_config.c +++ /dev/null @@ -1,247 +0,0 @@ -/**************************************************************************** - * - * Copyright (C) 2012 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* - * @file px4fmu_timer_config.c - * - * Configuration data for the stm32 pwm_servo, input capture and pwm input driver. - * - * Note that these arrays must always be fully-sized. - */ - -#include - -#include -#include -#include - -#include -#include - -#include "board_config.h" - -/* Timer allocation - * - * TIM1_CH4 T FMU_CH1 - * TIM1_CH3 T FMU_CH2 - * TIM1_CH2 T FMU_CH3 - * TIM1_CH1 T FMU_CH4 - * - * TIM4_CH2 T FMU_CH5 - * TIM4_CH3 T FMU_CH6 - * - * TIM12_CH1 T FMU_CH7 - * TIM12_CH2 T FMU_CH8 - * - * TIM5_CH4 T FMU_CAP1 < Capture - * TIM5_CH3 T SPI2_DRDY2_ISM330_INT2 < Capture or GPIO INT - * TIM5_CH1 T SPIX_SYNC > Pulse or GPIO strobe - * TIM2_CH3 T HEATER > PWM OUT or GPIO - * - * TIM14_CH1 T BUZZER_1 - Driven by other driver - * TIM8_CH1_IN T FMU_PPM_INPUT - Sampled byt HRT by other driver - - */ - -__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { - { - .base = STM32_TIM1_BASE, - .clock_register = STM32_RCC_APB2ENR, - .clock_bit = RCC_APB2ENR_TIM1EN, - .clock_freq = STM32_APB2_TIM1_CLKIN, - .vectorno = STM32_IRQ_TIM1CC, - .dshot = { - .dma_base = STM32_DMA2_BASE, - .dmamap = DMAMAP_TIM1_UP, - } - }, - { - .base = STM32_TIM4_BASE, - .clock_register = STM32_RCC_APB1ENR, - .clock_bit = RCC_APB1ENR_TIM4EN, - .clock_freq = STM32_APB1_TIM4_CLKIN, - .vectorno = STM32_IRQ_TIM4, - .dshot = { - .dma_base = STM32_DMA1_BASE, - .dmamap = DMAMAP_TIM4_UP, - } - }, - { - .base = STM32_TIM12_BASE, - .clock_register = STM32_RCC_APB1ENR, - .clock_bit = RCC_APB1ENR_TIM12EN, - .clock_freq = STM32_APB1_TIM12_CLKIN, - .vectorno = STM32_IRQ_TIM12, - }, - { - .base = STM32_TIM5_BASE, - .clock_register = STM32_RCC_APB1ENR, - .clock_bit = RCC_APB1ENR_TIM5EN, - .clock_freq = STM32_APB1_TIM5_CLKIN, - .vectorno = STM32_IRQ_TIM5, - }, - { - .base = STM32_TIM2_BASE, - .clock_register = STM32_RCC_APB1ENR, - .clock_bit = RCC_APB1ENR_TIM2EN, - .clock_freq = STM32_APB1_TIM2_CLKIN, - .vectorno = STM32_IRQ_TIM2, - }, -}; - -__EXPORT const io_timers_channel_mapping_t io_timers_channel_mapping = { - .element = { - { - .first_channel_index = 0, - .channel_count = 4, - }, - { - .first_channel_index = 4, - .channel_count = 2, - }, - { - .first_channel_index = 6, - .channel_count = 2, - }, - { - .first_channel_index = 8, - .channel_count = 3, - }, - { - .first_channel_index = 11, - .channel_count = 1, - } - } -}; - -__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { - { - .gpio_out = GPIO_TIM1_CH4OUT, - .gpio_in = GPIO_TIM1_CH4IN, - .timer_index = 0, - .timer_channel = 4, - .ccr_offset = STM32_GTIM_CCR4_OFFSET, - .masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF - }, - { - .gpio_out = GPIO_TIM1_CH3OUT, - .gpio_in = GPIO_TIM1_CH3IN, - .timer_index = 0, - .timer_channel = 3, - .ccr_offset = STM32_GTIM_CCR3_OFFSET, - .masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF - }, - { - .gpio_out = GPIO_TIM1_CH2OUT, - .gpio_in = GPIO_TIM1_CH2IN, - .timer_index = 0, - .timer_channel = 2, - .ccr_offset = STM32_GTIM_CCR2_OFFSET, - .masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF - }, - { - .gpio_out = GPIO_TIM1_CH1OUT, - .gpio_in = GPIO_TIM1_CH1IN, - .timer_index = 0, - .timer_channel = 1, - .ccr_offset = STM32_GTIM_CCR1_OFFSET, - .masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF - }, - { - .gpio_out = GPIO_TIM4_CH2OUT, - .gpio_in = GPIO_TIM4_CH2IN, - .timer_index = 1, - .timer_channel = 2, - .ccr_offset = STM32_GTIM_CCR2_OFFSET, - .masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF - }, - { - .gpio_out = GPIO_TIM4_CH3OUT, - .gpio_in = GPIO_TIM4_CH3IN, - .timer_index = 1, - .timer_channel = 3, - .ccr_offset = STM32_GTIM_CCR3_OFFSET, - .masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF - }, - { - .gpio_out = GPIO_TIM12_CH1OUT, - .gpio_in = GPIO_TIM12_CH1IN, - .timer_index = 2, - .timer_channel = 1, - .ccr_offset = STM32_GTIM_CCR1_OFFSET, - .masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF - }, - { - .gpio_out = GPIO_TIM12_CH2OUT, - .gpio_in = GPIO_TIM12_CH2IN, - .timer_index = 2, - .timer_channel = 2, - .ccr_offset = STM32_GTIM_CCR2_OFFSET, - .masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF - }, -// todo:Need to support MAX_TIMER_IO_CHANNELS == 12 -#if MAX_TIMER_IO_CHANNELS == 12 - { - .gpio_out = GPIO_TIM5_CH4OUT, - .gpio_in = GPIO_TIM5_CH4IN, - .timer_index = 3, - .timer_channel = 4, - .ccr_offset = STM32_GTIM_CCR4_OFFSET, - .masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF - }, - { - .gpio_out = 0, - .gpio_in = GPIO_TIM5_CH3IN, - .timer_index = 3, - .timer_channel = 3, - .ccr_offset = STM32_GTIM_CCR3_OFFSET, - .masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF - }, - { - .gpio_out = GPIO_TIM5_CH1OUT, - .gpio_in = 0, - .timer_index = 3, - .timer_channel = 1, - .ccr_offset = STM32_GTIM_CCR1_OFFSET, - .masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF - }, - { - .gpio_out = GPIO_TIM2_CH3OUT, - .gpio_in = 0, - .timer_index = 4, - .timer_channel = 3, - .ccr_offset = STM32_GTIM_CCR3_OFFSET, - .masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF - } -#endif -}; diff --git a/boards/px4/fmu-v5x/src/timer_config.cpp b/boards/px4/fmu-v5x/src/timer_config.cpp new file mode 100644 index 0000000000..18474a0956 --- /dev/null +++ b/boards/px4/fmu-v5x/src/timer_config.cpp @@ -0,0 +1,79 @@ +/**************************************************************************** + * + * Copyright (C) 2012 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#include + +/* Timer allocation + * + * TIM1_CH4 T FMU_CH1 + * TIM1_CH3 T FMU_CH2 + * TIM1_CH2 T FMU_CH3 + * TIM1_CH1 T FMU_CH4 + * + * TIM4_CH2 T FMU_CH5 + * TIM4_CH3 T FMU_CH6 + * + * TIM12_CH1 T FMU_CH7 + * TIM12_CH2 T FMU_CH8 + * + * TIM5_CH4 T FMU_CAP1 < Capture + * TIM5_CH3 T SPI2_DRDY2_ISM330_INT2 < Capture or GPIO INT + * TIM5_CH1 T SPIX_SYNC > Pulse or GPIO strobe + * TIM2_CH3 T HEATER > PWM OUT or GPIO + * + * TIM14_CH1 T BUZZER_1 - Driven by other driver + * TIM8_CH1_IN T FMU_PPM_INPUT - Sampled byt HRT by other driver + */ + +constexpr io_timers_t io_timers[MAX_IO_TIMERS] = { + initIOTimer(Timer::Timer1, DMA{DMA::Index2, DMA::Stream5, DMA::Channel6}), + initIOTimer(Timer::Timer4, DMA{DMA::Index1, DMA::Stream6, DMA::Channel2}), + initIOTimer(Timer::Timer12), + initIOTimer(Timer::Timer5), + initIOTimer(Timer::Timer2), +}; + +constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { + initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel4}, {GPIO::PortE, GPIO::Pin14}), + initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel3}, {GPIO::PortA, GPIO::Pin10}), + initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel2}, {GPIO::PortE, GPIO::Pin11}), + initIOTimerChannel(io_timers, {Timer::Timer1, Timer::Channel1}, {GPIO::PortA, GPIO::Pin8}), + initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel2}, {GPIO::PortD, GPIO::Pin13}), + initIOTimerChannel(io_timers, {Timer::Timer4, Timer::Channel3}, {GPIO::PortD, GPIO::Pin14}), + initIOTimerChannel(io_timers, {Timer::Timer12, Timer::Channel1}, {GPIO::PortH, GPIO::Pin6}), + initIOTimerChannel(io_timers, {Timer::Timer12, Timer::Channel2}, {GPIO::PortH, GPIO::Pin9}), +}; + +constexpr io_timers_channel_mapping_t io_timers_channel_mapping = + initIOTimerChannelMapping(io_timers, timer_io_channels); +