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Beginnings of definitions for the LPC1788; convert olimex-lpc1766stk to use kconfig-frontends
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5533 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
@@ -12,49 +12,101 @@ choice
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config ARCH_CHIP_LPC1751
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bool "LPC1751"
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select ARCH_FAMILY_LPC175X
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config ARCH_CHIP_LPC1752
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bool "LPC1752"
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select ARCH_FAMILY_LPC175X
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config ARCH_CHIP_LPC1754
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bool "LPC1754"
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select ARCH_FAMILY_LPC175X
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config ARCH_CHIP_LPC1756
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bool "LPC1756"
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select ARCH_FAMILY_LPC175X
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config ARCH_CHIP_LPC1758
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bool "LPC1758"
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select ARCH_FAMILY_LPC175X
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config ARCH_CHIP_LPC1759
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bool "LPC1759"
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select ARCH_FAMILY_LPC175X
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config ARCH_CHIP_LPC1764
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bool "LPC1764"
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select ARCH_FAMILY_LPC176X
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config ARCH_CHIP_LPC1765
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bool "LPC1765"
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select ARCH_FAMILY_LPC176X
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config ARCH_CHIP_LPC1766
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bool "LPC1766"
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select ARCH_FAMILY_LPC176X
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config ARCH_CHIP_LPC1767
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bool "LPC1767"
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select ARCH_FAMILY_LPC176X
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config ARCH_CHIP_LPC1768
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bool "LPC1768"
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select ARCH_FAMILY_LPC176X
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config ARCH_CHIP_LPC1769
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bool "LPC1769"
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select ARCH_FAMILY_LPC176X
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config ARCH_CHIP_LPC1773
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bool "LPC1773"
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select ARCH_FAMILY_LPC177X
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config ARCH_CHIP_LPC1774
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bool "LPC1774"
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select ARCH_FAMILY_LPC177X
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config ARCH_CHIP_LPC1776
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bool "LPC1776"
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select ARCH_FAMILY_LPC177X
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config ARCH_CHIP_LPC1777
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bool "LPC1777"
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select ARCH_FAMILY_LPC177X
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config ARCH_CHIP_LPC1778
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bool "LPC1778"
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select ARCH_FAMILY_LPC177X
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config ARCH_CHIP_LPC1785
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bool "LPC1785"
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select ARCH_FAMILY_LPC178X
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config ARCH_CHIP_LPC1786
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bool "LPC1786"
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select ARCH_FAMILY_LPC178X
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config ARCH_CHIP_LPC1787
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bool "LPC1787"
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select ARCH_FAMILY_LPC178X
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config ARCH_CHIP_LPC1788
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bool "LPC1788"
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select ARCH_FAMILY_LPC178X
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endchoice
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config ARCH_FAMILY_LPC175X
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bool
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default y if ARCH_CHIP_LPC1751 || ARCH_CHIP_LPC1752 || ARCH_CHIP_LPC1754 || ARCH_CHIP_LPC1756 || ARCH_CHIP_LPC1758 || ARCH_CHIP_LPC1759
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config ARCH_FAMILY_LPC176X
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bool
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default y if ARCH_CHIP_LPC1764 || ARCH_CHIP_LPC1765 || ARCH_CHIP_LPC1766 || ARCH_CHIP_LPC1767 || ARCH_CHIP_LPC1768 || ARCH_CHIP_LPC1769
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config ARCH_FAMILY_LPC177X
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bool
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config ARCH_FAMILY_LPC178X
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bool
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menu "LPC17xx Peripheral Support"
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@@ -41,159 +41,7 @@
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Get customizations for each supported chip */
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#if defined(CONFIG_ARCH_CHIP_LPC1769) || defined(CONFIG_ARCH_CHIP_LPC1768)
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# define LPC17_FLASH_SIZE (512*1024) /* 512Kb */
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# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */
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# define LPC17_CPUSRAM_SIZE (32*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# define LPC17_HAVE_BANK1 1 /* Have AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */
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# define LPC17_NUSBHOST 1 /* One USB host controller */
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# define LPC17_NUSBOTG 1 /* One USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 2 /* Two CAN controllers */
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# define LPC17_NI2S 1 /* One I2S module */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1767)
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# define LPC17_FLASH_SIZE (512*1024) /* 512Kb */
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# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */
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# define LPC17_CPUSRAM_SIZE (32*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# define LPC17_HAVE_BANK1 1 /* Have AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */
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# define LPC17_NUSBHOST 0 /* No USB host controller */
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# define LPC17_NUSBOTG 0 /* No USB OTG controller */
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# define LPC17_NUSBDEV 0 /* No USB device controller */
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# define LPC17_NCAN 0 /* No CAN controllers */
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# define LPC17_NI2S 1 /* One I2S module */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1766)
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# define LPC17_FLASH_SIZE (256*1024) /* 256Kb */
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# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */
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# define LPC17_CPUSRAM_SIZE (32*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# define LPC17_HAVE_BANK1 1 /* Have AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */
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# define LPC17_NUSBHOST 1 /* One USB host controller */
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# define LPC17_NUSBOTG 1 /* One USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 2 /* Two CAN controllers */
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# define LPC17_NI2S 1 /* One I2S module */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1765)
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# define LPC17_FLASH_SIZE (256*1024) /* 256Kb */
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# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */
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# define LPC17_CPUSRAM_SIZE (32*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# define LPC17_HAVE_BANK1 1 /* Have AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 0 /* No Ethernet controller */
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# define LPC17_NUSBHOST 1 /* One USB host controller */
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# define LPC17_NUSBOTG 1 /* One USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 2 /* Two CAN controllers */
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# define LPC17_NI2S 1 /* One I2S module */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1764)
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# define LPC17_FLASH_SIZE (128*1024) /* 128Kb */
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# define LPC17_SRAM_SIZE (32*1024) /* 32Kb */
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# define LPC17_CPUSRAM_SIZE (16*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# undef LPC17_HAVE_BANK1 /* No AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */
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# define LPC17_NUSBHOST 0 /* No USB host controller */
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# define LPC17_NUSBOTG 0 /* No USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 2 /* Two CAN controllers */
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# define LPC17_NI2S 0 /* No I2S modules */
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# define LPC17_NDAC 0 /* No DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1759)
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# define LPC17_FLASH_SIZE (512*1024) /* 512Kb */
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# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */
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# define LPC17_CPUSRAM_SIZE (32*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# define LPC17_HAVE_BANK1 1 /* Have AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 0 /* No Ethernet controller */
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# define LPC17_NUSBHOST 1 /* One USB host controller */
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# define LPC17_NUSBOTG 1 /* One USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 2 /* Two CAN controllers */
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# define LPC17_NI2S 1 /* One I2S module */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1758)
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# define LPC17_FLASH_SIZE (512*1024) /* 512Kb */
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# define LPC17_SRAM_SIZE (64*1024) /* 64Kb */
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# define LPC17_CPUSRAM_SIZE (32*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# define LPC17_HAVE_BANK1 1 /* Have AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 1 /* One Ethernet controller */
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# define LPC17_NUSBHOST 1 /* One USB host controller */
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# define LPC17_NUSBOTG 1 /* One USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 2 /* Two CAN controllers */
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# define LPC17_NI2S 1 /* One I2S module */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1756)
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# define LPC17_FLASH_SIZE (256*1024) /* 256Kb */
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# define LPC17_SRAM_SIZE (32*1024) /* 32Kb */
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# define LPC17_CPUSRAM_SIZE (16*1024)
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# define LPC17_HAVE_BANK0 1 /* No AHB SRAM bank 0 */
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# undef LPC17_HAVE_BANK1 /* No AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 0 /* No Ethernet controller */
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# define LPC17_NUSBHOST 1 /* One USB host controller */
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# define LPC17_NUSBOTG 1 /* One USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 2 /* Two CAN controllers */
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# define LPC17_NI2S 1 /* One I2S module */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1754)
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# define LPC17_FLASH_SIZE (128*1024) /* 128Kb */
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# define LPC17_SRAM_SIZE (32*1024) /* 32Kb */
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# define LPC17_CPUSRAM_SIZE (16*1024)
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# define LPC17_HAVE_BANK0 1 /* Have AHB SRAM bank 0 */
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# undef LPC17_HAVE_BANK1 /* No AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 0 /* No Ethernet controller */
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# define LPC17_NUSBHOST 1 /* One USB host controller */
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# define LPC17_NUSBOTG 1 /* One USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 1 /* One CAN controller */
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# define LPC17_NI2S 0 /* No I2S modules */
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# define LPC17_NDAC 1 /* One DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1752)
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# define LPC17_FLASH_SIZE (64*1024) /* 65Kb */
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# define LPC17_SRAM_SIZE (16*1024) /* 16Kb */
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# define LPC17_CPUSRAM_SIZE (16*1024)
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# undef LPC17_HAVE_BANK0 /* No AHB SRAM bank 0 */
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# undef LPC17_HAVE_BANK1 /* No AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 0 /* No Ethernet controller */
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# define LPC17_NUSBHOST 0 /* No USB host controller */
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# define LPC17_NUSBOTG 0 /* No USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 1 /* One CAN controller */
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# define LPC17_NI2S 0 /* No I2S modules */
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# define LPC17_NDAC 0 /* No DAC module */
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#elif defined(CONFIG_ARCH_CHIP_LPC1751)
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# define LPC17_FLASH_SIZE (32*1024) /* 32Kb */
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# define LPC17_SRAM_SIZE (8*1024) /* 8Kb */
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# define LPC17_CPUSRAM_SIZE (8*1024)
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# undef LPC17_HAVE_BANK0 /* No AHB SRAM bank 0 */
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# undef LPC17_HAVE_BANK1 /* No AHB SRAM bank 1 */
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# define LPC17_NETHCONTROLLERS 0 /* No Ethernet controller */
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# define LPC17_NUSBHOST 0 /* No USB host controller */
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# define LPC17_NUSBOTG 0 /* No USB OTG controller */
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# define LPC17_NUSBDEV 1 /* One USB device controller */
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# define LPC17_NCAN 1 /* One CAN controller */
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# define LPC17_NI2S 0 /* No I2S modules */
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# define LPC17_NDAC 0 /* No DAC module */
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#else
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# error "Unsupported LPC17xx chip"
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#endif
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#include <arch/lpc17xx/chip.h>
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/* Include only the memory map. Other chip hardware files should then include this
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* file for the proper setup
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@@ -201,6 +49,10 @@
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* NVIC priority levels *************************************************************/
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/* Each priority field holds a priority value, 0-31. The lower the value, the greater
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* the priority of the corresponding interrupt. The processor implements only
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@@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/lpc17xx/lpc17_ssp.c
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*
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* Copyright (C) 2010-2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2010-2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -926,4 +926,3 @@ void ssp_flush(FAR struct spi_dev_s *dev)
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}
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#endif /* CONFIG_LPC17_SSP0/1 */
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