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synced 2026-10-18 13:33:34 +08:00
Encode the packet type and result in the unused high bits of the word count.
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@@ -80,8 +80,7 @@ static unsigned idle_ticks;
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#pragma pack(push, 1)
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struct IOPacket {
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uint8_t count;
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#define PKT_CTRL_WRITE (1<<7)
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uint8_t count_code;
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uint8_t spare;
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uint8_t page;
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uint8_t offset;
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@@ -89,6 +88,21 @@ struct IOPacket {
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};
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#pragma pack(pop)
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#define PKT_CODE_READ 0x00 /* FMU->IO read transaction */
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#define PKT_CODE_WRITE 0x40 /* FMU->IO write transaction */
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#define PKT_CODE_SUCCESS 0x00 /* IO->FMU success reply */
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#define PKT_CODE_CORRUPT 0x40 /* IO->FMU bad packet reply */
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#define PKT_CODE_ERROR 0x80 /* IO->FMU register op error reply */
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#define PKT_CODE_MASK 0xc0
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#define PKT_COUNT_MASK 0x3f
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#define PKT_COUNT(_p) ((_p).count_code & PKT_COUNT_MASK)
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#define PKT_CODE(_p) ((_p).count_code & PKT_CODE_MASK)
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#define PKT_SIZE(_p) ((uint8_t *)&((_p).regs[PKT_COUNT(_p)]) - ((uint8_t *)&(_p)))
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//static uint8_t crc_packet(void);
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static struct IOPacket dma_packet;
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/* serial register accessors */
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@@ -192,12 +206,10 @@ rx_dma_callback(DMA_HANDLE handle, uint8_t status, void *arg)
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perf_count(pc_rx);
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/* default to not sending a reply */
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if (dma_packet.count & PKT_CTRL_WRITE) {
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dma_packet.count &= ~PKT_CTRL_WRITE;
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if (PKT_CODE(dma_packet) == PKT_CODE_WRITE) {
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/* it's a blind write - pass it on */
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if (registers_set(dma_packet.page, dma_packet.offset, &dma_packet.regs[0], dma_packet.count))
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if (registers_set(dma_packet.page, dma_packet.offset, &dma_packet.regs[0], PKT_COUNT(dma_packet)))
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perf_count(pc_regerr);
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} else {
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@@ -217,7 +229,7 @@ rx_dma_callback(DMA_HANDLE handle, uint8_t status, void *arg)
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/* copy reply registers into DMA buffer */
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memcpy((void *)&dma_packet.regs[0], registers, count);
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dma_packet.count = count;
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dma_packet.count_code = count | PKT_CODE_SUCCESS;
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}
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/* re-set DMA for reception first, so we are ready to receive before we start sending */
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