For STM32 PWM output on TIM1/8, need to set master output enable (MOE)

git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4296 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
2012-01-11 16:01:18 +00:00
parent 7d970cf8bb
commit 309633cbdb
3 changed files with 66 additions and 27 deletions
+11
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@@ -825,6 +825,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM) #if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
if (priv->timtype == TIMTYPE_ADVANCED) if (priv->timtype == TIMTYPE_ADVANCED)
{ {
uint16_t bdtr;
/* Reset output N polarity level, output N state, output compare state, /* Reset output N polarity level, output N state, output compare state,
* output compare N idle state. * output compare N idle state.
*/ */
@@ -841,6 +843,15 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
cr2 &= ~(ATIM_CR2_OIS1 | ATIM_CR2_OIS1N | ATIM_CR2_OIS2 | ATIM_CR2_OIS2N | cr2 &= ~(ATIM_CR2_OIS1 | ATIM_CR2_OIS1N | ATIM_CR2_OIS2 | ATIM_CR2_OIS2N |
ATIM_CR2_OIS3 | ATIM_CR2_OIS3N | ATIM_CR2_OIS4); ATIM_CR2_OIS3 | ATIM_CR2_OIS3N | ATIM_CR2_OIS4);
/* Set the main output enable (MOE) bit and clear the OSSI and OSSR
* bits in the BDTR register.
*/
bdtr = pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET);
bdtr &= ~(ATIM_BDTR_OSSI | ATIM_BDTR_OSSR);
bdtr |= ATIM_BDTR_MOE;
pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, bdtr);
} }
#ifdef CONFIG_STM32_STM32F40XX #ifdef CONFIG_STM32_STM32F40XX
else else
+49 -21
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@@ -209,17 +209,45 @@ PWM
=== ===
The STM3240G-Eval has no real on-board PWM devices, but the board can be The STM3240G-Eval has no real on-board PWM devices, but the board can be
configured to output a pulse train using TIM4 CH2. This pin is used by configured to output a pulse train using timer output pins. The following
FSMC is but is also connected to the Motor Control Connector (CN5) just pins have been use to generate PWM output (see board.h for some other
for this purpose: candidates):
PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB) TIM4 CH2. Pin PD13 is used by the FSMC (FSMC_A18) and is also connected
to the Motor Control Connector (CN5) just for this purpose. If FSMC is
not enabled, then FSMC_A18 will not be used (and will be tri-stated from
the LCD).
FSMC must be disabled in this case! PD13 is available at: CONFIGURATION:
CONFIG_STM32_TIM4=y
CONFIG_PWM=n
CONFIG_PWM_PULSECOUNT=n
CONFIG_STM32_TIM4_PWM=y
CONFIG_STM32_TIM4_CHANNEL=2
Daughterboard Extension Connector, CN3, pin 32 - available ACCESS:
TFT LCD Connector, CN19, pin 17 -- not available without removing the LCD.
Motor Control Connector CN15, pin 33 -- not available unless you bridge SB14. Daughterboard Extension Connector, CN3, pin 32
Ground is available on CN3, pin1
NOTE: TIM4 hardware will not support pulse counting.
TIM8 CH4: Pin PC9 is used by the microSD card (MicroSDCard_D1) and I2S
(I2S_CKIN) but can be completely disconnected from both by opening JP16.
CONFIGURATION:
CONFIG_STM32_TIM8=y
CONFIG_PWM=n
CONFIG_PWM_PULSECOUNT=y
CONFIG_STM32_TIM8_PWM=y
CONFIG_STM32_TIM8_CHANNEL=4
ACCESS:
Daughterboard Extension Connector, CN3, pin 17
Ground is available on CN3, pin1
CAN CAN
=== ===
@@ -592,27 +620,27 @@ Where <subdir> is one of the following:
CONFIG_DEBUG_ANALOG CONFIG_DEBUG_ANALOG
3. This example supports the PWM test (apps/examples/pwm) but this must 3. This example supports the PWM test (apps/examples/pwm) but this must
be manually enabled by selecting: be manually enabled by selecting eeither
CONFIG_PWM=y : Enable the generic PWM infrastructure CONFIG_PWM=y : Enable the generic PWM infrastructure
CONFIG_PWM_PULSECOUNT=n : Disable to support for TIM1/8 pulse counts CONFIG_PWM_PULSECOUNT=n : Disable to support for TIM1/8 pulse counts
CONFIG_STM32_TIM4=y : Enable TIM4 CONFIG_STM32_TIM4=y : Enable TIM4
CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output
CONFIG_STM32_TIM4_CHANNEL=2 CONFIG_STM32_TIM4_CHANNEL=2 : Select output on TIM4, channel 2
If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 32. If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 32.
Ground is available on CN3, pin1. Ground is available on CN3, pin1.
Or.. Or..
CONFIG_PWM=y : Enable the generic PWM infrastructure CONFIG_PWM=y : Enable the generic PWM infrastructure
CONFIG_PWM_PULSECOUNT=y : Enable to support for TIM1/8 pulse counts CONFIG_PWM_PULSECOUNT=y : Enable to support for TIM1/8 pulse counts
CONFIG_STM32_TIM1=y : Enable TIM1 CONFIG_STM32_TIM8=y : Enable TIM8
CONFIG_STM32_TIM1_PWM=y : Use TIM1 to generate PWM output CONFIG_STM32_TIM8_PWM=y : Use TIM8 to generate PWM output
CONFIG_STM32_TIM1_CHANNEL=1 CONFIG_STM32_TIM8_CHANNEL=4 : Select output on TIM8, channel 4
If CONFIG_STM32_FSMC is disabled, output will appear on CN2, pin 24 If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 17
Ground is available on CN2, pin1. Ground is available on CN23 pin1.
See also include/board.h and apps/examples/README.txt See also include/board.h and apps/examples/README.txt
+6 -6
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@@ -349,13 +349,13 @@ CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100
# PWM configuration # PWM configuration
# #
# The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output # The STM3240G-Eval has no real on-board PWM devices, but the board can be configured to output
# a pulse train using several options (see board.h). Here the default setup is for TIM4, CH2. # a pulse train using several options (see board.h). Here the default setup is for TIM8, CH4.
# Don't forget to enable CONFIG_STM32_TIM4 # Don't forget to enable CONFIG_STM32_TIM8.
# #
CONFIG_PWM=n CONFIG_PWM=y
CONFIG_PWM_PULSECOUNT=n CONFIG_PWM_PULSECOUNT=y
CONFIG_STM32_TIM4_PWM=y CONFIG_STM32_TIM8_PWM=y
CONFIG_STM32_TIM4_CHANNEL=2 CONFIG_STM32_TIM8_CHANNEL=4
# #
# General build options # General build options