From 2f2f1ff8eabaa15e1783ca73fca0e1735fdaf9b6 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 4 May 2017 08:41:47 -1000 Subject: [PATCH] nxphlite-v3:Use 8bit io on usart access for inversion Fix comment Use 8bit io on usart access for inversion, 32 bit on odd address was causwing BUS access hard fault. --- nuttx-configs/nxphlite-v3/include/board.h | 2 +- src/drivers/boards/nxphlite-v3/nxphlite_init.c | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/nuttx-configs/nxphlite-v3/include/board.h b/nuttx-configs/nxphlite-v3/include/board.h index f2175c05ba..baf7c6bf3c 100644 --- a/nuttx-configs/nxphlite-v3/include/board.h +++ b/nuttx-configs/nxphlite-v3/include/board.h @@ -436,7 +436,7 @@ * -------- ------------ ------- --------- */ -/* UART3 +/* UART4 * * P10 Pin Name K66 Name * -------- ------------ ------- --------- diff --git a/src/drivers/boards/nxphlite-v3/nxphlite_init.c b/src/drivers/boards/nxphlite-v3/nxphlite_init.c index 01194f76ee..bc2e67bc4b 100644 --- a/src/drivers/boards/nxphlite-v3/nxphlite_init.c +++ b/src/drivers/boards/nxphlite-v3/nxphlite_init.c @@ -157,8 +157,8 @@ __EXPORT void board_rc_input(bool invert_on) irqstate_t irqstate = px4_enter_critical_section(); - uint32_t s2 = getreg32(KINETIS_UART_S2_OFFSET + RC_UXART_BASE); - uint32_t c3 = getreg32(KINETIS_UART_C3_OFFSET + RC_UXART_BASE); + uint8_t s2 = getreg8(KINETIS_UART_S2_OFFSET + RC_UXART_BASE); + uint8_t c3 = getreg8(KINETIS_UART_C3_OFFSET + RC_UXART_BASE); /* {R|T}XINV bit fields can written any time */ @@ -171,8 +171,8 @@ __EXPORT void board_rc_input(bool invert_on) c3 &= ~(UART_C3_TXINV); } - putreg32(s2, KINETIS_UART_S2_OFFSET + RC_UXART_BASE); - putreg32(c3, KINETIS_UART_C3_OFFSET + RC_UXART_BASE); + putreg8(s2, KINETIS_UART_S2_OFFSET + RC_UXART_BASE); + putreg8(c3, KINETIS_UART_C3_OFFSET + RC_UXART_BASE); leave_critical_section(irqstate); }