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Enablement of PX4 SPI driver for UCANS32K146
This commit is contained in:
committed by
David Sidrane
parent
a548c94230
commit
24cd0c6fa3
@@ -0,0 +1,71 @@
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/****************************************************************************
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*
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* Copyright (c) 2021 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#pragma once
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#include "../../../s32k1xx/include/px4_arch/spi_hw_description.h"
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constexpr bool validateSPIConfig(const px4_spi_bus_t spi_busses_conf[SPI_BUS_MAX_BUS_ITEMS])
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{
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const bool nuttx_enabled_spi_buses[] = {
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#ifdef CONFIG_S32K1XX_LPSPI0
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true,
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#else
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false,
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#endif
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#ifdef CONFIG_S32K1XX_LPSPI1
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true,
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#else
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false,
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#endif
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#ifdef CONFIG_S32K1XX_LPSPI2
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true,
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#else
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false,
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#endif
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};
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for (unsigned i = 0; i < sizeof(nuttx_enabled_spi_buses) / sizeof(nuttx_enabled_spi_buses[0]); ++i) {
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bool found_bus = false;
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for (int j = 0; j < SPI_BUS_MAX_BUS_ITEMS; ++j) {
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if (spi_busses_conf[j].bus == (int)i + 1) {
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found_bus = true;
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}
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}
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// Either the bus is enabled in NuttX and configured in spi_busses_conf, or disabled and not configured
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constexpr_assert(found_bus == nuttx_enabled_spi_buses[i], "SPI bus config mismatch (CONFIG_S32K1XX_LPSPIn)");
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}
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return false;
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}
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@@ -240,3 +240,22 @@ static inline constexpr uint32_t getGPIOPin(GPIO::Pin pin)
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return 0;
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}
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namespace SPI
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{
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enum class Bus {
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SPI0 = 1,
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SPI1,
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SPI2,
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};
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using CS = GPIO::GPIOPin;
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using DRDY = GPIO::GPIOPin;
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struct bus_device_external_cfg_t {
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CS cs_gpio;
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DRDY drdy_gpio;
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};
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} // namespace SPI
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@@ -0,0 +1,133 @@
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/****************************************************************************
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*
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* Copyright (C) 2020 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name PX4 nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#pragma once
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#include <px4_arch/hw_description.h>
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#include <px4_platform_common/spi.h>
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#include "s32k1xx_config.h"
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#include "s32k1xx_lpspi.h"
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#include "s32k1xx_pin.h"
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static inline constexpr px4_spi_bus_device_t initSPIDevice(uint32_t devid, SPI::CS cs_gpio, SPI::DRDY drdy_gpio = {})
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{
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px4_spi_bus_device_t ret{};
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ret.cs_gpio = getGPIOPort(cs_gpio.port) | getGPIOPin(cs_gpio.pin) | (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE);
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if (drdy_gpio.port != GPIO::PortInvalid) {
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ret.drdy_gpio = getGPIOPort(drdy_gpio.port) | getGPIOPin(drdy_gpio.pin) | (GPIO_PULLUP | PIN_INT_BOTH);
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}
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if (PX4_SPIDEVID_TYPE(devid) == 0) { // it's a PX4 device (internal or external)
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ret.devid = PX4_SPIDEV_ID(PX4_SPI_DEVICE_ID, devid);
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} else { // it's a NuttX device (e.g. SPIDEV_FLASH(0))
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ret.devid = devid;
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}
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ret.devtype_driver = PX4_SPI_DEV_ID(devid);
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return ret;
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}
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static inline constexpr px4_spi_bus_t initSPIBus(SPI::Bus bus, const px4_spi_bus_devices_t &devices,
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GPIO::GPIOPin power_enable = {})
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{
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px4_spi_bus_t ret{};
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ret.requires_locking = false;
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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ret.devices[i] = devices.devices[i];
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if (ret.devices[i].cs_gpio != 0) {
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if (PX4_SPI_DEVICE_ID == PX4_SPIDEVID_TYPE(ret.devices[i].devid)) {
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int same_devices_count = 0;
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for (int j = 0; j < i; ++j) {
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if (ret.devices[j].cs_gpio != 0) {
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same_devices_count += (ret.devices[i].devid & 0xff) == (ret.devices[j].devid & 0xff);
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}
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}
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// increment the 2. LSB byte to allow multiple devices of the same type
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ret.devices[i].devid |= same_devices_count << 8;
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} else {
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// A bus potentially requires locking if it is accessed by non-PX4 devices (i.e. NuttX drivers)
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ret.requires_locking = true;
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}
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}
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}
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ret.bus = (int)bus;
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ret.is_external = false;
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if (power_enable.port != GPIO::PortInvalid) {
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ret.power_enable_gpio = getGPIOPort(power_enable.port) | getGPIOPin(power_enable.pin) |
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(GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE);
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}
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return ret;
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}
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// just a wrapper since we cannot pass brace-enclosed initialized arrays directly as arguments
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struct bus_device_external_cfg_array_t {
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SPI::bus_device_external_cfg_t devices[SPI_BUS_MAX_DEVICES];
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};
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static inline constexpr px4_spi_bus_t initSPIBusExternal(SPI::Bus bus, const bus_device_external_cfg_array_t &devices)
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{
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px4_spi_bus_t ret{};
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (devices.devices[i].cs_gpio.port == GPIO::PortInvalid) {
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break;
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}
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ret.devices[i] = initSPIDevice(i, devices.devices[i].cs_gpio, devices.devices[i].drdy_gpio);
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}
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ret.bus = (int)bus;
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ret.is_external = true;
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ret.requires_locking = false; // external buses are never accessed by NuttX drivers
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return ret;
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}
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static inline constexpr SPI::bus_device_external_cfg_t initSPIConfigExternal(SPI::CS cs_gpio, SPI::DRDY drdy_gpio = {})
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{
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SPI::bus_device_external_cfg_t ret{};
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ret.cs_gpio = cs_gpio;
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ret.drdy_gpio = drdy_gpio;
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return ret;
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}
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