mirror of
https://gitee.com/mirrors_PX4/PX4-Autopilot.git
synced 2026-10-20 21:13:33 +08:00
Enablement of PX4 SPI driver for UCANS32K146
This commit is contained in:
Landon Haugh
committed by
David Sidrane
David Sidrane
parent
a548c94230
commit
24cd0c6fa3
@@ -103,8 +103,7 @@ CONFIG_SCHED_WAITPID=y
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CONFIG_SDCLONE_DISABLE=y
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CONFIG_SERIAL_TERMIOS=y
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CONFIG_SIG_DEFAULT=y
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CONFIG_SPITOOL_DEFFREQ=400000
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CONFIG_SPITOOL_MAXBUS=0
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CONFIG_SPITOOL_MAXBUS=2
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CONFIG_STACK_COLORATION=y
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CONFIG_START_DAY=18
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CONFIG_START_MONTH=8
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@@ -62,7 +62,7 @@ else()
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init.c
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mtd.cpp
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periphclocks.c
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spi.c
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spi.cpp
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timer_config.cpp
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userleds.c
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)
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@@ -160,8 +160,9 @@ int s32k1xx_bringup(void);
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*
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****************************************************************************/
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#ifdef CONFIG_S32K1XX_LPSPI
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#ifdef CONFIG_S32K1XX_LPSPI0
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void s32k1xx_spidev_initialize(void);
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int s32k1xx_spi_bus_initialize(void);
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#endif
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/****************************************************************************************************
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@@ -124,12 +124,13 @@ int s32k1xx_bringup(void)
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s32k1xx_eeeprom_register(0, 4096);
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#endif
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#ifdef CONFIG_S32K1XX_LPSPI
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#ifdef CONFIG_S32K1XX_LPSPI0
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/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
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* function s32k1xx_spidev_initialize() has been brought into the link.
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*/
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s32k1xx_spidev_initialize();
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s32k1xx_spi_bus_initialize();
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#endif
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#if defined(CONFIG_S32K1XX_LPI2C0)
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@@ -34,6 +34,5 @@
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#include <px4_arch/i2c_hw_description.h>
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constexpr px4_i2c_bus_t px4_i2c_buses[I2C_BUS_MAX_BUS_ITEMS] = {
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initI2CBusInternal(PX4_BUS_NUMBER_TO_PX4(1)),
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initI2CBusExternal(PX4_BUS_NUMBER_TO_PX4(0)),
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};
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@@ -0,0 +1,230 @@
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/************************************************************************************
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*
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* Copyright (C) 2016, 2018, 2021 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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* Landon Haugh <landon.haugh@nxp.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#include <nuttx/config.h>
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#include <px4_arch/spi_hw_description.h>
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#include <px4_platform_common/px4_config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include "arm_arch.h"
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#include "chip.h"
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#include <systemlib/px4_macros.h>
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#include "s32k1xx_config.h"
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#include "s32k1xx_lpspi.h"
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#include "s32k1xx_pin.h"
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#include "board_config.h"
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#if defined(CONFIG_S32K1XX_LPSPI0)
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// Only LPSPI0 is defined in defconfig. cont. || defined(CONFIG_S32K1XX_LPSPI1) || defined(CONFIG_S32K1XX_LPSPI2)
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// UCANS32K146 has only one external SPI @ PTB5
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constexpr px4_spi_bus_t px4_spi_buses[SPI_BUS_MAX_BUS_ITEMS] = {
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initSPIBusExternal(SPI::Bus::SPI0, {
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// Going to assume PTB5 means PortB, Pin5
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initSPIConfigExternal(SPI::CS{GPIO::PortB, GPIO::Pin5})
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}),
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};
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static constexpr bool unused = validateSPIConfig(px4_spi_buses);
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#define PX4_MK_GPIO(pin_ftmx, io) ((((uint32_t)(pin_ftmx)) & ~(_PIN_MODE_MASK | _PIN_OPTIONS_MASK)) |(io))
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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__EXPORT void board_spi_reset(int ms, int bus_mask)
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{
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/* Goal not to back feed the chips on the bus via IO lines */
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/* Next Change CS to inputs with pull downs */
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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if (px4_spi_buses[bus].bus == PX4_BUS_NUMBER_TO_PX4(1)) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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// s32k1xx_pinconfig is defined
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// Only one argument, (uint32_t cfgset)
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s32k1xx_pinconfig(PX4_MK_GPIO(px4_spi_buses[bus].devices[i].cs_gpio, GPIO_PULLDOWN));
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}
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}
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}
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}
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/* Restore all the CS to ouputs inactive */
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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if (px4_spi_buses[bus].bus == PX4_BUS_NUMBER_TO_PX4(1)) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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s32k1xx_pinconfig(px4_spi_buses[bus].devices[i].cs_gpio);
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}
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}
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}
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}
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}
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/************************************************************************************
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* Name: s32k1xx_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the NXP UCANS32K146 board.
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*
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************************************************************************************/
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void s32k1xx_spidev_initialize(void)
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{
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board_spi_reset(10, 0xffff);
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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s32k1xx_pinconfig(px4_spi_buses[bus].devices[i].cs_gpio);
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}
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}
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}
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}
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/************************************************************************************
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* Name: s32k1xx_spi_bus_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the NXP UCANS32K146 board.
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*
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************************************************************************************/
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static const px4_spi_bus_t *_spi_bus0;
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__EXPORT int s32k1xx_spi_bus_initialize(void)
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{
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for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
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switch (px4_spi_buses[i].bus) {
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case 1: _spi_bus0 = &px4_spi_buses[i]; break;
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}
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}
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struct spi_dev_s *spi_ext = px4_spibus_initialize(1);
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if (!spi_ext) {
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syslog(LOG_ERR, "[boot] FAILED to initialize SPI port %d\n", 2);
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return -ENODEV;
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}
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/* Default external bus to 1MHz and de-assert the known chip selects.
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*/
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SPI_SETFREQUENCY(spi_ext, 8 * 1000 * 1000);
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SPI_SETBITS(spi_ext, 8);
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SPI_SETMODE(spi_ext, SPIDEV_MODE3);
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/* deselect all */
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
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SPI_SELECT(spi_ext, px4_spi_buses[bus].devices[i].devid, false);
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}
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}
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}
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return OK;
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}
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/************************************************************************************
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* Name: s32k1xx_spi[n]select, s32k1xx_spi[n]status, and s32k1xx_spi[n]cmddata
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*
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* Description:
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* These external functions must be provided by board-specific logic. They are
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* implementations of the select, status, and cmddata methods of the SPI interface
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* defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
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* including s32k1xx_spibus_initialize()) are provided by common s32k1xx logic.
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* To use this common SPI logic on your board:
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*
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* 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide s32k1xx_spi[n]select() and s32k1xx_spi[n]status() functions
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* in your board-specific logic. These functions will perform chip selection
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* and status operations using GPIOs in the way your board is configured.
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* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
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* s32k1xx_spi[n]cmddata() functions in your board-specific logic. These
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* functions will perform cmd/data selection operations using GPIOs in the way
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* your board is configured.
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* 3. Add a call to s32k1xx_spibus_initialize() in your low level application
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* initialization logic
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* 4. The handle returned by s32k1xx_spibus_initialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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************************************************************************************/
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static inline void s32k1xx_spixselect(const px4_spi_bus_t *bus, struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (bus->devices[i].cs_gpio == 0) {
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break;
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}
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if (devid == bus->devices[i].devid) {
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// SPI select is active low, so write !selected to select the device
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// s32k1xx_gpiowrite is defined (uint32_t pinset, bool value)
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s32k1xx_gpiowrite(bus->devices[i].cs_gpio, !selected);
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}
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}
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}
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void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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s32k1xx_spixselect(_spi_bus0, dev, devid, selected);
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}
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uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif /* CONFIG_S32K1XX_LPSPI0 */
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