diff --git a/.ci/Jenkinsfile-compile b/.ci/Jenkinsfile-compile index 77fd2ce9e6..acb3939f09 100644 --- a/.ci/Jenkinsfile-compile +++ b/.ci/Jenkinsfile-compile @@ -38,6 +38,7 @@ pipeline { "mro_x21_default", "mro_ctrl-zero-f7_default", "mro_x21-777_default", "nxp_fmuk66-v3_default", "nxp_fmurt1062-v1_default", + "nxp_rddrone-uavcan146_default", "omnibus_f4sd_default", "px4_fmu-v2_default", "px4_fmu-v2_fixedwing", "px4_fmu-v2_lpe", "px4_fmu-v2_multicopter", "px4_fmu-v2_rover", "px4_fmu-v2_test", "px4_fmu-v3_default", diff --git a/boards/nxp/rddrone-uavcan146/Kconfig b/boards/nxp/rddrone-uavcan146/Kconfig new file mode 100644 index 0000000000..f72f3c094c --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/boards/nxp/rddrone-uavcan146/default.cmake b/boards/nxp/rddrone-uavcan146/default.cmake new file mode 100644 index 0000000000..9d7034ea6f --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/default.cmake @@ -0,0 +1,19 @@ +px4_add_board( + PLATFORM nuttx + VENDOR nxp + MODEL rddrone-uavcan146 + LABEL default + TOOLCHAIN arm-none-eabi + ARCHITECTURE cortex-m4 + + UAVCAN_INTERFACES 2 + + DRIVERS + + MODULES + + SYSTEMCMDS + i2cdetect + + EXAMPLES + ) diff --git a/boards/nxp/rddrone-uavcan146/firmware.prototype b/boards/nxp/rddrone-uavcan146/firmware.prototype new file mode 100644 index 0000000000..bb3c62891a --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/firmware.prototype @@ -0,0 +1,13 @@ +{ + "board_id": 10000, + "magic": "PX4FWv1", + "description": "Firmware for the rddrone-uavcan146 board", + "image": "", + "build_time": 0, + "summary": "RDDRONE-UAVCAN146", + "version": "0.1", + "image_size": 0, + "image_maxsize": 0, + "git_identity": "", + "board_revision": 0 +} diff --git a/boards/nxp/rddrone-uavcan146/nuttx-config/Kconfig b/boards/nxp/rddrone-uavcan146/nuttx-config/Kconfig new file mode 100644 index 0000000000..57cceef9e0 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/nuttx-config/Kconfig @@ -0,0 +1,17 @@ +# +# For a description of the syntax of this configuration file, +# see misc/tools/kconfig-language.txt. +# +config BOARD_HAS_PROBES + bool "Board provides GPIO or other Hardware for signaling to timing analyze." + default y + ---help--- + This board provides GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers. + +config BOARD_USE_PROBES + bool "Enable the use the board provided GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers" + default n + depends on BOARD_HAS_PROBES + + ---help--- + Select to use GPIO FMU-CH1-6 to provide timing signals from selected drivers. diff --git a/boards/nxp/rddrone-uavcan146/nuttx-config/include/board.h b/boards/nxp/rddrone-uavcan146/nuttx-config/include/board.h new file mode 100644 index 0000000000..c0ab9d1d96 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/nuttx-config/include/board.h @@ -0,0 +1,153 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/include/board.h + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H +#define __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* The RDDRONE-UAVCAN146 is fitted with a 8MHz Crystal */ + +#define BOARD_XTAL_FREQUENCY 8000000 + +/* The S32K146 will run at 112MHz */ + +/* LED definitions **********************************************************/ + +/* The RDDRONE-UAVCAN146 has one RGB LED: + * + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual RGB + * components. + * + * The RGB components could, alternatively be controlled through PWM using + * the common RGB LED driver. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_R 0 +#define BOARD_LED_G 1 +#define BOARD_LED_B 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_R_BIT (1 << BOARD_LED_R) +#define BOARD_LED_G_BIT (1 << BOARD_LED_G) +#define BOARD_LED_B_BIT (1 << BOARD_LED_B) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board + * the RDDRONE-UAVCAN146. The following definitions describe how NuttX + * controls the LEDs: + * + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ------------------- ---------------------------- ----------------- + */ + +#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ +#define LED_INIRQ 0 /* In an interrupt (no change) */ +#define LED_SIGNAL 0 /* In a signal handler (no change) */ +#define LED_ASSERTION 0 /* An assertion failed (no change) */ +#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ +#undef LED_IDLE /* RDDRONE-UAVCAN146 in sleep mode (Not used) */ + +/* Button definitions *******************************************************/ + +/* The RDDRONE-UAVCAN146 supports two buttons: + * + * SW2 PTC12 + * SW3 PTC13 + */ + +#define BUTTON_SW2 0 +#define BUTTON_SW3 1 +#define NUM_BUTTONS 2 + +#define BUTTON_SW2_BIT (1 << BUTTON_SW2) +#define BUTTON_SW3_BIT (1 << BUTTON_SW3) + +/* Alternate function pin selections ****************************************/ + +/* By default, the serial console will be provided on the OpenSDA VCOM port: + * + * OpenSDA UART TX PTC7 (LPUART1_TX) + * OpenSDA UART RX PTC6 (LPUART1_RX) + */ + +#define PIN_LPUART0_CTS PIN_LPUART0_CTS_2 /* PTC8 */ +#define PIN_LPUART0_RTS PIN_LPUART0_RTS_2 /* PTC9 */ +#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ +#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ + +#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ +#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ + +/* SPI selections ***********************************************************/ + +#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ +#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ +#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */ +#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_2 /* PTB5 */ + +/* I2C selections ***********************************************************/ + +#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ +#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ + +#endif /* __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H */ diff --git a/boards/nxp/rddrone-uavcan146/nuttx-config/nsh/defconfig b/boards/nxp/rddrone-uavcan146/nuttx-config/nsh/defconfig new file mode 100644 index 0000000000..880b378f1b --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/nuttx-config/nsh/defconfig @@ -0,0 +1,74 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD_CUSTOM=y +CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" +CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y +CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" +CONFIG_ARCH_CHIP="s32k1xx" +CONFIG_ARCH_CHIP_S32K146=y +CONFIG_ARCH_CHIP_S32K14X=y +CONFIG_ARCH_CHIP_S32K1XX=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=3997 +CONFIG_BUILTIN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_I2C=y +CONFIG_I2CTOOL_DEFFREQ=100000 +CONFIG_I2CTOOL_MAXADDR=0x7f +CONFIG_I2CTOOL_MAXBUS=0 +CONFIG_I2CTOOL_MINADDR=0x00 +CONFIG_INTELHEX_BINARY=y +CONFIG_LPUART0_RXBUFSIZE=64 +CONFIG_LPUART0_TXBUFSIZE=64 +CONFIG_LPUART1_RXBUFSIZE=64 +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_LPUART1_TXBUFSIZE=64 +CONFIG_MAX_TASKS=16 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_MOTOROLA_SREC=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_RAM_SIZE=126976 +CONFIG_RAM_START=0x1fff0000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_S32K1XX_LPI2C0=y +CONFIG_S32K1XX_LPSPI0=y +CONFIG_S32K1XX_LPUART0=y +CONFIG_S32K1XX_LPUART1=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SPITOOL_DEFFREQ=400000 +CONFIG_SPITOOL_MAXBUS=0 +CONFIG_SPITOOL_PROGNAME="spi" +CONFIG_START_DAY=18 +CONFIG_START_MONTH=8 +CONFIG_START_YEAR=2019 +CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_I2CTOOL=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_SPITOOL=y +CONFIG_USER_ENTRYPOINT="nsh_main" \ No newline at end of file diff --git a/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/s32k146.cfg b/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/s32k146.cfg new file mode 100644 index 0000000000..749facc47c --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/s32k146.cfg @@ -0,0 +1,58 @@ +# +# NXP S32K146 - 1x ARM Cortex-M4 @ up to 180 MHz +# + +adapter_khz 4000 +transport select swd + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME s32k146 +} + +# +# M4 JTAG mode TAP +# +if { [info exists M4_JTAG_TAPID] } { + set _M4_JTAG_TAPID $M4_JTAG_TAPID +} else { + set _M4_JTAG_TAPID 0x4ba00477 +} + +# +# M4 SWD mode TAP +# +if { [info exists M4_SWD_TAPID] } { + set _M4_SWD_TAPID $M4_SWD_TAPID +} else { + set _M4_SWD_TAPID 0x2ba01477 +} + +source [find target/swj-dp.tcl] + +if { [using_jtag] } { + set _M4_TAPID $_M4_JTAG_TAPID +} else { + set _M4_TAPID $_M4_SWD_TAPID +} + +swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \ + -expected-id $_M4_TAPID + +target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4 + +# S32K146 has 64+60 KB contiguous SRAM +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x1F000 +} +$_CHIPNAME.m4 configure -work-area-phys 0x1FFF0000 \ + -work-area-size $_WORKAREASIZE -work-area-backup 0 + +$_CHIPNAME.m4 configure -rtos nuttx + +if { ![using_hla] } { + cortex_m reset_config vectreset +} diff --git a/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/script.ld b/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/script.ld new file mode 100644 index 0000000000..8d08125616 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/script.ld @@ -0,0 +1,152 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/scripts/flash.ld + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The S32K146 has 1Mb of FLASH beginning at address 0x0000:0000 and + * 124Kb of SRAM beginning at address 0x1fff:0000 (plus 4Kb of FlexRAM) + * + * The on-chip RAM is split in two regions: SRAM_L and SRAM_U. The RAM is + * implemented such that the SRAM_L and SRAM_U ranges form a contiguous + * block in the memory map + * + * SRAM_L 1fff0000 - 1fffffff 64Kb + * SRAM_U 20000000 - 2000efff 60Kb + */ + +MEMORY +{ + vflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K + pflash (rx) : ORIGIN = 0x00000400, LENGTH = 16 + dflash (rx) : ORIGIN = 0x00000410, LENGTH = 1023K-16 + sram (rwx) : ORIGIN = 0x1fff0000, LENGTH = 124K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +EXTERN(g_flashcfg) +ENTRY(_stext) + +SECTIONS +{ + .vectors : + { + _stext = ABSOLUTE(.); + *(.vectors) + } > vflash + + .flashcfg : + { + *(.flashcfg) + } > pflash + + .text : + { + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > dflash + + .init_section : + { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > dflash + + .ARM.extab : + { + *(.ARM.extab*) + } >dflash + + .ARM.exidx : + { + __exidx_start = ABSOLUTE(.); + *(.ARM.exidx*) + __exidx_end = ABSOLUTE(.); + } >dflash + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > sram AT > dflash + + _eronly = LOADADDR(.data); + + .ramfunc ALIGN(4): + { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > dflash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/sram.ld b/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/sram.ld new file mode 100644 index 0000000000..ff18d0ef33 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/nuttx-config/scripts/sram.ld @@ -0,0 +1,129 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/scripts/sram.ld + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The S32K146 has 1Mb of FLASH beginning at address 0x0000:0000 and + * 124Kb of SRAM beginning at address 0x1fff:0000 (plus 4Kb of FlexRAM) + * + * The on-chip RAM is split in two regions: SRAM_L and SRAM_U. The RAM is + * implemented such that the SRAM_L and SRAM_U ranges form a contiguous + * block in the memory map + * + * SRAM_L 1fff0000 - 1fffffff 64Kb + * SRAM_U 20000000 - 2000efff 60Kb + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 1M + sram (rwx) : ORIGIN = 0x1fff0000, LENGTH = 124K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) + +SECTIONS +{ + .text : + { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > sram + + .init_section : + { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > sram + + .ARM.extab : + { + *(.ARM.extab*) + } >sram + + .ARM.exidx : + { + __exidx_start = ABSOLUTE(.); + *(.ARM.exidx*) + __exidx_end = ABSOLUTE(.); + } >sram + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > sram + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/nxp/rddrone-uavcan146/src/CMakeLists.txt b/boards/nxp/rddrone-uavcan146/src/CMakeLists.txt new file mode 100644 index 0000000000..497340528e --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/CMakeLists.txt @@ -0,0 +1,52 @@ +############################################################################ +# +# Copyright (c) 2016, 2018 PX4 Development Team. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name PX4 nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +add_library(drivers_board + autoleds.c + boot.c + bringup.c + buttons.c + clockconfig.c + init.c + periphclocks.c + spi.c + userleds.c +) + +target_link_libraries(drivers_board + PRIVATE + nuttx_arch # sdio + nuttx_drivers # sdio + drivers__led # drv_led_start + px4_layer + ) diff --git a/boards/nxp/rddrone-uavcan146/src/autoleds.c b/boards/nxp/rddrone-uavcan146/src/autoleds.c new file mode 100644 index 0000000000..1f063e77c6 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/autoleds.c @@ -0,0 +1,162 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_autoleds.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The RDDRONE-UAVCAN146 has one RGB LED: + * + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) + * + * An output of '1' illuminates the LED. + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board + * the Freedom K66F. The following definitions describe how NuttX controls + * the LEDs: + * + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ------------------- ----------------------- ----------------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF OFF ON + * LED_STACKCREATED Idle stack created OFF ON OFF + * LED_INIRQ In an interrupt (no change) + * LED_SIGNAL In a signal handler (no change) + * LED_ASSERTION An assertion failed (no change) + * LED_PANIC The system has crashed FLASH OFF OFF + * LED_IDLE K66 is in sleep mode (Optional, not used) + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "s32k1xx_pin.h" +#include "board_config.h" + +#include + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Summary of all possible settings */ + +#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ +#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ +#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ +#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ +#define LED_ON_OFF_OFF 4 /* LED_PANIC */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + /* Configure LED GPIOs for output */ + + s32k1xx_pinconfig(GPIO_LED_R); + s32k1xx_pinconfig(GPIO_LED_G); + s32k1xx_pinconfig(GPIO_LED_B); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + if (led != LED_NOCHANGE) { + bool redon = false; + bool greenon = false; + bool blueon = false; + + switch (led) { + default: + case LED_OFF_OFF_OFF: + break; + + case LED_OFF_OFF_ON: + blueon = true; + break; + + case LED_OFF_ON_OFF: + greenon = true; + break; + + case LED_ON_OFF_OFF: + redon = true; + break; + } + + s32k1xx_gpiowrite(GPIO_LED_R, redon); + s32k1xx_gpiowrite(GPIO_LED_G, greenon); + s32k1xx_gpiowrite(GPIO_LED_B, blueon); + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (led == LED_ON_OFF_OFF) { + s32k1xx_gpiowrite(GPIO_LED_R, true); + s32k1xx_gpiowrite(GPIO_LED_G, false); + s32k1xx_gpiowrite(GPIO_LED_B, false); + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/nxp/rddrone-uavcan146/src/board_config.h b/boards/nxp/rddrone-uavcan146/src/board_config.h new file mode 100644 index 0000000000..db48f2b8ea --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/board_config.h @@ -0,0 +1,153 @@ +/**************************************************************************** + * + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file board_config.h + * + * NXP rddrone-uavcan146 internal definitions + */ + +#pragma once + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +__BEGIN_DECLS + +/* these headers are not C++ safe */ +#include "hardware/s32k1xx_pinmux.h" +#include "s32k1xx_periphclocks.h" +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* RDDRONE-UAVCAN146 GPIOs **************************************************/ + +/* LEDs. The RDDRONE-UAVCAN146 has one RGB LED: + * + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) + * + * An output of '1' illuminates the LED. + */ + +#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) + +/* Buttons. The RDDRONE-UAVCAN146 supports two buttons: + * + * SW2 PTC12 + * SW3 PTC13 + */ + +#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH) +#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH) + +/* SPI chip selects */ + +/* Count of peripheral clock user configurations */ + +#define NUM_OF_PERIPHERAL_CLOCKS_0 15 + +/* I2C busses */ + +#define PX4_I2C_BUS_ONBOARD PX4_BUS_NUMBER_TO_PX4(1) +#define PX4_I2C_BUS_EXPANSION PX4_BUS_NUMBER_TO_PX4(0) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* User peripheral configuration structure 0 */ + +extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[]; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int s32k1xx_bringup(void); + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the RDDRONE-UAVCAN146 + * board. + * + ****************************************************************************/ + +#ifdef CONFIG_S32K1XX_LPSPI +void s32k1xx_spidev_initialize(void); +#endif + +#include + +#endif /* __ASSEMBLY__ */ + +__END_DECLS diff --git a/boards/nxp/rddrone-uavcan146/src/boot.c b/boards/nxp/rddrone-uavcan146/src/boot.c new file mode 100644 index 0000000000..4e58ab733e --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/boot.c @@ -0,0 +1,94 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_boot.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include + +#include "board_config.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_board_initialize + * + * Description: + * All S32K1XX architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void s32k1xx_board_initialize(void) +{ +#ifdef CONFIG_ARCH_LEDS + /* Configure on-board LEDs if LED support has been selected. */ + + board_autoled_initialize(); +#endif +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will + * be called immediately after up_initialize() is called and just before + * the initial application is started. This additional initialization + * phase may be used, for example, to initialize board-specific device + * drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board-specific initialization */ + + s32k1xx_bringup(); +} +#endif diff --git a/boards/nxp/rddrone-uavcan146/src/bringup.c b/boards/nxp/rddrone-uavcan146/src/bringup.c new file mode 100644 index 0000000000..fbd6f581c4 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/bringup.c @@ -0,0 +1,146 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_bringup.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#ifdef CONFIG_BUTTONS +# include +#endif + +#ifdef CONFIG_USERLED +# include +#endif + +#ifdef CONFIG_I2C_DRIVER +# include "s32k1xx_pin.h" +# include +# include "s32k1xx_lpi2c.h" +#endif + +#include "board_config.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int s32k1xx_bringup(void) +{ + int ret = OK; + +#ifdef CONFIG_BUTTONS + /* Register the BUTTON driver */ + + ret = btn_lower_initialize("/dev/buttons"); + + if (ret < 0) { + syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret); + } + +#endif + +#ifdef CONFIG_USERLED + /* Register the LED driver */ + + ret = userled_lower_initialize("/dev/userleds"); + + if (ret < 0) { + syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret); + } + +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, "/proc", "procfs", 0, NULL); + + if (ret < 0) { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret); + } + +#endif + +#ifdef CONFIG_S32K1XX_LPSPI + /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak + * function s32k1xx_spidev_initialize() has been brought into the link. + */ + + s32k1xx_spidev_initialize(); +#endif + +#if defined(CONFIG_S32K1XX_LPI2C0) +#if defined(CONFIG_I2C_DRIVER) + FAR struct i2c_master_s *i2c; + i2c = s32k1xx_i2cbus_initialize(0); + + if (i2c == NULL) { + serr("ERROR: Failed to get I2C%d interface\n", bus); + + } else { + ret = i2c_register(i2c, 0); + + if (ret < 0) { + serr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); + s32k1xx_i2cbus_uninitialize(i2c); + } + } + +#endif +#endif + + return ret; +} diff --git a/boards/nxp/rddrone-uavcan146/src/buttons.c b/boards/nxp/rddrone-uavcan146/src/buttons.c new file mode 100644 index 0000000000..a6dc2a4cb1 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/buttons.c @@ -0,0 +1,160 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_buttons.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The RDDRONE-UAVCAN146 supports two buttons: + * + * SW2 PTC12 + * SW3 PTC13 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "s32k1xx_pin.h" +#include "board_config.h" + +#include + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure the GPIO pins as interrupting inputs. */ + + s32k1xx_pinconfig(GPIO_SW2); + s32k1xx_pinconfig(GPIO_SW3); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint32_t board_buttons(void) +{ + uint32_t ret = 0; + + if (s32k1xx_gpioread(GPIO_SW2)) { + ret |= BUTTON_SW2_BIT; + } + + if (s32k1xx_gpioread(GPIO_SW3)) { + ret |= BUTTON_SW3_BIT; + } + + return ret; +} + +/**************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns a + * 32-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is + * a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of enumeration + * value. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) +{ + uint32_t pinset; + int ret; + + /* Map the button id to the GPIO bit set. */ + + if (id == BUTTON_SW2) { + pinset = GPIO_SW2; + + } else if (id == BUTTON_SW3) { + pinset = GPIO_SW3; + + } else { + return -EINVAL; + } + + /* The button has already been configured as an interrupting input (by + * board_button_initialize() above). + * + * Attach the new button handler. + */ + + ret = s32k1xx_pinirqattach(pinset, irqhandler, NULL); + + if (ret >= 0) { + /* Then make sure that interrupts are enabled on the pin */ + + s32k1xx_pinirqenable(pinset); + } + + return ret; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/nxp/rddrone-uavcan146/src/clockconfig.c b/boards/nxp/rddrone-uavcan146/src/clockconfig.c new file mode 100644 index 0000000000..00bcb5d18b --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/clockconfig.c @@ -0,0 +1,226 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_clockconfig.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Most of the settings within this file derives from NXP sample code for + * the S32K1XX MCUs. That sample code has this licensing information: + * + * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. + * Copyright 2016-2018 NXP + * All rights reserved. + * + * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "s32k1xx_clockconfig.h" +#include "s32k1xx_start.h" +#include "board_config.h" + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Each S32K1XX board must provide the following initialized structure. + * This is needed to establish the initial board clocking. + */ + +const struct clock_configuration_s g_initial_clkconfig = { + .scg = + { + .sirc = + { + .range = SCG_SIRC_RANGE_HIGH, /* RANGE - High range (8 MHz) */ + .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SIRCDIV1 */ + .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SIRCDIV2 */ + .initialize = true, /* Initialize */ + .stopmode = true, /* SIRCSTEN */ + .lowpower = true, /* SIRCLPEN */ + .locked = false, /* LK */ + }, + .firc = + { + .range = SCG_FIRC_RANGE_48M, /* RANGE */ + .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* FIRCDIV1 */ + .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* FIRCDIV2 */ + .initialize = true, /* Initialize */ + .stopmode = false, /* */ + .lowpower = false, /* */ + .regulator = true, /* FIRCREGOFF */ + .locked = false, /* LK */ + }, + .sosc = + { + .mode = SCG_SOSC_MONITOR_DISABLE, /* SOSCCM */ + .gain = SCG_SOSC_GAIN_LOW, /* HGO */ + .range = SCG_SOSC_RANGE_MID, /* RANGE */ + .extref = SCG_SOSC_REF_OSC, /* EREFS */ + .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SOSCDIV1 */ + .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SOSCDIV2 */ + .initialize = true, /* Initialize */ + .stopmode = false, /* */ + .lowpower = false, /* */ + .locked = false, /* LK */ + }, + .spll = + { + .mode = SCG_SPLL_MONITOR_DISABLE, /* SPLLCM */ + .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SPLLDIV1 */ + .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SPLLDIV2 */ + .prediv = 1, /* PREDIV */ + .mult = 40, /* MULT */ + .src = 0, /* SOURCE */ + .initialize = true, /* Initialize */ + .stopmode = false, /* */ + .locked = false, /* LK */ + }, + .rtc = + { + .initialize = true, /* Initialize */ + .clkin = 0 /* RTC_CLKIN */ + }, + .clockout = + { + .source = SCG_CLOCKOUT_SRC_FIRC, /* SCG CLKOUTSEL */ + .initialize = true, /* Initialize */ + }, + .clockmode = + { + .rccr = /* RCCR - Run Clock Control Register */ + { + .src = SCG_SYSTEM_CLOCK_SRC_SYS_PLL, /* SCS */ + .divslow = 3, /* DIVSLOW, range 1..16 */ + .divbus = 2, /* DIVBUS, range 1..16 */ + .divcore = 2 /* DIVCORE, range 1..16 */ + }, + .vccr = /* VCCR - VLPR Clock Control Register */ + { + .src = SCG_SYSTEM_CLOCK_SRC_SIRC, /* SCS */ + .divslow = 4, /* DIVSLOW, range 1..16 */ + .divbus = 1, /* DIVBUS, range 1..16 */ + .divcore = 2 /* DIVCORE, range 1..16 */ + }, + .hccr = + { + .src = SCG_SYSTEM_CLOCK_SRC_SYS_PLL, /* SCS */ + .divslow = 3, /* DIVSLOW, range 1..16 */ + .divbus = 2, /* DIVBUS, range 1..16 */ + .divcore = 2 /* DIVCORE, range 1..16 */ + }, + + /* .altclk */ + + .initialize = true, /* Initialize */ + }, + }, + .sim = + { + .clockout = /* Clock Out configuration. */ + { + .source = SIM_CLKOUT_SEL_SYSTEM_SCG_CLKOUT, /* CLKOUTSEL */ + .divider = 1, /* CLKOUTDIV, range 1..8 */ + .initialize = true, /* Initialize */ + .enable = false, /* CLKOUTEN */ + }, + .lpoclk = /* Low Power Clock configuration. */ + { + .rtc_source = SIM_RTCCLK_SEL_SOSCDIV1_CLK, /* RTCCLKSEL */ + .lpo_source = SIM_LPO_CLK_SEL_LPO_128K, /* LPOCLKSEL */ + .initialize = true, /* Initialize */ + .lpo32k = true, /* LPO32KCLKEN */ + .lpo1k = true, /* LPO1KCLKEN */ + }, + .tclk = /* TCLK CLOCK configuration. */ + { + .tclkfreq[0] = 0, /* TCLK0 */ + .tclkfreq[1] = 0, /* TCLK1 */ + .tclkfreq[2] = 0, /* TCLK2 */ + .initialize = true, /* Initialize */ + }, + .platgate = /* Platform Gate Clock configuration. */ + { + .initialize = true, /* Initialize */ + .mscm = true, /* CGCMSCM */ + .mpu = true, /* CGCMPU */ + .dma = true, /* CGCDMA */ + .erm = true, /* CGCERM */ + .eim = true, /* CGCEIM */ + }, + .traceclk = /* Debug trace Clock Configuration. */ + { + .source = CLOCK_TRACE_SRC_CORE_CLK, /* TRACECLK_SEL */ + .divider = 1, /* TRACEDIV, range 1..8 */ + .initialize = true, /* Initialize */ + .enable = true, /* TRACEDIVEN */ + .fraction = false, /* TRACEFRAC */ + }, +#ifdef CONFIG_S32K1XX_HAVE_QSPI + .qspirefclk = /* Quad Spi Internal Reference Clock Gating. */ + { + .refclk = false, /* Qspi reference clock gating */ + }, +#endif + }, + .pcc = + { + .count = NUM_OF_PERIPHERAL_CLOCKS_0, /* Number peripheral clock configurations */ + .pclks = g_peripheral_clockconfig0 /* Peripheral clock configurations */ + }, + .pmc = + { + .lpoclk = /* Low Power Clock configuration. */ + { + .trim = 0, /* Trimming value for LPO */ + .initialize = true, /* Initialize */ + .enable = true, /* Enable/disable LPO */ + }, + } +}; diff --git a/boards/nxp/rddrone-uavcan146/src/init.c b/boards/nxp/rddrone-uavcan146/src/init.c new file mode 100644 index 0000000000..edaa108131 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/init.c @@ -0,0 +1,94 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_appinit.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "board_config.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initialization logic and the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ +#ifdef CONFIG_BOARD_LATE_INITIALIZE + /* Board initialization already performed by board_late_initialize() */ + + return OK; +#else + /* Perform board-specific initialization */ + + return s32k1xx_bringup(); +#endif +} diff --git a/boards/nxp/rddrone-uavcan146/src/periphclocks.c b/boards/nxp/rddrone-uavcan146/src/periphclocks.c new file mode 100644 index 0000000000..7c9bdfdb21 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/periphclocks.c @@ -0,0 +1,186 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_periphclks.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Most of the settings within this file derives from NXP sample code for + * the S32K1XX MCUs. That sample code has this licensing information: + * + * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. + * Copyright 2016-2018 NXP + * All rights reserved. + * + * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "s32k1xx_periphclocks.h" +#include "board_config.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* Each S32K1XX board must provide the following initialized structure. + * This is needed to establish the initial peripheral clocking. + */ + +const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = { + { + .clkname = ADC0_CLK, + .clkgate = true, + .clksrc = CLK_SRC_FIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = ADC1_CLK, + .clkgate = true, + .clksrc = CLK_SRC_FIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPI2C0_CLK, + .clkgate = true, + .clksrc = CLK_SRC_SIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPSPI0_CLK, + .clkgate = true, + .clksrc = CLK_SRC_SIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPSPI1_CLK, + .clkgate = false, + .clksrc = CLK_SRC_FIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPSPI2_CLK, + .clkgate = false, + .clksrc = CLK_SRC_FIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPTMR0_CLK, + .clkgate = true, + .clksrc = CLK_SRC_SIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPUART0_CLK, + .clkgate = true, + .clksrc = CLK_SRC_SIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPUART1_CLK, + .clkgate = true, + .clksrc = CLK_SRC_SIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = LPUART2_CLK, + .clkgate = false, + .clksrc = CLK_SRC_SIRC, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = PORTA_CLK, + .clkgate = true, + .clksrc = CLK_SRC_OFF, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = PORTB_CLK, + .clkgate = true, + .clksrc = CLK_SRC_OFF, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = PORTC_CLK, + .clkgate = true, + .clksrc = CLK_SRC_OFF, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = PORTD_CLK, + .clkgate = true, + .clksrc = CLK_SRC_OFF, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, + { + .clkname = PORTE_CLK, + .clkgate = true, + .clksrc = CLK_SRC_OFF, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + } +}; diff --git a/boards/nxp/rddrone-uavcan146/src/spi.c b/boards/nxp/rddrone-uavcan146/src/spi.c new file mode 100644 index 0000000000..5629b94151 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/spi.c @@ -0,0 +1,196 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_spi.c + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Author: Ivan Ucherdzhiev + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" + +#include "s32k1xx_config.h" +#include "s32k1xx_lpspi.h" +#include "s32k1xx_pin.h" +#include "board_config.h" + +#if defined(CONFIG_S32K1XX_LPSPI0) || defined(CONFIG_S32K1XX_LPSPI1) || \ + defined(CONFIG_S32K1XX_LPSPI2) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the RDDRONE-UAVCAN146 + * board. + * + ****************************************************************************/ + +void weak_function s32k1xx_spidev_initialize(void) +{ +#ifdef CONFIG_S32K1XX_LPSPI0 + s32k1xx_pinconfig(PIN_LPSPI0_PCS); + +#ifdef CONFIG_SPI_DRIVER + struct spi_dev_s *g_lpspi0; + g_lpspi0 = s32k1xx_lpspibus_initialize(0); + + if (!g_lpspi0) { + spierr("ERROR: [boot] FAILED to initialize LPSPI0\n"); + } + + spi_register(g_lpspi0, 0); +#endif +#endif + +#ifdef CONFIG_S32K1XX_LPSPI1 + s32k1xx_pinconfig(PIN_LPSPI1_PCS); + +#ifdef CONFIG_SPI_DRIVER + struct spi_dev_s *g_lpspi1; + g_lpspi1 = s32k1xx_lpspibus_initialize(1); + + if (!g_lpspi1) { + spierr("ERROR: [boot] FAILED to initialize LPSPI1\n"); + } + + spi_register(g_lpspi1, 1); +#endif +#endif + +#ifdef CONFIG_S32K1XX_LPSPI2 + s32k1xx_pinconfig(PIN_LPSPI2_PCS); + +#ifdef CONFIG_SPI_DRIVER + struct spi_dev_s *g_lpspi2; + g_lpspi2 = s32k1xx_lpspibus_initialize(2); + + if (!g_lpspi2) { + spierr("ERROR: [boot] FAILED to initialize LPSPI2\n"); + } + + spi_register(g_lpspi2, 2); +#endif +#endif +} + +/**************************************************************************** + * Name: s32k1xx_lpspi0/1/2select and s32k1xx_lpspi0/1/2status + * + * Description: + * The external functions, s32k1xx_lpspi0/1/2select and + * s32k1xx_lpspi0/1/2status must be provided by board-specific logic. + * They are implementations of the select and status methods of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All other methods (including s32k1xx_lpspibus_initialize()) are provided + * by common logic. To use this common SPI logic on your board: + * + * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip + * select pins. + * 2. Provide s32k1xx_lpspi0/1/2select() and s32k1xx_lpspi0/1/2status() + * functions in your board-specific logic. These functions will perform + * chip selection and status operations using GPIOs in the way your + * board is configured. + * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level + * application initialization logic + * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used + * to bind the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_S32K1XX_LPSPI0 +void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); +} + +uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_S32K1XX_LPSPI1 +void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, + uint32_t devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); +} + +uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_S32K1XX_LPSPI2 +void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, + uint32_t devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); +} + +uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif + +#endif /* CONFIG_S32K1XX_LPSPI0 || CONFIG_S32K1XX_LPSPI01 || CONFIG_S32K1XX_LPSPI2 */ diff --git a/boards/nxp/rddrone-uavcan146/src/userleds.c b/boards/nxp/rddrone-uavcan146/src/userleds.c new file mode 100644 index 0000000000..76bdccf8f3 --- /dev/null +++ b/boards/nxp/rddrone-uavcan146/src/userleds.c @@ -0,0 +1,112 @@ +/**************************************************************************** + * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_userleds.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "s32k1xx_pin.h" +#include "board_config.h" + +#include + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure LED GPIOs for output */ + + s32k1xx_pinconfig(GPIO_LED_R); + s32k1xx_pinconfig(GPIO_LED_G); + s32k1xx_pinconfig(GPIO_LED_B); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + if (led == BOARD_LED_R) { + ledcfg = GPIO_LED_R; + + } else if (led == BOARD_LED_G) { + ledcfg = GPIO_LED_G; + + } else if (led == BOARD_LED_B) { + ledcfg = GPIO_LED_B; + + } else { + return; + } + + s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + /* Low illuminates */ + + s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); + s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); + s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) != 0); +} + +#endif /* !CONFIG_ARCH_LEDS */