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synced 2026-11-06 05:41:36 +08:00
Fixed 'test' function causes register checking to find a false faults
Added hold off of testing for register faults from the duration of the test.
This commit is contained in:
committed by
Lorenz Meier
parent
bb168287da
commit
15460ade77
@@ -732,16 +732,21 @@ out:
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int MPU6000::reset()
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int MPU6000::reset()
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{
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{
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// if the mpu6000 is initialised after the l3gd20 and lsm303d
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// if the mpu6000 is initialized after the l3gd20 and lsm303d
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// then if we don't do an irqsave/irqrestore here the mpu6000
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// then if we don't do an irqsave/irqrestore here the mpu6000
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// frequenctly comes up in a bad state where all transfers
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// frequently comes up in a bad state where all transfers
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// come as zero
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// come as zero
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uint8_t tries = 5;
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uint8_t tries = 5;
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irqstate_t state;
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while (--tries != 0) {
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while (--tries != 0) {
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irqstate_t state;
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state = px4_enter_critical_section();
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state = px4_enter_critical_section();
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// Hold off sampling for 60 ms
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_reset_wait = hrt_absolute_time() + 60000;
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write_reg(MPUREG_PWR_MGMT_1, BIT_H_RESET);
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write_reg(MPUREG_PWR_MGMT_1, BIT_H_RESET);
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up_udelay(10000);
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up_udelay(10000);
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@@ -764,6 +769,12 @@ int MPU6000::reset()
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usleep(2000);
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usleep(2000);
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}
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}
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// Hold off sampling for 30 ms
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state = px4_enter_critical_section();
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_reset_wait = hrt_absolute_time() + 30000;
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px4_leave_critical_section(state);
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if (read_reg(MPUREG_PWR_MGMT_1) != MPU_CLK_SEL_PLLGYROZ) {
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if (read_reg(MPUREG_PWR_MGMT_1) != MPU_CLK_SEL_PLLGYROZ) {
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return -EIO;
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return -EIO;
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}
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}
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@@ -813,7 +824,6 @@ int MPU6000::reset()
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// Oscillator set
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// Oscillator set
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// write_reg(MPUREG_PWR_MGMT_1,MPU_CLK_SEL_PLLGYROZ);
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// write_reg(MPUREG_PWR_MGMT_1,MPU_CLK_SEL_PLLGYROZ);
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usleep(1000);
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usleep(1000);
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return OK;
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return OK;
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}
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}
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