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nxp_fmurt1170-v1:Proper SPI usage
This commit is contained in:
David Sidrane
@@ -0,0 +1,39 @@
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############################################################################
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#
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# Copyright (c) 2023 PX4 Development Team. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
|
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# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name PX4 nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
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||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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px4_add_library(arch_spi
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spi.cpp
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)
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target_compile_options(arch_spi PRIVATE ${MAX_CUSTOM_OPT_LEVEL})
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target_link_libraries (arch_spi PRIVATE drivers_board) # px4_spi_buses
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@@ -0,0 +1,521 @@
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/****************************************************************************
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*
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* Copyright (c) 2023 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#include <board_config.h>
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#include <systemlib/px4_macros.h>
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#include <px4_platform_common/spi.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <debug.h>
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#include <unistd.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include <arm_internal.h>
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#include <chip.h>
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#include "imxrt_gpio.h"
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static const px4_spi_bus_t *_spi_bus1;
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static const px4_spi_bus_t *_spi_bus2;
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static const px4_spi_bus_t *_spi_bus3;
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static const px4_spi_bus_t *_spi_bus4;
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static const px4_spi_bus_t *_spi_bus5;
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static const px4_spi_bus_t *_spi_bus6;
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static void spi_bus_configgpio_cs(const px4_spi_bus_t *bus)
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{
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (bus->devices[i].cs_gpio != 0) {
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px4_arch_configgpio(bus->devices[i].cs_gpio);
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}
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}
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}
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__EXPORT void imxrt_spiinitialize()
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{
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px4_set_spi_buses_from_hw_version();
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board_control_spi_sensors_power_configgpio();
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board_control_spi_sensors_power(true, 0xffff);
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for (int i = 0; i < SPI_BUS_MAX_BUS_ITEMS; ++i) {
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switch (px4_spi_buses[i].bus) {
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case 1: _spi_bus1 = &px4_spi_buses[i]; break;
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case 2: _spi_bus2 = &px4_spi_buses[i]; break;
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case 3: _spi_bus3 = &px4_spi_buses[i]; break;
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case 4: _spi_bus4 = &px4_spi_buses[i]; break;
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case 5: _spi_bus5 = &px4_spi_buses[i]; break;
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case 6: _spi_bus6 = &px4_spi_buses[i]; break;
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}
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}
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#ifdef CONFIG_IMXRT_LPSPI1
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ASSERT(_spi_bus1);
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if (board_has_bus(BOARD_SPI_BUS, 1)) {
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spi_bus_configgpio_cs(_spi_bus1);
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}
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#endif // CONFIG_IMXRT_LPSPI1
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#if defined(CONFIG_IMXRT_LPSPI2)
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ASSERT(_spi_bus2);
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if (board_has_bus(BOARD_SPI_BUS, 2)) {
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spi_bus_configgpio_cs(_spi_bus2);
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}
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#endif // CONFIG_IMXRT_LPSPI2
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#ifdef CONFIG_IMXRT_LPSPI3
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ASSERT(_spi_bus3);
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if (board_has_bus(BOARD_SPI_BUS, 3)) {
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spi_bus_configgpio_cs(_spi_bus3);
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}
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#endif // CONFIG_IMXRT_LPSPI3
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#ifdef CONFIG_IMXRT_LPSPI4
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ASSERT(_spi_bus4);
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if (board_has_bus(BOARD_SPI_BUS, 4)) {
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spi_bus_configgpio_cs(_spi_bus4);
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}
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#endif // CONFIG_IMXRT_LPSPI4
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#ifdef CONFIG_IMXRT_LPSPI5
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ASSERT(_spi_bus5);
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if (board_has_bus(BOARD_SPI_BUS, 5)) {
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spi_bus_configgpio_cs(_spi_bus5);
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}
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#endif // CONFIG_IMXRT_LPSPI5
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#ifdef CONFIG_IMXRT_LPSPI6
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ASSERT(_spi_bus6);
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if (board_has_bus(BOARD_SPI_BUS, 6)) {
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spi_bus_configgpio_cs(_spi_bus6);
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}
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#endif // CONFIG_IMXRT_LPSPI6
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}
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static inline void imxrt_lpspixselect(const px4_spi_bus_t *bus, struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
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if (bus->devices[i].cs_gpio == 0) {
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break;
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}
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if (devid == bus->devices[i].devid) {
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// SPI select is active low, so write !selected to select the device
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imxrt_gpio_write(bus->devices[i].cs_gpio, !selected);
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}
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}
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}
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/************************************************************************************
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* Name: imxrt_lpspi1select and imxrt_lpspi1select
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*
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* Description:
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* Called by imxrt spi driver on bus 1.
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*
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************************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI1
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__EXPORT void imxrt_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_lpspixselect(_spi_bus1, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif // CONFIG_IMXRT_LPSPI1
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/************************************************************************************
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* Name: imxrt_lpspi2select and imxrt_lpspi2select
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*
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* Description:
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* Called by imxrt spi driver on bus 2.
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*
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************************************************************************************/
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#if defined(CONFIG_IMXRT_LPSPI2)
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__EXPORT void imxrt_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_lpspixselect(_spi_bus2, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif // CONFIG_IMXRT_LPSPI2
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/************************************************************************************
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* Name: imxrt_lpspi3select and imxrt_lpspi3select
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*
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* Description:
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* Called by imxrt spi driver on bus 3.
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*
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************************************************************************************/
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#if defined(CONFIG_IMXRT_LPSPI3)
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__EXPORT void imxrt_lpspi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_lpspixselect(_spi_bus3, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi3status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif // CONFIG_IMXRT_LPSPI3
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/************************************************************************************
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* Name: imxrt_lpspi4select and imxrt_lpspi4select
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*
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* Description:
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* Called by imxrt spi driver on bus 4.
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*
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************************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI4
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__EXPORT void imxrt_lpspi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_lpspixselect(_spi_bus4, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi4status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif // CONFIG_IMXRT_LPSPI4
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/************************************************************************************
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* Name: imxrt_lpspi5select and imxrt_lpspi5select
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*
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* Description:
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* Called by imxrt spi driver on bus 5.
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*
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************************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI5
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__EXPORT void imxrt_lpspi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_lpspixselect(_spi_bus5, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi5status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif // CONFIG_IMXRT_LPSPI5
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/************************************************************************************
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* Name: imxrt_lpspi6select and imxrt_lpspi6select
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*
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* Description:
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* Called by imxrt spi driver on bus 6.
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*
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************************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI6
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__EXPORT void imxrt_lpspi6select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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imxrt_lpspixselect(_spi_bus6, dev, devid, selected);
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}
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__EXPORT uint8_t imxrt_lpspi6status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif // CONFIG_IMXRT_LPSPI6
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void board_control_spi_sensors_power(bool enable_power, int bus_mask)
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{
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const px4_spi_bus_t *buses = px4_spi_buses;
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// this might be called very early on boot where we have not yet determined the hw version
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// (we expect all versions to have the same power GPIO)
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#if BOARD_NUM_SPI_CFG_HW_VERSIONS > 1
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if (!buses) {
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buses = &px4_spi_buses_all_hw[0].buses[0];
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}
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#endif
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
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if (buses[bus].bus == -1) {
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break;
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}
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const bool bus_matches = bus_mask & (1 << (buses[bus].bus - 1));
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if (buses[bus].power_enable_gpio == 0 ||
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!board_has_bus(BOARD_SPI_BUS, buses[bus].bus) ||
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!bus_matches) {
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continue;
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}
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px4_arch_gpiowrite(buses[bus].power_enable_gpio, enable_power ? 1 : 0);
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}
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}
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void board_control_spi_sensors_power_configgpio()
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{
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const px4_spi_bus_t *buses = px4_spi_buses;
|
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// this might be called very early on boot where we have yet not determined the hw version
|
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// (we expect all versions to have the same power GPIO)
|
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#if BOARD_NUM_SPI_CFG_HW_VERSIONS > 1
|
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|
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if (!buses) {
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buses = &px4_spi_buses_all_hw[0].buses[0];
|
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}
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|
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#endif
|
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|
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
|
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if (buses[bus].bus == -1) {
|
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break;
|
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}
|
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|
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if (buses[bus].power_enable_gpio == 0 ||
|
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!board_has_bus(BOARD_SPI_BUS, buses[bus].bus)) {
|
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continue;
|
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}
|
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|
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px4_arch_configgpio(buses[bus].power_enable_gpio);
|
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}
|
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}
|
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|
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__EXPORT void board_spi_reset(int ms, int bus_mask)
|
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{
|
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bool has_power_enable = false;
|
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|
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// disable SPI bus
|
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for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
|
||||
if (px4_spi_buses[bus].bus == -1) {
|
||||
break;
|
||||
}
|
||||
|
||||
const bool bus_requested = bus_mask & (1 << (px4_spi_buses[bus].bus - 1));
|
||||
|
||||
if (px4_spi_buses[bus].power_enable_gpio == 0 ||
|
||||
!board_has_bus(BOARD_SPI_BUS, px4_spi_buses[bus].bus) ||
|
||||
!bus_requested) {
|
||||
continue;
|
||||
}
|
||||
|
||||
has_power_enable = true;
|
||||
|
||||
for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
|
||||
if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
|
||||
px4_arch_configgpio(_PIN_OFF(px4_spi_buses[bus].devices[i].cs_gpio));
|
||||
}
|
||||
|
||||
if (px4_spi_buses[bus].devices[i].drdy_gpio != 0) {
|
||||
px4_arch_configgpio(_PIN_OFF(px4_spi_buses[bus].devices[i].drdy_gpio));
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_IMXRT_LPSPI1)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 1) {
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI1_SCK));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI1_MISO));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI1_MOSI));
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI2)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 2) {
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI2_SCK));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI2_MISO));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI2_MOSI));
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI3)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 3) {
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI3_SCK));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI3_MISO));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI3_MOSI));
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI4)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 4) {
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI4_SCK));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI4_MISO));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI4_MOSI));
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI5)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 5) {
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI5_SCK));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI5_MISO));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI5_MOSI));
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI6)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 6) {
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI6_SCK));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI6_MISO));
|
||||
px4_arch_configgpio(_PIN_OFF(GPIO_LPSPI6_MOSI));
|
||||
}
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
if (!has_power_enable) {
|
||||
// board does not have power control over any of the sensor buses
|
||||
return;
|
||||
}
|
||||
|
||||
// set the sensor rail(s) off
|
||||
board_control_spi_sensors_power(false, bus_mask);
|
||||
|
||||
// wait for the sensor rail to reach GND
|
||||
usleep(ms * 1000);
|
||||
syslog(LOG_DEBUG, "reset done, %d ms\n", ms);
|
||||
|
||||
/* re-enable power */
|
||||
|
||||
// switch the sensor rail back on
|
||||
board_control_spi_sensors_power(true, bus_mask);
|
||||
|
||||
/* wait a bit before starting SPI, different times didn't influence results */
|
||||
usleep(100);
|
||||
|
||||
/* reconfigure the SPI pins */
|
||||
for (int bus = 0; bus < SPI_BUS_MAX_BUS_ITEMS; ++bus) {
|
||||
if (px4_spi_buses[bus].bus == -1) {
|
||||
break;
|
||||
}
|
||||
|
||||
const bool bus_requested = bus_mask & (1 << (px4_spi_buses[bus].bus - 1));
|
||||
|
||||
if (px4_spi_buses[bus].power_enable_gpio == 0 ||
|
||||
!board_has_bus(BOARD_SPI_BUS, px4_spi_buses[bus].bus) ||
|
||||
!bus_requested) {
|
||||
continue;
|
||||
}
|
||||
|
||||
for (int i = 0; i < SPI_BUS_MAX_DEVICES; ++i) {
|
||||
if (px4_spi_buses[bus].devices[i].cs_gpio != 0) {
|
||||
px4_arch_configgpio(px4_spi_buses[bus].devices[i].cs_gpio);
|
||||
}
|
||||
|
||||
if (px4_spi_buses[bus].devices[i].drdy_gpio != 0) {
|
||||
px4_arch_configgpio(px4_spi_buses[bus].devices[i].drdy_gpio);
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_IMXRT_LPSPI1)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 1) {
|
||||
px4_arch_configgpio(GPIO_LPSPI1_SCK);
|
||||
px4_arch_configgpio(GPIO_LPSPI1_MISO);
|
||||
px4_arch_configgpio(GPIO_LPSPI1_MOSI);
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI2)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 2) {
|
||||
px4_arch_configgpio(GPIO_LPSPI2_SCK);
|
||||
px4_arch_configgpio(GPIO_LPSPI2_MISO);
|
||||
px4_arch_configgpio(GPIO_LPSPI2_MOSI);
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI3)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 3) {
|
||||
px4_arch_configgpio(GPIO_LPSPI3_SCK);
|
||||
px4_arch_configgpio(GPIO_LPSPI3_MISO);
|
||||
px4_arch_configgpio(GPIO_LPSPI3_MOSI);
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI4)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 4) {
|
||||
px4_arch_configgpio(GPIO_LPSPI4_SCK);
|
||||
px4_arch_configgpio(GPIO_LPSPI4_MISO);
|
||||
px4_arch_configgpio(GPIO_LPSPI4_MOSI);
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI5)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 5) {
|
||||
px4_arch_configgpio(GPIO_LPSPI5_SCK);
|
||||
px4_arch_configgpio(GPIO_LPSPI5_MISO);
|
||||
px4_arch_configgpio(GPIO_LPSPI5_MOSI);
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(CONFIG_IMXRT_LPSPI6)
|
||||
|
||||
if (px4_spi_buses[bus].bus == 6) {
|
||||
px4_arch_configgpio(GPIO_LPSPI6_SCK);
|
||||
px4_arch_configgpio(GPIO_LPSPI6_MISO);
|
||||
px4_arch_configgpio(GPIO_LPSPI6_MOSI);
|
||||
}
|
||||
|
||||
#endif
|
||||
}
|
||||
}
|
||||
@@ -42,5 +42,6 @@ add_subdirectory(../imxrt/led_pwm led_pwm)
|
||||
add_subdirectory(io_pins)
|
||||
add_subdirectory(../imxrt/tone_alarm tone_alarm)
|
||||
add_subdirectory(../imxrt/version version)
|
||||
add_subdirectory(../imxrt/spi spi)
|
||||
|
||||
add_subdirectory(px4io_serial)
|
||||
|
||||
Reference in New Issue
Block a user